Commit ec837f9c authored by Sakthivel Velumani's avatar Sakthivel Velumani

predefined beam array

parent 298f07af
...@@ -757,17 +757,11 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) { ...@@ -757,17 +757,11 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
// bit 11 enables the gpio programming // bit 11 enables the gpio programming
// currently we switch beams every 10 slots (should = 1 TDD period in FR2) and we take the beam index of the first symbol of the first slot of this period // currently we switch beams every 10 slots (should = 1 TDD period in FR2) and we take the beam index of the first symbol of the first slot of this period
int beam=0; int beam=0;
if ((ru->common.beam_id[0][slot*fp->symbols_per_slot] < 8) || (ru->common.beam_id[0][slot*fp->symbols_per_slot] == 255)) { if ((slot%10 == 0) && (ru->common.beam_id[0][slot*fp->symbols_per_slot] < 8)) {
beam = ru->common.beam_id[0][slot*fp->symbols_per_slot] | 8; beam = ru->common.beam_id[0][slot*fp->symbols_per_slot] | 8;
LOG_D(HW,"slot %d, beam %d\n",slot,beam);
} }
else {
LOG_E(HW,"Beam index cannot be greater than 7. Attemping beam index is %d\n",ru->common.beam_id[0][slot*fp->symbols_per_slot]);
}
flags |= beam<<8; flags |= beam<<8;
LOG_D(HW,"slot %d, beam %d\n",slot,beam);
} }
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags ); VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS, flags );
......
...@@ -512,12 +512,15 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB, ...@@ -512,12 +512,15 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
// handle beamforming ID // handle beamforming ID
// each antenna port is assigned a beam_index // each antenna port is assigned a beam_index
// since PHY can only handle BF on slot basis we set the whole slot // since PHY can only handle BF on slot basis we set the whole slot
// first check if this slot has not already been allocated to another beam // first check if this slot has not already been allocated to another beam
// Comment by SV: analog beam switching in FR2 is done once per tdd period.
// so the beam has to be switched much earlier than the actual Tx slot
// for this reason we copy the beam id to phy in nr_schedule_response()
/*
if ((gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot] == 255) || if ((gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot] == 255) ||
(gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot] == (gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot] ==
rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx)) { rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx)) {
printf("pdsch beam %d\n",rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx);
memset(&gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot], memset(&gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot],
rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx, rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx,
frame_parms->symbols_per_slot*get_tdd_period_in_slots( frame_parms->symbols_per_slot*get_tdd_period_in_slots(
...@@ -527,6 +530,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB, ...@@ -527,6 +530,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
else { else {
LOG_W(PHY,"beam index for PDSCH allocation already taken\n"); LOG_W(PHY,"beam index for PDSCH allocation already taken\n");
} }
*/
}// dlsch loop }// dlsch loop
......
...@@ -154,11 +154,21 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){ ...@@ -154,11 +154,21 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id); AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
gNB = RC.gNB[Mod_id]; gNB = RC.gNB[Mod_id];
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
uint8_t number_dl_pdu = (DL_req==NULL) ? 0 : DL_req->dl_tti_request_body.nPDUs; uint8_t number_dl_pdu = (DL_req==NULL) ? 0 : DL_req->dl_tti_request_body.nPDUs;
uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus; uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus; uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus;
// Copy analog beam index from MAC to PHY
int tdd_period_in_slots = get_tdd_period_in_slots(gNB->gNB_config.tdd_table.tdd_period.value,
fp->slots_per_frame);
for (int i=0; i<fp->slots_per_frame/tdd_period_in_slots; i++) {
memset(&gNB->common_vars.beam_id[0][i*tdd_period_in_slots*fp->symbols_per_slot],
Sched_INFO->tdd_beam_association[i],
fp->symbols_per_slot*tdd_period_in_slots*sizeof(uint8_t));
}
if (DL_req != NULL && TX_req!=NULL) if (DL_req != NULL && TX_req!=NULL)
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n", LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SLOT:%04d/%d DL_req:SFN/SLO:%04d/%d:dl_pdu:%d tx_req:SFN/SLOT:%04d/%d:pdus:%d;ul_dci %d ul_tti %d\n",
frame,slot, frame,slot,
......
...@@ -311,7 +311,6 @@ static void *nr_feptx_thread(void *param) { ...@@ -311,7 +311,6 @@ static void *nr_feptx_thread(void *param) {
(fp->symbols_per_slot)*sizeof(uint8_t)); (fp->symbols_per_slot)*sizeof(uint8_t));
} }
if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) { if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
memcpy((void*)&ru->common.txdataF_BF[0][l*fp->ofdm_symbol_size], memcpy((void*)&ru->common.txdataF_BF[0][l*fp->ofdm_symbol_size],
(void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset + l*fp->ofdm_symbol_size], (void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset + l*fp->ofdm_symbol_size],
......
...@@ -108,16 +108,6 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_ ...@@ -108,16 +108,6 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
T(T_GNB_PHY_MIB, T_INT(0) /* module ID */, T_INT(frame), T_INT(slot), T_BUFFER(bch, 3)); T(T_GNB_PHY_MIB, T_INT(0) /* module ID */, T_INT(frame), T_INT(slot), T_BUFFER(bch, 3));
} }
// Beam_id is currently used only for FR2
if (fp->freq_range==nr_FR2){
LOG_D(PHY,"slot %d, ssb_index %d, beam %d\n",slot,ssb_index,cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value);
// PHY can switch beams only once per TDD
memset(&gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot],
cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value,
fp->symbols_per_slot*get_tdd_period_in_slots(
gNB->gNB_config.tdd_table.tdd_period.value,fp->slots_per_frame)*sizeof(uint8_t));
}
nr_generate_pbch(&gNB->pbch, nr_generate_pbch(&gNB->pbch,
&ssb_pdu, &ssb_pdu,
gNB->nr_pbch_interleaver, gNB->nr_pbch_interleaver,
...@@ -148,12 +138,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB, ...@@ -148,12 +138,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) { for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t)); memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t));
} }
//clear the beam index array every frame
if (slot == 0) {
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.beam_id[aa][0],255,fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,1); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,1);
if (NFAPI_MODE == NFAPI_MONOLITHIC || NFAPI_MODE == NFAPI_MODE_PNF) { if (NFAPI_MODE == NFAPI_MONOLITHIC || NFAPI_MODE == NFAPI_MODE_PNF) {
......
...@@ -331,17 +331,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -331,17 +331,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
NR_COMMON_channels_t *cc = gNB->common_channels; NR_COMMON_channels_t *cc = gNB->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) {
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int nb_periods_per_frame = n / nr_slots_period;
// re-initialization of tdd_beam_association at beginning of frame (only for FR2)
for (int i=0; i<nb_periods_per_frame; i++)
gNB->tdd_beam_association[i] = -1;
}
start_meas(&RC.nrmac[module_idP]->eNB_scheduler); start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
......
...@@ -193,6 +193,23 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { ...@@ -193,6 +193,23 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
ifi->CC_mask |= (1<<CC_id); ifi->CC_mask |= (1<<CC_id);
} }
NR_COMMON_channels_t *cc = mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
if (UL_info->slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) {
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int nb_periods_per_frame = n / nr_slots_period;
// re-initialization of tdd_beam_association at beginning of frame (only for FR2)
// hardcoding beam index for TDD periods in a frame because of PHY limitation to switching beams.
// this beam to TDD period config would work only with PRACH config index 52 for FR2
for (int i=0; i<nb_periods_per_frame/2; i++) {
mac->tdd_beam_association[i] = i;
mac->tdd_beam_association[i+4] = i;
}
}
handle_nr_rach(UL_info); handle_nr_rach(UL_info);
...@@ -225,6 +242,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) { ...@@ -225,6 +242,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
sched_info->UL_tti_req = mac->UL_tti_req[CC_id]; sched_info->UL_tti_req = mac->UL_tti_req[CC_id];
sched_info->TX_req = &mac->TX_req[CC_id]; sched_info->TX_req = &mac->TX_req[CC_id];
sched_info->tdd_beam_association = mac->tdd_beam_association;
#ifdef DUMP_FAPI #ifdef DUMP_FAPI
dump_dl(sched_info); dump_dl(sched_info);
#endif #endif
......
...@@ -98,6 +98,8 @@ typedef struct { ...@@ -98,6 +98,8 @@ typedef struct {
nfapi_nr_ul_dci_request_t *UL_dci_req; nfapi_nr_ul_dci_request_t *UL_dci_req;
/// Pointers to DL SDUs /// Pointers to DL SDUs
nfapi_nr_tx_data_request_t *TX_req; nfapi_nr_tx_data_request_t *TX_req;
/// Analog beam index array
uint16_t *tdd_beam_association;
} NR_Sched_Rsp_t; } NR_Sched_Rsp_t;
typedef struct { typedef struct {
......
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