Commit f841174f authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge branch 'develop-nr' into nr_pbchsim

parents a780c31d ae3f0f6b
This diff is collapsed.
......@@ -1026,6 +1026,22 @@
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015103">
<class>execution</class>
<desc>polartest test cases.</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/polartest.Rel15</main_exec>
<main_exec_args>-q -s-10 -f0</main_exec_args>
<tags>polartest.test1</tags>
<search_expr_true>BLER= 0.000000</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015110">
<class>execution</class>
......
......@@ -683,7 +683,7 @@ install_asn1c_from_source(){
# better to use a given commit than a branch in case the branch
# is updated and requires modifications in the source of OAI
#git checkout velichkov_s1ap_plus_option_group
git checkout 73d6b23dcec9ab36605b4af884143824392134c1
git checkout d3aed06bb2bec7df1b5c6d0333f8c7dfc5993372
autoreconf -iv
./configure
make -j`nproc`
......
......@@ -1134,7 +1134,6 @@ int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req)
int retval = nfapi_vnf_p7_dl_config_req(p7_config, dl_config_req);
dl_config_req->dl_config_request_body.number_pdcch_ofdm_symbols = 1;
dl_config_req->dl_config_request_body.number_dci = 0;
dl_config_req->dl_config_request_body.number_pdu = 0;
dl_config_req->dl_config_request_body.number_pdsch_rnti = 0;
......
......@@ -40,6 +40,7 @@
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
......@@ -55,4 +56,4 @@
#define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04
#endif
\ No newline at end of file
#endif
......@@ -37,8 +37,8 @@ typedef struct {
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
......@@ -81,7 +81,7 @@ typedef struct {
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
......@@ -237,15 +237,34 @@ typedef struct {
typedef struct {
} fapi_nr_ul_config_pucch_pdu;
typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
typedef struct{
uint8_t aperiodicSRS_ResourceTrigger;
} fapi_nr_ul_srs_config_t;
typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
pusch_freq_hopping_t pusch_freq_hopping;
uint8_t mcs;
uint8_t tpc_command;
uint8_t ndi;
uint8_t rv;
uint8_t harq_process_nbr;
int8_t accumulated_delta_PUSCH;
int8_t absolute_delta_PUSCH;
uint8_t n_layers;
uint8_t tpmi;
uint8_t n_dmrs_cdm_groups;
uint8_t dmrs_ports[4];
uint8_t n_front_load_symb;
fapi_nr_ul_srs_config_t srs_config;
uint8_t csi_reportTriggerSize;
uint8_t maxCodeBlockGroupsPerTransportBlock;
uint8_t ptrs_dmrs_association_port;
uint8_t beta_offset_ind;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
typedef struct {
......@@ -290,17 +309,43 @@ typedef struct {
typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
} fapi_nr_dl_config_dci_pdu;
typedef struct{
uint8_t aperiodicSRS_ResourceTrigger;
} fapi_nr_dl_srs_config_t;
typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t prb_bundling_size_ind;
uint8_t rate_matching_ind;
uint8_t zp_csi_rs_trigger;
uint8_t mcs;
uint8_t rv;
uint8_t harq_pid;
uint8_t ndi;
// TODO: check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
uint8_t rv;
uint8_t tb2_mcs;
uint8_t tb2_ndi;
uint8_t tb2_rv;
uint8_t harq_process_nbr;
vrb_to_prb_mapping_t vrb_to_prb_mapping;
uint8_t dai;
double scaling_factor_S;
int8_t accumulated_delta_PUCCH;
uint8_t pucch_resource_id;
uint8_t pdsch_to_harq_feedback_time_ind;
uint8_t n_dmrs_cdm_groups;
uint8_t dmrs_ports[10];
uint8_t n_front_load_symb;
uint8_t tci_state;
fapi_nr_dl_srs_config_t srs_config;
uint8_t cbgti;
uint8_t codeBlockGroupFlushIndicator;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
......@@ -598,7 +643,7 @@ typedef struct {
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
uint16_t ptrs_frequency_density[2];
uint8_t ptrs_time_density[3];
......@@ -624,9 +669,15 @@ typedef struct {
uint8_t delta_mcs;
} fapi_nr_pusch_power_control_t;
typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t;
typedef enum {
codebook_subset_fullyAndPartialAndNonCoherent = 1,
codebook_subset_partialAndNonCoherent = 2,
codebook_subset_nonCoherent = 3} codebook_subset_t;
typedef struct {
uint16_t data_scrambling_identity;
uint8_t tx_config;
tx_config_t tx_config;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
fapi_nr_pusch_power_control_t pusch_power_control;
......@@ -637,8 +688,8 @@ typedef struct {
uint8_t pusch_aggregation_factor;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
uint8_t transform_precoder;
uint8_t codebook_subset;
transform_precoder_t transform_precoder;
codebook_subset_t codebook_subset;
uint8_t max_rank;
uint8_t rbg_size;
......
......@@ -11,6 +11,30 @@
#include "nfapi_interface.h"
#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
// Extension to the generic structures for single tlv values
typedef struct {
nfapi_tl_t tl;
int32_t value;
} nfapi_int32_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint32_t value;
} nfapi_uint32_tlv_t;
/*typedef struct {
nfapi_tl_t tl;
int64_t value;
} nfapi_int64_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint64_t value;
} nfapi_uint64_tlv_t;*/
// nFAPI enums
typedef enum {
NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0,
......@@ -159,6 +183,7 @@ typedef struct {
nfapi_uint16_tlv_t ssb_periodicity;
nfapi_uint16_tlv_t ss_pbch_block_power;
nfapi_uint16_tlv_t n_ssb_crb;
nfapi_uint16_tlv_t rmsi_pdcch_config;
} nfapi_nr_sch_config_t;
#define NFAPI_NR_SCH_CONFIG_PHYSICAL_CELL_ID_TAG 0x501E
......@@ -268,13 +293,10 @@ typedef enum {
NFAPI_NR_DL_DCI_FORMAT_2_0,
NFAPI_NR_DL_DCI_FORMAT_2_1,
NFAPI_NR_DL_DCI_FORMAT_2_2,
NFAPI_NR_DL_DCI_FORMAT_2_3
} nfapi_nr_dl_dci_format_e;
typedef enum {
NFAPI_NR_UL_DCI_FORMAT_0_0 = 0,
NFAPI_NR_UL_DCI_FORMAT_1_0,
} nfapi_nr_ul_dci_format_e;
NFAPI_NR_DL_DCI_FORMAT_2_3,
NFAPI_NR_UL_DCI_FORMAT_0_0,
NFAPI_NR_UL_DCI_FORMAT_0_1
} nfapi_nr_dci_format_e;
typedef enum {
NFAPI_NR_RNTI_new = 0,
......@@ -290,73 +312,62 @@ typedef enum {
NFAPI_NR_RNTI_TPC_PUSCH,
NFAPI_NR_RNTI_TPC_PUCCH,
NFAPI_NR_RNTI_TPC_SRS
} nfapi_nr_rnti_type_e ;
} nfapi_nr_rnti_type_e;
// P7 Sub Structures
//formats 0_0 and 0_1
typedef struct {
typedef enum {
NFAPI_NR_USS_FORMAT_0_0_AND_1_0,
NFAPI_NR_USS_FORMAT_0_1_AND_1_1,
} nfapi_nr_uss_dci_formats_e;
nfapi_tl_t tl;
typedef enum {
NFAPI_NR_SEARCH_SPACE_TYPE_COMMON=0,
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
} nfapi_nr_search_space_type_e;
uint8_t cce_idx;
uint8_t aggregation_level;
uint16_t rnti;
typedef enum {
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=0,
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
} nfapi_nr_ssb_and_cset_mux_pattern_type_e;
uint8_t dci_format; //1 bit
uint16_t frequency_domain_resource_assignment; //up to 9 bits
uint8_t time_domain_resource_assignment; //0, 1, 2, 3 or 4 bits
uint8_t frequency_hopping_flag; //1 bit
uint8_t mcs; //5 bits
uint8_t new_data_indicator; //1 bit
uint8_t redundancy_version; //2 bits
uint8_t harq_process; //4 bits
uint8_t tpc; //2 bits
uint16_t padding;
uint8_t ul_sul_indicator; //0 or 1 bit
typedef enum {
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=0,
NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED
} nfapi_nr_cce_reg_mapping_type_e;
uint8_t carrier_indicator; //0 or 3 bits
uint8_t bwp_indicator; //0, 1 or 2 bits
uint8_t downlink_assignment_index1; //1 or 2 bits
uint8_t downlink_assignment_index2; //0 or 2 bits
uint8_t srs_resource_indicator;
uint8_t precoding_information;
uint8_t antenna_ports;
uint8_t srs_request;
uint8_t csi_request;
uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits
uint8_t ptrs_dmrs_association;
uint8_t beta_offset_indicator; //0 or 2 bits
uint8_t dmrs_sequence_initialization; //0 or 1 bit
uint8_t ul_sch_indicator; //1 bit
typedef enum {
NFAPI_NR_CSET_CONFIG_MIB_SIB1=0,
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
} nfapi_nr_coreset_config_type_e;
} nfapi_nr_ul_config_dci_ul_pdu_rel15_t;
//#define NFAPI_NR_UL_CONFIG_REQUEST_DCI_UL_PDU_REL15_TAG 0x????
typedef enum {
NFAPI_NR_CSET_SAME_AS_REG_BUNDLE=0,
NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
} nfapi_nr_coreset_precoder_granularity_type_e;
// P7 Sub Structures
//formats 1_0, 1_1, 2_0, 2_1, 2_2 and 2_3
typedef struct {
nfapi_tl_t tl;
uint8_t cce_idx;
uint8_t aggregation_level;
uint16_t rnti;
uint8_t dci_format; //1 bit
uint16_t frequency_domain_resource_assignment; //up to 9 bits
uint8_t format_indicator; //1 bit
uint16_t frequency_domain_assignment; //up to 16 bits
uint8_t time_domain_assignment; // 4 bits
uint8_t frequency_hopping_flag; //1 bit
uint8_t ra_preamble_index; //6 bits
uint8_t ul_sul_indicator; //1 bit
uint8_t ss_pbch_index; //6 bits
uint8_t prach_mask_index; //4 bits
uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
uint8_t time_domain_resource_assignment; //0, 1, 2, 3 or 4 bits
uint8_t vrb_to_prb_mapping; //0 or 1 bit
uint8_t mcs; //5 bits
uint8_t new_data_indicator; //1 bit
uint8_t redundancy_version; //2 bits
uint8_t harq_process; //4 bits
uint8_t downlink_assignment_index; //0, 2 or 4 bits
uint8_t ndi; //1 bit
uint8_t rv; //2 bits
uint8_t harq_pid; //4 bits
uint8_t dai; //0, 2 or 4 bits
uint8_t dai1; //1 or 2 bits
uint8_t dai2; //0 or 2 bits
uint8_t tpc; //2 bits
uint8_t pucch_resource_indicator; //3 bits
uint8_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits
......@@ -370,13 +381,18 @@ uint8_t bwp_indicator; //0, 1 or 2 bits
uint8_t prb_bundling_size_indicator; //0 or 1 bits
uint8_t rate_matching_indicator; //0, 1 or 2 bits
uint8_t zp_csi_rs_trigger; //0, 1 or 2 bits
uint8_t antenna_ports; //4, 5 or 6 bits
uint8_t transmission_configuration_indication; //0 or 3 bits
uint8_t srs_request; //2 bits
uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits
uint8_t cbgfi; //CBG Flushing Out Information: 0 or 1 bit
uint8_t dmrs_sequence_initialization; //0 or 1 bit
uint8_t srs_resource_indicator;
uint8_t precoding_information;
uint8_t csi_request;
uint8_t ptrs_dmrs_association;
uint8_t beta_offset_indicator; //0 or 2 bits
uint8_t slot_format_indicator_count;
uint8_t *slot_format_indicators;
......@@ -386,17 +402,75 @@ uint16_t *pre_emption_indications; //14 bit
uint8_t block_number_count;
uint8_t *block_numbers;
uint8_t ul_sul_indicator; //0 or 1 bit
uint8_t antenna_ports;
uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
uint16_t padding;
} nfapi_nr_dl_config_dci_dl_pdu_rel15_t;
//#define NFAPI_NR_DL_CONFIG_REQUEST_DCI_DL_PDU_REL15_TAG 0x????
typedef struct {
nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15;
} nfapi_nr_dl_config_dci_dl_pdu;
typedef struct{
nfapi_tl_t tl;
uint8_t coreset_id;
uint64_t frequency_domain_resources;
uint8_t duration;
uint8_t cce_reg_mapping_type;
uint8_t reg_bundle_size;
uint8_t interleaver_size;
uint8_t shift_index;
uint8_t precoder_granularity;
uint8_t tci_state_id;
uint8_t tci_present_in_dci;
uint32_t dmrs_scrambling_id;
} nfapi_nr_coreset_t;
typedef struct{
nfapi_tl_t tl;
uint8_t search_space_id;
uint8_t coreset_id;
uint8_t search_space_type;
uint8_t duration;
uint8_t css_formats_0_0_and_1_0;
uint8_t css_format_2_0;
uint8_t css_format_2_1;
uint8_t css_format_2_2;
uint8_t css_format_2_3;
uint8_t uss_dci_formats;
uint8_t srs_monitoring_periodicity;
uint8_t slot_monitoring_periodicity;
uint8_t slot_monitoring_offset;
uint16_t monitoring_symbols_in_slot;
uint16_t number_of_candidates[NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS];
} nfapi_nr_search_space_t;
typedef struct {
nfapi_nr_ul_config_dci_ul_pdu_rel15_t dci_ul_pdu_rel15;
} nfapi_nr_ul_config_dci_ul_pdu;
nfapi_tl_t tl;
uint8_t rnti;
uint8_t rnti_type;
uint8_t dci_format;
uint8_t config_type;
uint8_t search_space_type;
uint8_t aggregation_level;
uint8_t n_rb;
uint8_t n_symb;
uint8_t rb_offset;
uint8_t cr_mapping_type;
uint8_t reg_bundle_size;
uint8_t interleaver_size;
uint8_t shift_index;
uint8_t mux_pattern;
uint8_t precoder_granularity;
uint8_t first_slot;
uint8_t first_symbol;
uint8_t nb_ss_sets_per_slot;
uint8_t nb_slots;
uint8_t sfn_mod2;
uint16_t scrambling_id;
nfapi_bf_vector_t bf_vector;
} nfapi_nr_dl_config_pdcch_parameters_rel15_t;
typedef struct {
nfapi_tl_t tl;
......@@ -411,13 +485,20 @@ typedef struct {
} nfapi_nr_dl_config_bch_pdu;
typedef struct {
} nfapi_nr_dl_config_dlsch_pdu;
nfapi_tl_t tl;
nfapi_nr_search_space_t sib1searchSpace;
nfapi_nr_coreset_t sib1ControlResourceSets;
nfapi_nr_search_space_t sibssearchSpace;
nfapi_nr_coreset_t sibsControlResourceSets;
nfapi_nr_search_space_t ra_SearchSpace;
nfapi_nr_coreset_t ra_ControlResourceSets;
}nfapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
nfapi_tl_t tl;
nfapi_nr_SearchSpace_t pagingSearchSpace;
} nfapi_nr_dl_config_pch_pdu;
nfapi_nr_search_space_t pagingSearchSpace;
nfapi_nr_coreset_t pagingControlResourceSets;
}nfapi_nr_dl_config_pch_pdu_rel15_t;
typedef struct {
......@@ -431,26 +512,31 @@ typedef struct {
} nfapi_nr_dl_config_ndlsch_pdu;
typedef struct {
nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params_rel15;
} nfapi_nr_dl_config_dci_dl_pdu;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu;
nfapi_nr_ul_config_dci_ul_pdu dci_ul_pdu;
nfapi_nr_dl_config_bch_pdu bch_pdu;
nfapi_nr_dl_config_dlsch_pdu dlsch_pdu;
nfapi_nr_dl_config_pch_pdu pch_pdu;
nfapi_nr_dl_config_nbch_pdu nbch_pdu;
nfapi_nr_dl_config_npdcch_pdu npdcch_pdu;
nfapi_nr_dl_config_ndlsch_pdu ndlsch_pdu;
nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu;
nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15;
nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15;
//nfapi_nr_dl_config_nbch_pdu_rel15_t nbch_pdu_rel15;
//nfapi_nr_dl_config_npdcch_pdu_rel15_t npdcch_pdu_rel15;
//nfapi_nr_dl_config_ndlsch_pdu_rel15_t ndlsch_pdu_rel15;
};
} nfapi_nr_dl_config_request_pdu_t;
typedef struct {
nfapi_tl_t tl;
uint8_t number_pdcch_ofdm_symbols;
uint8_t number_dci;
uint16_t number_pdu;
uint8_t number_pdu;
uint8_t number_pdsch_rnti;
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu_list;
} nfapi_nr_dl_config_request_body_t;
......
This diff is collapsed.
......@@ -355,8 +355,16 @@ based on 3GPP UMTS/LTE specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits
*/
unsigned int crc24b (unsigned char * inptr, int bitlen);
uint32_t crc24b (uint8_t *inPtr, int32_t bitlen);
/*!\fn uint32_t crc24c(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 24-bit crc ('c' variant for transport-block segments)
based on 3GPP Rel 15 specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits
*/
uint32_t crc24c (uint8_t *inPtr, int32_t bitlen);
/*!\fn uint32_t crc16(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 16-bit crc based on 3GPP UMTS specifications.
@param inPtr Pointer to input byte stream
......@@ -440,4 +448,20 @@ decoder_if_t phy_threegpplte_turbo_decoder;
decoder_if_t phy_threegpplte_turbo_decoder8;
decoder_if_t phy_threegpplte_turbo_decoder16;
int32_t nr_segmentation(unsigned char *input_buffer,
unsigned char **output_buffers,
unsigned int B,
unsigned int *C,
unsigned int *Kplus,
unsigned int *Kminus,
unsigned int *Zout,
unsigned int *F);
uint32_t nr_compute_tbs(uint8_t mcs,
uint16_t nb_rb,
uint16_t nb_symb_sch,
uint8_t nb_re_dmrs,
uint16_t length_dmrs,
uint8_t Nl);
#endif
......@@ -35,9 +35,12 @@
/*ref 36-212 v8.6.0 , pp 8-9 */
/* the highest degree is set by default */
unsigned int poly24a = 0x864cfb00; //1000 0110 0100 1100 1111 1011 D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011 D^24 + D^23 + D^6 + D^5 + D + 1
uint32_t poly24c = 0xB2B11700; //101100101011000100010111
unsigned int poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011
// D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011
// D^24 + D^23 + D^6 + D^5 + D + 1
unsigned int poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111
// D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
unsigned int poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1
unsigned int poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1
unsigned int poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1
......@@ -52,10 +55,11 @@ For initialization && verification purposes,
The first bit is in the MSB of each byte
*********************************************************/
unsigned int
crcbit (unsigned char * inputptr, int octetlen, unsigned int poly)
unsigned int crcbit (unsigned char * inputptr,
int octetlen,
unsigned int poly)
{
unsigned int i, crc = 0, c;
unsigned int i, crc = 0, c;
while (octetlen-- > 0) {
c = (*inputptr++) << 24;
......@@ -78,19 +82,21 @@ crcbit (unsigned char * inputptr, int octetlen, unsigned int poly)
crc table initialization
*********************************************************/
static unsigned int crc24aTable[256];
static unsigned int crc24bTable[256];
static unsigned int crc24aTable[256];
static unsigned int crc24bTable[256];
static unsigned int crc24cTable[256];
static unsigned short crc16Table[256];
static unsigned short crc12Table[256];
static unsigned char crc8Table[256];
void crcTableInit (void)
{
unsigned char c = 0;
unsigned char c = 0;
do {
crc24aTable[c] = crcbit (&c, 1, poly24a);
crc24bTable[c] = crcbit (&c, 1, poly24b);
crc24cTable[c] = crcbit (&c, 1, poly24c);
crc16Table[c] = (unsigned short) (crcbit (&c, 1, poly16) >> 16);
crc12Table[c] = (unsigned short) (crcbit (&c, 1, poly12) >> 16);
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
......@@ -114,8 +120,8 @@ Byte by byte implementations,
assuming initial byte is 0 padded (in MSB) if necessary
*********************************************************/
unsigned int
crc24a (unsigned char * inptr, int bitlen)
unsigned int crc24a (unsigned char * inptr,
int bitlen)
{
int octetlen, resbit;
......@@ -134,11 +140,11 @@ crc24a (unsigned char * inptr, int bitlen)
return crc;
}
unsigned int crc24b (unsigned char * inptr, int bitlen)
unsigned int crc24b (unsigned char * inptr,
int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
......@@ -153,6 +159,27 @@ unsigned int crc24b (unsigned char * inptr, int bitlen)
return crc;
}
unsigned int crc24c (unsigned char * inptr,
int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0) {
/*#ifdef DEBUG_CRC24C
printf("crc24c: in %x => crc %x (%x)\n",crc,*inptr,crc24cTable[(*inptr) ^ (crc >> 24)]);
#endif*/
crc = (crc << 8) ^ crc24cTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24cTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
unsigned int
crc16 (unsigned char * inptr, int bitlen)
{
......@@ -228,48 +255,6 @@ unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table
return crc;
}
void nr_crc_computation(uint8_t* input, uint8_t* output, uint16_t payloadBits, uint16_t crcParityBits, uint32_t* crc256Table)
{
//Create payload in bit
uint8_t* input2 = (uint8_t*)malloc(payloadBits); //divided by 8 (in bits)
uint8_t mask = 128; // 10000000
for(uint8_t ind=0; ind<(payloadBits/8); ind++)
{
input2[ind]=0;
for(uint8_t ind2=0; ind2<8; ind2++)
{
if(input[8*ind+ind2])
{
input2[ind] = input2[ind] | mask;
}
mask= mask >> 1;
}
mask=128;
}
//crcTable256Init(poly);
unsigned int crcBits;
crcBits = crcPayload(input2, payloadBits, crc256Table);
//create crc in byte
unsigned int mask2=0x80000000; //100...
for(uint8_t ind=0; ind<crcParityBits; ind++)
{
if(crcBits & mask2)
output[ind]=1;
else
output[ind]=0;
mask2 = mask2 >> 1;
}
}
#ifdef DEBUG_CRC
......
......@@ -21,17 +21,38 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_byte2bit(uint8_t *array, uint8_t arraySize, uint8_t *bitArray){//First 2 parameters are in bytes.
void nr_bit2byte_uint32_8_t(uint32_t *in, uint16_t arraySize, uint8_t *out) {
uint8_t arrayInd = ceil(arraySize / 32.0);
for (int i = 0; i < (arrayInd-1); i++) {
for (int j = 0; j < 32; j++) {
out[j+(i*32)] = (in[i] >> j) & 1;
}
}
for (int j = 0; j < arraySize - ((arrayInd-1) * 32); j++) out[j + ((arrayInd-1) * 32)] = (in[(arrayInd-1)] >> j) & 1;
}
for (int i=0; i<arraySize; i++){
bitArray[(7+(i*8))] = ( array[i]>>0 & 0x01);
bitArray[(6+(i*8))] = ( array[i]>>1 & 0x01);
bitArray[(5+(i*8))] = ( array[i]>>2 & 0x01);
bitArray[(4+(i*8))] = ( array[i]>>3 & 0x01);
bitArray[(3+(i*8))] = ( array[i]>>4 & 0x01);
bitArray[(2+(i*8))] = ( array[i]>>5 & 0x01);
bitArray[(1+(i*8))] = ( array[i]>>6 & 0x01);
bitArray[ (i*8) ] = ( array[i]>>7 & 0x01);
void nr_byte2bit_uint8_32_t(uint8_t *in, uint16_t arraySize, uint32_t *out) {
uint8_t arrayInd = ceil(arraySize / 32.0);
for (int i = 0; i < arrayInd; i++) {
out[i]=0;
for (int j = 31; j > 0; j--) {
out[i]|=in[(i*32)+j];
out[i]<<=1;
}
out[i]|=in[(i*32)];
}
}
void nr_crc_bit2bit_uint32_8_t(uint32_t *in, uint16_t arraySize, uint8_t *out) {
out[0]=0xff;
out[1]=0xff;
out[2]=0xff;
uint8_t arrayInd = ceil(arraySize / 32.0);
for (int i = 0; i < arrayInd; i++) {
out[3+i*4] = ((in[i] & (0x0000000f))<<4) | ((in[i] & (0x000000f0))>>4);
out[4+i*4] = (((in[i] & (0x00000f00))<<4) | ((in[i] & (0x0000f000))>>4))>>8;
out[5+i*4] = (((in[i] & (0x000f0000))<<4) | ((in[i] & (0x00f00000))>>4))>>16;
out[6+i*4] = (((in[i] & (0x0f000000))<<4) | ((in[i] & (0xf0000000))>>4))>>24;
}
}
......@@ -21,132 +21,7 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
/*
// ----- New implementation ----
uint32_t poly6 = 0x84000000; // 10000100000... -> D^6+D^5+1
uint32_t poly11 = 0xc4200000; //11000100001000... -> D^11+D^10+D^9+D^5+1
uint32_t poly16 = 0x10210000; //00100000010000100... - > D^16+D^12+D^5+1
uint32_t poly24a = 0x864cfb00; //100001100100110011111011 -> D^24+D^23+D^18+D^17+D^14+D^11+D^10+D^7+D^6+D^5+D^4+D^3+D+1
uint32_t poly24b = 0x80006300; //100000000000000001100011 -> D^24+D^23+D^6+D^5+D+1
uint32_t poly24c = 0xB2B11700; //101100101011000100010111 -> D^24...
//static unsigned int crc256Table[256];
void nr_crc_computation(uint8_t* input, uint8_t* output, uint16_t payloadBits, uint16_t crcParityBits, uint32_t* crc256Table)
{
//Create payload in bit
uint8_t* input2 = (uint8_t*)malloc(payloadBits); //divided by 8 (in bits)
uint8_t mask = 128; // 10000000
for(uint8_t ind=0; ind<(payloadBits/8); ind++)
{
input2[ind]=0;
for(uint8_t ind2=0; ind2<8; ind2++)
{
if(input[8*ind+ind2])
{
input2[ind] = input2[ind] | mask;
}
mask= mask >> 1;
}
mask=128;
}
//crcTable256Init(poly);
unsigned int crcBits;
crcBits = crcPayload(input2, payloadBits, crc256Table);
//create crc in byte
unsigned int mask2=0x80000000; //100...
output = (uint8_t*)malloc(sizeof(uint8_t)*crcParityBits);
for(uint8_t ind=0; ind<crcParityBits; ind++)
{
if(crcBits & mask2)
output[ind]=1;
else
output[ind]=0;
mask2 = mask2 >> 1;
}
}
unsigned int crcbit (unsigned char* inputptr, int octetlen, unsigned int poly)
{
unsigned int i, crc = 0, c;
while (octetlen-- > 0) {
c = (*inputptr++) << 24;
for (i = 8; i != 0; i--) {
if ((1 << 31) & (c ^ crc))
crc = (crc << 1) ^ poly;
else
crc <<= 1;
c <<= 1;
}
}
return crc;
}
void crcTableInit (void)
{
unsigned char c = 0;
do {
crc6Table[c] = crcbit(&c, 1, poly6);
crc11Table[c]= crcbit(&c, 1, poly11);
crc16Table[c] =crcbit(&c, 1, poly16);
crc24aTable[c]=crcbit(&c, 1, poly24a);
crc24bTable[c]=crcbit(&c, 1, poly24b);
crc24cTable[c]=crcbit(&c, 1, poly24c);
} while (++c);
}
void crcTable256Init (uint32_t poly, uint32_t* crc256Table)
{
unsigned char c = 0;
// crc256Table = malloc(sizeof(uint32_t)*256);
do {
crc256Table[c] = crcbit(&c, 1, poly);
// crc6Table[c] = crcbit(&c, 1, poly6);
// crc11Table[c]= crcbit(&c, 1, poly11);
// crc16Table[c] =crcbit(&c, 1, poly16);
// crc24aTable[c]=crcbit(&c, 1, poly24a);
// crc24bTable[c]=crcbit(&c, 1, poly24b);
// crc24cTable[c]=crcbit(&c, 1, poly24c);
} while (++c);
//return crc256Table;
}
unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen/8; // Change in bytes
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc256Table[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
{
crc = (crc << resbit) ^ crc256Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
return crc;
}
*/
// ----- Old implementation ----
uint8_t **crc24c_generator_matrix(uint16_t payloadSizeBits){
......
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_channel_interleaver_pattern(uint16_t *cip, uint8_t I_BIL, uint16_t E){
if (I_BIL == 1) {
uint16_t T=0, k;
while( ((T/2)*(T+1)) < E ) T++;
int16_t **v = malloc(T * sizeof(*v));
for (int i = 0; i <= T-1; i++) v[i] = malloc((T-i) * sizeof(*(v[i])));
k=0;
for (int i = 0; i <= T-1; i++) {
for (int j = 0; j <= (T-1)-i; j++) {
if (k<E) {
v[i][j] = k;
} else {
v[i][j] = (-1);
}
k++;
}
}
k=0;
for (int j = 0; j <= T-1; j++) {
for (int i = 0; i <= (T-1)-j; i++) {
if ( v[i][j] != (-1) ) {
cip[k]=v[i][j];
k++;
}
}
}
for (int i = 0; i <= T-1; i++) free(v[i]);
free(v);
} else {
for (int i=0; i<=E-1; i++) cip[i]=i;
}
}
......@@ -33,10 +33,14 @@
#ifndef __NR_POLAR_DCI_DEFS__H__
#define __NR_POLAR_DCI_DEFS__H__
#define NR_POLAR_DCI_MESSAGE_TYPE 1 //int8_t
#define NR_POLAR_DCI_CRC_PARITY_BITS 24
#define NR_POLAR_DCI_CRC_ERROR_CORRECTION_BITS 3
//Sec. 7.3.3: Channel Coding
#define NR_POLAR_DCI_N_MAX 9 //uint8_t
#define NR_POLAR_DCI_I_IL 1 //uint8_t
//#define NR_POLAR_DCI_I_SEG 0 //uint8_t
#define NR_POLAR_DCI_I_SEG 0 //uint8_t
#define NR_POLAR_DCI_N_PC 0 //uint8_t
#define NR_POLAR_DCI_N_PC_WM 0 //uint8_t
......
......@@ -19,6 +19,17 @@
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_interleaving_pattern.c
* \brief
* \author Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \note
* \warning
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
void nr_polar_interleaving_pattern(uint16_t K, uint8_t I_IL, uint16_t *PI_k_){
......
......@@ -19,6 +19,17 @@
* contact@openairinterface.org
*/
/*!\file PHY/CODING/nrPolar_tools/nr_polar_kronecker_power_matrices.c
* \brief
* \author Turker Yilmaz
* \date 2018
* \version 0.1
* \company EURECOM
* \email turker.yilmaz@eurecom.fr
* \note
* \warning
*/
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
uint8_t (*const(G_N_1[])) = {
This diff is collapsed.
This diff is collapsed.
......@@ -24,8 +24,8 @@
author: Hongzhi WANG (TCL)
date: 12.09.2017
*/
#include "PHY/defs.h"
#include "SCHED/extern.h"
#include "PHY/defs_nr_UE.h"
//#include "SCHED/extern.h"
//#define DEBUG_SEGMENTATION
......
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment