2020.2 QDMA Linux Driver Release

2020.2 QDMA Linux Driver Release

QDMA/linux-kernel/Makefile

@@ -71,7 +71,7 @@ driver:
 	@echo "#######################";
 	@echo "####  Driver       ####";
 	@echo "#######################";
-	$(MAKE) $(MODULE) -C driver
+	$(MAKE) $(MODULE) -C driver modulesymfile=$(srcdir)/driver/src/Module.symvers
 
 .PHONY: post
 post:

QDMA/linux-kernel/README

-docs/README

QDMA/linux-kernel/RELEASE

 RELEASE: 2020.1 Patch 
 =====================
 
-This release is validated on QDMA4.0 2020.1 Patch based example design
+This release is validated on QDMA4.0 2020.2 based example design and QDMA3.1 2020.2 based example design.
 
 SUPPORTED FEATURES:
 ===================
@@ -82,10 +82,18 @@ SUPPORTED FEATURES:
 - Resolved HW errors observed with QDMA4.0 MM only design
 - Addressed VF performance issues.
 
+2020.2 Updates
+--------------
+- Added support for detailed register dump
+- Added support for post processing HW error messages
+- Added support for Debug mode and Internal only mode
+- Added support for Versal PDI programming through keyhole interface
+
 KNOWN ISSUES:
 =============
 - In interrupt mode, Sometimes completions are not received when C2H PIDX updates are held for 64 descriptors
-- On QDMA4.0 2020.1 design, HW error observed during the probe of the VFs
+- On QDMA4.0 2020.1 design onwards, HW error observed during the probe of the VFs
+- With 2020.2 QDMA4.0 design, ST Performance design has performance drop for higher packet sizes
 
 DRIVER LIMITATIONS:
 ===================

QDMA/linux-kernel/apps/dma-ctl/cmd_parse.c

@@ -209,17 +209,17 @@ static void __attribute__((noreturn)) usage(FILE *fp)
 		"\t\tq add idx <N> [mode <mm|st>] [dir <h2c|c2h|bi|cmpt>] - add a queue\n"
 		"\t\t                                                  *mode default to mm\n"
 		"\t\t                                                  *dir default to h2c\n"
-	        "\t\tq add list <start_idx> <num_Qs> [mode <mm|st>] [dir <h2c|c2h|bi|cmpt>] - add multiple queues at once\n"
+			"\t\tq add list <start_idx> <num_Qs> [mode <mm|st>] [dir <h2c|c2h|bi|cmpt>] - add multiple queues at once\n"
 	        "\t\tq start idx <N> [dir <h2c|c2h|bi|cmpt>] [idx_ringsz <0:15>] [idx_bufsz <0:15>] [idx_tmr <0:15>]\n"
-			"                                    [idx_cntr <0:15>] [trigmode <every|usr_cnt|usr|usr_tmr|dis>] [cmptsz <0|1|2|3>] [sw_desc_sz <3>]\n"
+		   "                                    [idx_cntr <0:15>] [trigmode <every|usr_cnt|usr|usr_tmr|dis>] [cmptsz <0|1|2|3>] [sw_desc_sz <3>]\n"
 	        "                                    [mm_chn <0|1>] [desc_bypass_en] [pfetch_en] [pfetch_bypass_en] [dis_cmpl_status]\n"
 	        "                                    [dis_cmpl_status_acc] [dis_cmpl_status_pend_chk] [c2h_udd_en]\n"
-	        "                                    [cmpl_ovf_dis] [fetch_credit  <h2c|c2h|bi|none>] [dis_cmpl_status] [c2h_cmpl_intr_en] - start a single queue\n"
+			"                                    [cmpl_ovf_dis] [fetch_credit  <h2c|c2h|bi|none>] [dis_cmpl_status] [c2h_cmpl_intr_en] [aperture_sz <aperture size power of 2>]- start a single queue\n"
 	        "\t\tq start list <start_idx> <num_Qs> [dir <h2c|c2h|bi|cmpt>] [idx_bufsz <0:15>] [idx_tmr <0:15>]\n"
 			"                                    [idx_cntr <0:15>] [trigmode <every|usr_cnt|usr|usr_tmr|dis>] [cmptsz <0|1|2|3>] [sw_desc_sz <3>]\n"
 	        "                                    [mm_chn <0|1>] [desc_bypass_en] [pfetch_en] [pfetch_bypass_en] [dis_cmpl_status]\n"
 	        "                                    [dis_cmpl_status_acc] [dis_cmpl_status_pend_chk] [cmpl_ovf_dis]\n"
-	        "                                    [fetch_credit <h2c|c2h|bi|none>] [dis_cmpl_status] [c2h_cmpl_intr_en] - start multiple queues at once\n"
+			"                                    [fetch_credit <h2c|c2h|bi|none>] [dis_cmpl_status] [c2h_cmpl_intr_en] [aperture_sz <aperture size power of 2>]- start multiple queues at once\n"
 	        "\t\tq stop idx <N> dir [<h2c|c2h|bi|cmpt>] - stop a single queue\n"
 	        "\t\tq stop list <start_idx> <num_Qs> dir [<h2c|c2h|bi|cmpt>] - stop list of queues at once\n"
 	        "\t\tq del idx <N> dir [<h2c|c2h|bi|cmpt>] - delete a queue\n"
@@ -240,7 +240,8 @@ static void __attribute__((noreturn)) usage(FILE *fp)
 		"\t\treg dump [dmap <Q> <N>]          - register dump. Only dump dmap registers if dmap is specified.\n"
 		"\t\t                                   specify dmap range to dump: Q=queue, N=num of queues\n"
 		"\t\treg read [bar <N>] <addr>        - read a register\n"
-		"\t\treg write [bar <N>] <addr> <val> - write a register\n");
+		"\t\treg write [bar <N>] <addr> <val> - write a register\n"
+		"\t\treg info bar <N> <addr> [num_regs <M>] - dump detailed fields information of a register\n");
 	fprintf(fp,
 		"\t\tintring dump vector <N> <start_idx> <end_idx> - interrupt ring dump for vector number <N>  \n"
 		"\t\t                                                for intrrupt entries :<start_idx> --- <end_idx>\n");
@@ -326,6 +327,7 @@ static int validate_regcmd(enum xnl_op_t qcmd, struct xcmd_reg	*regcmd)
 		case XNL_CMD_REG_DUMP:
 			break;
 		case XNL_CMD_REG_RD:
+		case XNL_CMD_REG_INFO_READ:
 		case XNL_CMD_REG_WRT:
 			if ((regcmd->bar != 0) && (regcmd->bar != 2)) {
 				printf("dmactl: bar %u number out of range\n",
@@ -410,6 +412,31 @@ static int parse_reg_cmd(int argc, char *argv[], int i, struct xcmd_info *xcmd)
 		regcmd->sflags |= XCMD_REG_F_VAL_SET;
 
 		i++;
+	} else if (!strcmp(argv[i], "info")) {
+		xcmd->op = XNL_CMD_REG_INFO_READ;
+		get_next_arg(argc, argv, &i);
+		if (!strcmp(argv[i], "bar")) {
+			rv = next_arg_read_int(argc, argv, &i, &regcmd->bar);
+			if (rv < 0)
+				return rv;
+			regcmd->sflags |= XCMD_REG_F_BAR_SET;
+			get_next_arg(argc, argv, &i);
+		}
+		rv = arg_read_int(argv[i], &xcmd->req.reg.reg);
+		if (rv < 0)
+			return rv;
+		regcmd->sflags |= XCMD_REG_F_REG_SET;
+		i++;
+
+		if (i < argc) {
+			if (!strcmp(argv[i], "num_regs")) {
+				rv = next_arg_read_int(argc, argv, &i, &regcmd->range_end);
+				if (rv < 0)
+					return rv;
+			}
+		} else
+			regcmd->range_end = 1;
+		i++;
 	}
 
 	args_valid = validate_regcmd(xcmd->op, regcmd);
@@ -856,6 +883,19 @@ static int read_qparm(int argc, char *argv[], int i, struct xcmd_q_parm *qparm,
 		} else if (!strcmp(argv[i], "ping_pong_en")) {
 			f_arg_set |= 1 << QPARM_PING_PONG_EN;
 			i++;
+		} else if (!strcmp(argv[i], "aperture_sz")) {
+			rv = next_arg_read_int(argc, argv, &i, &v1);
+			if (rv < 0)
+				return rv;
+
+			if(((v1 != 0) && ((v1 &(v1 - 1))))) {
+				warnx("Error: Keyhole aperture should be a size of 2\n");
+				return -EINVAL;
+			}
+
+			f_arg_set |= 1 << QPARM_KEYHOLE_EN;
+			qparm->aperture_sz = v1;
+			i++;
 		} else if (!strcmp(argv[i], "pfetch_bypass_en")) {
 			qparm->flags |= XNL_F_PFETCH_BYPASS_EN;
 			i++;

QDMA/linux-kernel/apps/dma-ctl/main.c

@@ -25,6 +25,7 @@ static int (*xnl_proc_fn[XNL_CMD_MAX])(struct xcmd_info *xcmd) = {
 	qdma_reg_dump,           /* XNL_CMD_REG_DUMP */
 	qdma_reg_read,           /* XNL_CMD_REG_RD */
 	qdma_reg_write,          /* XNL_CMD_REG_WRT */
+	qdma_reg_info_read,      /* XNL_CMD_REG_INFO_READ */
 	qdma_dev_q_list_dump,    /* XNL_CMD_Q_LIST */
 	qdma_q_add,              /* XNL_CMD_Q_ADD */
 	qdma_q_start,            /* XNL_CMD_Q_START */
@@ -45,6 +46,12 @@ static int (*xnl_proc_fn[XNL_CMD_MAX])(struct xcmd_info *xcmd) = {
 	NULL                     /* XNL_CMD_GET_Q_STATE */
 };
 
+static const char *desc_engine_mode[] = {
+	"Internal and Bypass mode",
+	"Bypass only mode",
+	"Inernal only mode"
+};
+
 static void dump_dev_cap(struct xcmd_info *xcmd)
 {
 	printf("%s", xcmd->resp.cap.version_str);
@@ -56,7 +63,15 @@ static void dump_dev_cap(struct xcmd_info *xcmd)
 	printf("ST enabled                             : %s\n",	xcmd->resp.cap.st_en ? "yes":"no");
 	printf("MM enabled                             : %s\n", xcmd->resp.cap.mm_en ? "yes":"no");
 	printf("Mailbox enabled                        : %s\n", xcmd->resp.cap.mailbox_en ? "yes":"no");
-	printf("MM completion enabled                  : %s\n\n", xcmd->resp.cap.mm_cmpt_en ? "yes":"no");
+	printf("MM completion enabled                  : %s\n", xcmd->resp.cap.mm_cmpt_en ? "yes":"no");
+	printf("Debug Mode enabled                     : %s\n", xcmd->resp.cap.debug_mode ? "yes":"no");
+
+	if (xcmd->resp.cap.desc_eng_mode < sizeof(desc_engine_mode) / sizeof(desc_engine_mode[0])) {
+		printf("Desc Engine Mode                       : %s\n",
+			   desc_engine_mode[xcmd->resp.cap.desc_eng_mode]);
+	}else {
+		printf("Desc Engine Mode                       : INVALID\n");
+	}
 }
 
 static void dump_dev_info(struct xcmd_info *xcmd)
@@ -69,7 +84,7 @@ static void dump_dev_info(struct xcmd_info *xcmd)
 	printf("HW q base                              : %u\n", xcmd->resp.dev_info.qbase);
 	printf("Max queues                             : %u\n",	xcmd->resp.dev_info.qmax);
 	printf("Config bar                             : %u\n", xcmd->resp.dev_info.config_bar);
-	printf("User bar                               : %u\n", xcmd->resp.dev_info.user_bar);
+	printf("AXI Master Lite bar                    : %u\n", xcmd->resp.dev_info.user_bar);
 }
 
 static void dump_dev_stat(struct xcmd_info *xcmd)
@@ -155,6 +170,8 @@ void xnl_dump_cmd_resp(struct xcmd_info *xcmd)
 	case XNL_CMD_GLOBAL_CSR:
 			dump_dev_global_csr(xcmd);
 		break;
+	case XNL_CMD_REG_INFO_READ:
+		break;
 	default:
 		break;
 	}

QDMA/linux-kernel/apps/dma-ctl/version.h

@@ -13,7 +13,7 @@
 #define __DMA_CTL_VERSION_H
 
 #define PROGNAME "dma-ctl"
-#define VERSION "2020.1.0"
+#define VERSION "2020.2.0"
 #define COPYRIGHT "Copyright (c) 2018-2020 Xilinx Inc."
 
 #endif

QDMA/linux-kernel/apps/dma-from-device/dma_from_device.c

@@ -33,6 +33,9 @@
 #define SIZE_DEFAULT (32)
 #define COUNT_DEFAULT (1)
 
+
+
+
 static struct option const long_opts[] = {
 	{"device", required_argument, NULL, 'd'},
 	{"address", required_argument, NULL, 'a'},
@@ -81,7 +84,6 @@ static void usage(const char *name)
 	i++;
 	fprintf(stdout, "  -%c (--%s) verbose output\n",
 		long_opts[i].val, long_opts[i].name);
-	i++;
 }
 
 int main(int argc, char *argv[])
@@ -155,9 +157,9 @@ static int test_dma(char *devname, uint64_t addr, uint64_t size,
 	struct timespec ts_start, ts_end;
 	int out_fd = -1;
 	int fpga_fd = open(devname, O_RDWR | O_NONBLOCK);
-	long total_time = 0;
-	float result;
-	float avg_time = 0;
+	double total_time = 0;
+	double result;
+	double avg_time = 0;
 
 	if (fpga_fd < 0) {
                 fprintf(stderr, "unable to open device %s, %d.\n",
@@ -200,11 +202,11 @@ static int test_dma(char *devname, uint64_t addr, uint64_t size,
 
 		/* subtract the start time from the end time */
 		timespec_sub(&ts_end, &ts_start);
-		total_time += ts_end.tv_nsec;
+		total_time += (ts_end.tv_sec + ((double)ts_end.tv_nsec/NSEC_DIV));
 		/* a bit less accurate but side-effects are accounted for */
 		if (verbose)
 		fprintf(stdout,
-			"#%lu: CLOCK_MONOTONIC %ld.%09ld sec. read %ld bytes\n",
+			"#%lu: CLOCK_MONOTONIC %ld.%09ld sec. read %lu bytes\n",
 			i, ts_end.tv_sec, ts_end.tv_nsec, size);
 
 		/* file argument given? */
@@ -215,12 +217,13 @@ static int test_dma(char *devname, uint64_t addr, uint64_t size,
 				goto out;
 		}
 	}
-	avg_time = (float)total_time/(float)count;
-	result = ((float)size)*1000/avg_time;
+	avg_time = (double)total_time/(double)count;
+	result = ((double)size)/avg_time;
 	if (verbose)
-	printf("** Avg time device %s, total time %ld nsec, avg_time = %f, size = %lu, BW = %f \n",
+	printf("** Avg time device %s, total time %f nsec, avg_time = %f, size = %lu, BW = %f bytes/sec\n",
 		devname, total_time, avg_time, size, result);
-	printf("** Average BW = %lu, %f\n", size, result);
+	dump_throughput_result(size, result);
+
 	rc = 0;
 
 out:

QDMA/linux-kernel/apps/dma-from-device/version.h

@@ -13,7 +13,7 @@
 #define __DMA_FROM_DEVICE_VERSION_H
 
 #define PROGNAME "dma-from-device"
-#define VERSION "2020.1.0"
+#define VERSION "2020.2.0"
 #define COPYRIGHT "Copyright (c) 2018-2020 Xilinx Inc."
 
 #endif

QDMA/linux-kernel/apps/dma-latency/dmalat.c

@@ -41,7 +41,6 @@ static void usage(const char *name)
 
 	fprintf(stdout, "  -%c (--%s) config file that has configration for IO\n",
 		long_opts[i].val, long_opts[i].name);
-	i++;
 }
 
 static unsigned int num_trailing_blanks(char *word)

QDMA/linux-kernel/apps/dma-latency/version.h

@@ -13,7 +13,7 @@
 #define __DMA_LATENCY_VERSION_H
 
 #define PROGNAME "dma-latency"
-#define VERSION "2020.1.0"
+#define VERSION "2020.2.0"
 #define COPYRIGHT "Copyright (c) 2018-2020 Xilinx Inc."
 
 #endif

QDMA/linux-kernel/apps/dma-perf/dmaperf.c

@@ -60,7 +60,6 @@ static void usage(const char *name)
 
 	fprintf(stdout, "  -%c (--%s) config file that has configration for IO\n",
 		long_opts[i].val, long_opts[i].name);
-	i++;
 }
 
 static unsigned int num_trailing_blanks(char *word)
@@ -1168,7 +1167,7 @@ static int thread_exit_check(struct io_info *_info) {
 			usleep(100);
 			return 1;
 		} else {
-		    printf("Exit Check: tid =%d, req_sbmitted=%u req_completed=%u dir=%s, intime=%u loop_count=%d, \n",
+		    printf("Exit Check: tid =%u, req_sbmitted=%u req_completed=%u dir=%s, intime=%u loop_count=%d, \n",
 			   _info->thread_id, _info->num_req_submitted,
 			   _info->num_req_completed,_info->dir == Q_DIR_H2C ? "H2C": "C2H",
 			   _info->num_req_completed_in_time,  _info->exit_check_count);
@@ -1355,6 +1354,7 @@ static int qdma_prepare_q_start(struct xcmd_info *xcmd,
 		unsigned char is_vf, struct io_info *info)
 {
 	struct xcmd_q_parm *qparm;
+	unsigned int f_arg_set = 0;
 
 
 	if (!xcmd) {
@@ -1369,6 +1369,7 @@ static int qdma_prepare_q_start(struct xcmd_info *xcmd,
 	xcmd->log_msg_dump = xnl_dump_response;
 	qparm->idx = info->qid;
 	qparm->num_q = 1;
+	f_arg_set |= 1 << QPARM_IDX;
 	qparm->fetch_credit = Q_ENABLE_C2H_FETCH_CREDIT;
 
 	if (info->mode == Q_MODE_MM)
@@ -1377,7 +1378,7 @@ static int qdma_prepare_q_start(struct xcmd_info *xcmd,
 		qparm->flags |= XNL_F_QMODE_ST;
 	else
 		return -EINVAL;
-
+	f_arg_set |= 1 << QPARM_MODE;
 	if (info->dir == Q_DIR_H2C)
 		qparm->flags |= XNL_F_QDIR_H2C;
 	else if (info->dir == Q_DIR_C2H)
@@ -1385,15 +1386,19 @@ static int qdma_prepare_q_start(struct xcmd_info *xcmd,
 	else
 		return -EINVAL;
 
+	f_arg_set |= 1 << QPARM_DIR;
 	qparm->qrngsz_idx = info->idx_rngsz;
-
+	f_arg_set |= 1 << QPARM_RNGSZ_IDX;
 	if ((info->dir == Q_DIR_C2H) && (info->mode == Q_MODE_ST)) {
 		if (cmptsz)
 			qparm->cmpt_entry_size = info->cmptsz;
 		else
 			qparm->cmpt_entry_size = XNL_ST_C2H_CMPT_DESC_SIZE_8B;
+		f_arg_set |= 1 << QPARM_CMPTSZ;
 		qparm->cmpt_tmr_idx = info->idx_tmr;
+		f_arg_set |= 1 << QPARM_CMPT_TMR_IDX;
 		qparm->cmpt_cntr_idx = info->idx_cnt;
+		f_arg_set |= 1 << QPARM_CMPT_CNTR_IDX;
 
 		if (!strcmp(info->trig_mode, "every"))
 			qparm->cmpt_trig_mode = 1;
@@ -1411,7 +1416,7 @@ static int qdma_prepare_q_start(struct xcmd_info *xcmd,
 			printf("Error: unknown q trigmode %s.\n", info->trig_mode);
 			return -EINVAL;
 		}
-
+		f_arg_set |= 1 << QPARM_CMPT_TRIG_MODE;
 		if (pfetch_en)
 			qparm->flags |= XNL_F_PFETCH_EN;
 	}
@@ -1420,6 +1425,7 @@ static int qdma_prepare_q_start(struct xcmd_info *xcmd,
 			XNL_F_CMPL_STATUS_PEND_CHK | XNL_F_CMPL_STATUS_DESC_EN |
 			XNL_F_FETCH_CREDIT);
 
+	qparm->sflags = f_arg_set;
 	return 0;
 }
 

QDMA/linux-kernel/apps/dma-perf/version.h

@@ -13,7 +13,7 @@
 #define __DMA_PERF_VERSION_H
 
 #define PROGNAME "dma-perf"
-#define VERSION "2020.1.0"
+#define VERSION "2020.2.0"
 #define COPYRIGHT "Copyright (c) 2018-2020 Xilinx Inc."
 
 #endif

QDMA/linux-kernel/apps/dma-to-device/dma_to_device.c

@@ -30,6 +30,10 @@
 
 #include "dma_xfer_utils.c"
 
+#define DEVICE_NAME_DEFAULT "/dev/qdma01000-MM-0"
+#define SIZE_DEFAULT (32)
+#define COUNT_DEFAULT (1)
+
 static struct option const long_opts[] = {
 	{"device", required_argument, NULL, 'd'},
 	{"address", required_argument, NULL, 'a'},
@@ -43,13 +47,8 @@ static struct option const long_opts[] = {
 	{0, 0, 0, 0}
 };
 
-#define DEVICE_NAME_DEFAULT "/dev/qdma01000-MM-0"
-#define SIZE_DEFAULT (32)
-#define COUNT_DEFAULT (1)
-
-
 static int test_dma(char *devname, uint64_t addr, uint64_t size,
-		    uint64_t offset, uint64_t count, char *filename, char *);
+		    uint64_t offset, uint64_t count, char *infname, char *);
 
 static void usage(const char *name)
 {
@@ -88,7 +87,6 @@ static void usage(const char *name)
 	i++;
 	fprintf(stdout, "  -%c (--%s) verbose output\n",
 		long_opts[i].val, long_opts[i].name);
-	i++;
 }
 
 int main(int argc, char *argv[])
@@ -168,9 +166,10 @@ static int test_dma(char *devname, uint64_t addr, uint64_t size,
 	int infile_fd = -1;
 	int outfile_fd = -1;
 	int fpga_fd = open(devname, O_RDWR);
-	long total_time = 0;
-	float result;
-	float avg_time = 0;
+	double total_time = 0;
+	double result;
+	double avg_time = 0;
+
 
 	if (fpga_fd < 0) {
 		fprintf(stderr, "unable to open device %s, %d.\n",
@@ -231,11 +230,11 @@ static int test_dma(char *devname, uint64_t addr, uint64_t size,
 		rc = clock_gettime(CLOCK_MONOTONIC, &ts_end);
 		/* subtract the start time from the end time */
 		timespec_sub(&ts_end, &ts_start);
-		total_time += ts_end.tv_nsec;
+		total_time += (ts_end.tv_sec + ((double)ts_end.tv_nsec/NSEC_DIV));
 		/* a bit less accurate but side-effects are accounted for */
 		if (verbose)
 		fprintf(stdout,
-			"#%lu: CLOCK_MONOTONIC %ld.%09ld sec. write %ld bytes\n",
+			"#%lu: CLOCK_MONOTONIC %ld.%09ld sec. write %lu bytes\n",
 			i, ts_end.tv_sec, ts_end.tv_nsec, size); 
 			
 		if (outfile_fd >= 0) {
@@ -245,13 +244,13 @@ static int test_dma(char *devname, uint64_t addr, uint64_t size,
 				goto out;
 		}
 	}
-	avg_time = (float)total_time/(float)count;
-	result = ((float)size)*1000/avg_time;
+	avg_time = (double)total_time/(double)count;
+	result = ((double)size)/avg_time;
 	if (verbose)
-	printf("** Avg time device %s, total time %ld nsec, avg_time = %f, size = %lu, BW = %f \n",
+	printf("** Avg time device %s, total time %f nsec, avg_time = %f, size = %lu, BW = %f bytes/sec\n",
 		devname, total_time, avg_time, size, result);
+	dump_throughput_result(size, result);
 
-	printf("** Average BW = %lu, %f\n",size, result);
 	rc = 0;
 
 out:

QDMA/linux-kernel/apps/dma-to-device/version.h

@@ -13,7 +13,7 @@
 #define __DMA_TO_DEVICE_VERSION_H
 
 #define PROGNAME "dma-to-device"
-#define VERSION "2020.1.0"
+#define VERSION "2020.2.0"
 #define COPYRIGHT "Copyright (c) 2018-2020 Xilinx Inc."
 
 #endif

QDMA/linux-kernel/apps/dma-utils/dma_xfer_utils.c

@@ -25,9 +25,25 @@
  */
 
 #define RW_MAX_SIZE	0x7ffff000
+#define GB_DIV 1000000000
+#define MB_DIV 1000000
+#define KB_DIV 1000
+#define NSEC_DIV 1000000000
 
 int verbose = 0;
 
+void dump_throughput_result(uint64_t size, float result) {
+	printf("size=%lu ", size);
+	if (((long long)(result)/GB_DIV)) {
+		printf("Average BW = %f GB/sec\n", ((double)result/GB_DIV));
+	} else if (((long long)(result)/MB_DIV)) {
+		printf("Average BW = %f MB/sec\n", ((double)result/MB_DIV));
+	} else if (((long long)(result)/KB_DIV)) {
+		printf("Average BW = %f KB/sec\n", ((double)result/KB_DIV));
+	} else
+		printf("Average BW = %f Bytes/sec\n", ((double)result));
+}
+
 uint64_t getopt_integer(char *optarg)
 {
 	int rc;

QDMA/linux-kernel/apps/dma-utils/dmactl.c

@@ -311,6 +311,7 @@ static int get_cmd_resp_buf_len(enum xnl_op_t op, struct xcmd_info *xcmd)
         	buf_len = XNL_RESP_BUFLEN_MAX * 10;
         	break;
         case XNL_CMD_REG_DUMP:
+		case XNL_CMD_REG_INFO_READ:
         	buf_len = XNL_RESP_BUFLEN_MAX * 6;
         break;
 		case XNL_CMD_DEV_STAT:
@@ -374,6 +375,10 @@ static void xnl_msg_add_extra_config_attrs(struct xnl_hdr *hdr,
 		xnl_msg_add_int_attr(hdr,  XNL_ATTR_PING_PONG_EN,
 							 xcmd->req.qparm.ping_pong_en);
 	}
+	if (xcmd->req.qparm.sflags & (1 << QPARM_KEYHOLE_EN)) {
+		xnl_msg_add_int_attr(hdr,  XNL_ATTR_APERTURE_SZ,
+							 xcmd->req.qparm.aperture_sz);
+	}
 }
 
 static int xnl_parse_response(struct xnl_cb *cb, struct xnl_hdr *hdr,
@@ -472,6 +477,16 @@ static int xnl_send_cmd(struct xnl_cb *cb, struct xnl_hdr *hdr,
 		xnl_msg_add_int_attr(hdr, XNL_ATTR_REG_VAL,
 							 xcmd->req.reg.val);
 		break;
+		case XNL_CMD_REG_INFO_READ:
+		xnl_msg_add_int_attr(hdr, XNL_ATTR_REG_BAR_NUM,
+								 xcmd->req.reg.bar);
+		xnl_msg_add_int_attr(hdr, XNL_ATTR_REG_ADDR,
+							 xcmd->req.reg.reg);
+		xnl_msg_add_int_attr(hdr, XNL_ATTR_NUM_REGS,
+							 xcmd->req.reg.range_end);
+		xnl_msg_add_int_attr(hdr, XNL_ATTR_RSP_BUF_LEN,
+				dlen);
+		break;
         case XNL_CMD_REG_DUMP:
 		xnl_msg_add_int_attr(hdr, XNL_ATTR_RSP_BUF_LEN,
 				dlen);
@@ -566,6 +581,8 @@ void xnl_parse_dev_cap_attrs(struct xnl_hdr *hdr, uint32_t *attrs,
 	xcmd->resp.cap.num_qs = attrs[XNL_ATTR_DEV_NUMQS];
 	xcmd->resp.cap.flr_present = attrs[XNL_ATTR_DEV_FLR_PRESENT];
 	xcmd->resp.cap.mm_en = attrs[XNL_ATTR_DEV_MM_ENABLE];
+	xcmd->resp.cap.debug_mode = attrs[XNL_ATTR_DEBUG_EN];
+	xcmd->resp.cap.desc_eng_mode = attrs[XNL_ATTR_DESC_ENGINE_MODE];
 	xcmd->resp.cap.mm_cmpt_en =
 			attrs[XNL_ATTR_DEV_MM_CMPT_ENABLE];
 	xcmd->resp.cap.st_en = attrs[XNL_ATTR_DEV_ST_ENABLE];
@@ -845,6 +862,11 @@ int qdma_reg_write(struct xcmd_info *cmd)
 	return proc_reg_cmd(cmd);
 }
 
+int qdma_reg_info_read(struct xcmd_info *cmd)
+{
+	return proc_reg_cmd(cmd);
+}
+
 int qdma_reg_dump(struct xcmd_info *cmd)
 {
 	return proc_reg_cmd(cmd);

QDMA/linux-kernel/apps/dma-utils/dmactl_reg.c

@@ -205,7 +205,7 @@ static void print_repeated_reg(uint32_t *bar, struct xreg_info *xreg,
 	for (i = start; i < end; i++) {
 		uint32_t addr = xreg->addr + (i * step);
 		char name[40];
-		sprintf(name, "%s_%d",
+		snprintf(name, 40, "%s_%d",
 				xreg->name, i);
 
 		if (xcmd == NULL) {
@@ -293,7 +293,7 @@ static void read_regs(uint32_t *bar, struct xreg_info *reg_list,
 					((1 << xreg->len) - 1);
 
 			snprintf(reg_dump, 100,
-				 "    %*u:%u %-47s %#-10x %u\n",
+				 "    %*u:%d %-47s %#-10x %u\n",
 				 xreg->shift < 10 ? 3 : 2,
 				 xreg->shift + xreg->len - 1,
 				 xreg->shift, xreg->name, v, v);
@@ -384,6 +384,7 @@ int proc_reg_cmd(struct xcmd_info *xcmd)
 	unsigned char version[QDMA_VERSION_INFO_STR_LENGTH];
 	int32_t v;
 	unsigned char op;
+	uint32_t attrs[XNL_ATTR_MAX] = {0};
 
 	memcpy(&dev_xcmd, xcmd, sizeof(dev_xcmd));
 
@@ -434,7 +435,7 @@ int proc_reg_cmd(struct xcmd_info *xcmd)
 			xcmd->log_msg_dump(reg_dump);
 
 		print_seperator(xcmd);
-		snprintf(reg_dump, 100, "\nUSER BAR #%d\n",
+		snprintf(reg_dump, 100, "\nAXI Master Lite Bar #%d\n",
 			 xcmd->resp.dev_info.user_bar);
 		if (xcmd->log_msg_dump)
 			xcmd->log_msg_dump(reg_dump);
@@ -449,6 +450,9 @@ int proc_reg_cmd(struct xcmd_info *xcmd)
 		reg_dump_mmap(&xcmd->resp.dev_info, xcmd->resp.dev_info.config_bar, NULL,
 				QDMA_CFG_BAR_SIZE, xcmd);
 		break;
+	case XNL_CMD_REG_INFO_READ:
+		xnl_common_msg_send(xcmd, attrs);
+		break;
 	default:
 		break;
 	}

QDMA/linux-kernel/apps/dma-utils/dmautils.h

@@ -95,6 +95,8 @@ enum qdma_q_parm_type {
 	QPARM_CMPT_TRIG_MODE,
 	/** @QPARM_PING_PONG_EN: ping pong param  */
 	QPARM_PING_PONG_EN,
+	/** @KEYHOLE_PARAM: keyhole feature aperture */
+	QPARM_KEYHOLE_EN,
 	/** @QPARM_MM_CHANNEL: q mm channel enable param */
 	QPARM_MM_CHANNEL,
 	/** @QPARM_MAX: max q param */
@@ -140,6 +142,8 @@ struct xcmd_q_parm {
 	unsigned char is_qp;
 	/** @ping_pong_en: ping pong en */
 	unsigned char ping_pong_en;
+	/** @aperture_sz: aperture_size for keyhole transfers*/
+	unsigned int aperture_sz;
 };
 
 /**
@@ -179,6 +183,10 @@ struct xcmd_dev_cap {
 	unsigned int mailbox_en;
 	/** @mm_channel_max: Max MM channel */
 	unsigned int mm_channel_max;
+	/** @debug_mode: Debug Mode*/
+	unsigned int debug_mode;
+	/** @desc_eng_mode: Descriptor Engine Mode*/
+	unsigned int desc_eng_mode;
 };
 
 /**
@@ -217,7 +225,7 @@ struct xnl_dev_info {
 	unsigned char dev_func;
 	/** @config_bar: config bar */
 	unsigned char config_bar;
-	/** @user_bar: user bar */
+	/** @user_bar: AXI Master Lite(user bar) */
 	unsigned char user_bar;
 	/** @qmax: SW qmax */
 	unsigned int qmax;
@@ -520,6 +528,17 @@ int qdma_q_cmpt_read(struct xcmd_info *cmd);
  *****************************************************************************/
 int qdma_reg_read(struct xcmd_info *cmd);
 
+/*****************************************************************************/
+/**
+ * qdma_reg_info_read() - read register fields information
+ *
+ * @cmd:	command information
+ *
+ * Return:	>=0 for success and <0 for error
+ *
+ *****************************************************************************/
+int qdma_reg_info_read(struct xcmd_info *cmd);
+
 /*****************************************************************************/
 /**
  * qdma_reg_write() - write register

QDMA/linux-kernel/apps/dma-utils/dmaxfer.c

@@ -1061,7 +1061,7 @@ ssize_t dmaxfer_iosubmit(char *fname, unsigned char write,
 	int fd;
 	unsigned int base = 0;
 
-	if (!fname || !buffer || size < 0) {
+	if (!fname || !buffer || size == 0) {
 		printf("Invalid arguments\n");
 		return -EINVAL;
 	}

QDMA/linux-kernel/apps/dma-utils/version.h

@@ -13,7 +13,7 @@
 #define __DMA_UTILS_VERSION_H
 
 #define LIBNAME "dma-utils"
-#define QDMATUILS_VERSION "2020.1.0"
-#define COPYRIGHT "Copyright (c) 2019 Xilinx Inc."
+#define QDMATUILS_VERSION "2020.2.0"
+#define COPYRIGHT "Copyright (c) 2019-2020 Xilinx Inc."
 
 #endif

QDMA/linux-kernel/apps/dma-xfer/version.h

@@ -12,7 +12,7 @@
 #define __DMA_XFER_VERSION_H
 
 #define PROGNAME "dma-xfer"
-#define VERSION "2020.1.0"
-#define COPYRIGHT "Copyright (c) 2019 Xilinx Inc."
+#define VERSION "2020.2.0"
+#define COPYRIGHT "Copyright (c) 2019-2020 Xilinx Inc."
 
 #endif

QDMA/linux-kernel/apps/include/qdma_nl.h

@@ -16,9 +16,7 @@
  * @file
  * @brief This file contains the declarations for qdma netlink interfaces
  *
- */
-
-/** physical function name (no more than 15 characters) */
+ ** physical function name (no more than 15 characters) */
 #define XNL_NAME_PF		"xnl_pf"
 /** virtual function name */
 #define XNL_NAME_VF		"xnl_vf"
@@ -102,7 +100,7 @@ enum xnl_attr_t {
 	XNL_ATTR_DEV_STAT_STC2H_PKTS2,	/**< number of ST C2H packets */
 
 	XNL_ATTR_DEV_CFG_BAR,		/**< device config bar number */
-	XNL_ATTR_DEV_USR_BAR,		/**< device user bar number */
+	XNL_ATTR_DEV_USR_BAR,		/**< device AXI Master Lite(user bar) number */
 	XNL_ATTR_DEV_QSET_MAX,		/**< max queue sets */
 	XNL_ATTR_DEV_QSET_QBASE,	/**< queue base start */
 
@@ -155,6 +153,7 @@ enum xnl_attr_t {
 	XNL_ATTR_Q_STATE,
 	XNL_ATTR_ERROR,
 	XNL_ATTR_PING_PONG_EN,
+	XNL_ATTR_APERTURE_SZ,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATMIN1,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATMIN2,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATMAX1,
@@ -162,9 +161,12 @@ enum xnl_attr_t {
 	XNL_ATTR_DEV_STAT_PING_PONG_LATAVG1,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATAVG2,
 	XNL_ATTR_DEV,
+	XNL_ATTR_DEBUG_EN,	/** Debug Regs Capability*/
+	XNL_ATTR_DESC_ENGINE_MODE, /** Descriptor Engine Capability */
 #ifdef ERR_DEBUG
 	XNL_ATTR_QPARAM_ERR_INFO,	/**< queue param info */
 #endif
+	XNL_ATTR_NUM_REGS,			/**< number of regs */
 	XNL_ATTR_MAX,
 };
 
@@ -262,6 +264,8 @@ static const char *xnl_attr_str[XNL_ATTR_MAX + 1] = {
 	"ERROR",			/**< XNL_ATTR_ERROR */
 	"PING_PONG_EN",		/**< XNL_PING_PONG_EN */
 	"DEV_ATTR",			/**< XNL_ATTR_DEV */
+	"XNL_ATTR_DEBUG_EN",	/** XNL_ATTR_DEBUG_EN */
+	"XNL_ATTR_DESC_ENGINE_MODE",	/** XNL_ATTR_DESC_ENGINE_MODE */
 #ifdef ERR_DEBUG
 	"QPARAM_ERR_INFO",		/**< queue param info */
 #endif
@@ -284,6 +288,7 @@ enum xnl_op_t {
 	XNL_CMD_REG_DUMP,	/**< dump the register information */
 	XNL_CMD_REG_RD,		/**< read a register value */
 	XNL_CMD_REG_WRT,	/**< write value to a register */
+	XNL_CMD_REG_INFO_READ,
 
 	XNL_CMD_Q_LIST,		/**< list all the queue present in the system */
 	XNL_CMD_Q_ADD,		/**< add a queue */

QDMA/linux-kernel/docs/README

@@ -96,7 +96,7 @@ _____________________________________________________________________________
 	- mode: Mode in which the driver needs to be loaded
 	- config_bar: Config bar number
 	- master_pf: Master PF  
-
+	- num_threads: number of threads for monitoring the writeback of completions
 
    Sample qdma.conf can be found below:
 

QDMA/linux-kernel/driver/include/qdma_nl.h

@@ -24,7 +24,6 @@
  * @brief This file contains the declarations for qdma netlink interfaces
  *
  */
-
 /** physical function name (no more than 15 characters) */
 #define XNL_NAME_PF		"xnl_pf"
 /** virtual function name */
@@ -109,7 +108,7 @@ enum xnl_attr_t {
 	XNL_ATTR_DEV_STAT_STC2H_PKTS2,	/**< number of ST C2H packets */
 
 	XNL_ATTR_DEV_CFG_BAR,		/**< device config bar number */
-	XNL_ATTR_DEV_USR_BAR,		/**< device user bar number */
+	XNL_ATTR_DEV_USR_BAR,		/**< device AXI Master Lite(user bar) number */
 	XNL_ATTR_DEV_QSET_MAX,		/**< max queue sets */
 	XNL_ATTR_DEV_QSET_QBASE,	/**< queue base start */
 
@@ -162,6 +161,7 @@ enum xnl_attr_t {
 	XNL_ATTR_Q_STATE,
 	XNL_ATTR_ERROR,
 	XNL_ATTR_PING_PONG_EN,
+	XNL_ATTR_APERTURE_SZ,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATMIN1,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATMIN2,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATMAX1,
@@ -169,9 +169,12 @@ enum xnl_attr_t {
 	XNL_ATTR_DEV_STAT_PING_PONG_LATAVG1,
 	XNL_ATTR_DEV_STAT_PING_PONG_LATAVG2,
 	XNL_ATTR_DEV,
+	XNL_ATTR_DEBUG_EN,	/** Debug Regs Capability*/
+	XNL_ATTR_DESC_ENGINE_MODE, /** Descriptor Engine Capability */
 #ifdef ERR_DEBUG
 	XNL_ATTR_QPARAM_ERR_INFO,	/**< queue param info */
 #endif
+	XNL_ATTR_NUM_REGS,			/**< number of regs */
 	XNL_ATTR_MAX,
 };
 
@@ -269,6 +272,8 @@ static const char *xnl_attr_str[XNL_ATTR_MAX + 1] = {
 	"ERROR",			/**< XNL_ATTR_ERROR */
 	"PING_PONG_EN",		/**< XNL_PING_PONG_EN */
 	"DEV_ATTR",			/**< XNL_ATTR_DEV */
+	"XNL_ATTR_DEBUG_EN",	/** XNL_ATTR_DEBUG_EN */
+	"XNL_ATTR_DESC_ENGINE_MODE",	/** XNL_ATTR_DESC_ENGINE_MODE */
 #ifdef ERR_DEBUG
 	"QPARAM_ERR_INFO",		/**< queue param info */
 #endif
@@ -291,6 +296,7 @@ enum xnl_op_t {
 	XNL_CMD_REG_DUMP,	/**< dump the register information */
 	XNL_CMD_REG_RD,		/**< read a register value */
 	XNL_CMD_REG_WRT,	/**< write value to a register */
+	XNL_CMD_REG_INFO_READ,
 
 	XNL_CMD_Q_LIST,		/**< list all the queue present in the system */
 	XNL_CMD_Q_ADD,		/**< add a queue */

QDMA/linux-kernel/driver/libqdma/libqdma_config.h

@@ -107,12 +107,12 @@ unsigned int qdma_get_qmax(unsigned long dev_hndl);
  * qdma_set_intr_rngsz() - Handler function to set the intr_ring_size value
  *
  * @param[in]	dev_hndl:	qdma device handle
- * @param[in]	rngsz:		interrupt aggregation ring size
+ * @param[in]	intr_rngsz:	interrupt aggregation ring size
  *
  * @return	QDMA_OPERATION_SUCCESSFUL on success
  * @return	<0 on failure
  *****************************************************************************/
-int qdma_set_intr_rngsz(unsigned long dev_hndl, u32 rngsz);
+int qdma_set_intr_rngsz(unsigned long dev_hndl, u32 intr_rngsz);
 
 /*****************************************************************************/
 /**

QDMA/linux-kernel/driver/libqdma/libqdma_export.c

@@ -460,7 +460,6 @@ int qdma_device_capabilities_info(unsigned long dev_hndl,
 		struct qdma_dev_attributes *dev_attr)
 {
 	struct xlnx_dma_dev *xdev = (struct xlnx_dma_dev *)dev_hndl;
-	struct qdma_dev_attributes *dev_cap;
 
 	if (!xdev) {
 		pr_err("dev_hndl is NULL");
@@ -477,13 +476,61 @@ int qdma_device_capabilities_info(unsigned long dev_hndl,
 		return -EINVAL;
 	}
 
-	qdma_get_device_attr(xdev, &dev_cap);
-
-	memcpy(dev_attr, dev_cap, sizeof(struct qdma_dev_attributes));
+	memcpy(dev_attr, &(xdev->dev_cap), sizeof(struct qdma_dev_attributes));
 
 	return 0;
 }
 
+/*****************************************************************************/
+/**
+ * qdma_config_reg_info_dump() - dump the detailed field information of register
+ *
+ * @param[in] dev_hndl:	handle returned from qdma_device_open()
+ * @param[in] reg_addr: register address info tobe dumped
+ * @param[in] num_regs: number of registers to be dumped
+ * @param[in] buf:	    buffer containing the o/p
+ * @param[in] buflen:   length of the buffer
+ *
+ * @return:		    length of o/p buffer
+ *
+ *****************************************************************************/
+int qdma_config_reg_info_dump(unsigned long dev_hndl, uint32_t reg_addr,
+				uint32_t num_regs, char *buf, int buflen)
+{
+	struct xlnx_dma_dev *xdev = (struct xlnx_dma_dev *)dev_hndl;
+	int rv;
+
+	/** make sure that input buffer is not empty, else return error */
+	if (!buf || !buflen) {
+		pr_err("invalid argument: buf=%p, buflen=%d\n", buf, buflen);
+		return -EINVAL;
+	}
+
+	/** make sure that the dev_hndl passed is Valid */
+	if (!xdev) {
+		pr_err("dev_hndl is NULL");
+		snprintf(buf, buflen, "dev_hndl is NULL");
+		return -EINVAL;
+	}
+
+	if (xdev_check_hndl(__func__, xdev->conf.pdev, dev_hndl) < 0) {
+		pr_err("Invalid dev_hndl passed");
+		snprintf(buf, buflen, "Invalid dev_hndl passed\n");
+		return -EINVAL;
+	}
+
+	if (xdev->hw.qdma_dump_reg_info == NULL) {
+		pr_err("Err: Feature not supported\n");
+		snprintf(buf, buflen, "Err: Feature not supported\n");
+		return -EPERM;
+	}
+
+	rv = xdev->hw.qdma_dump_reg_info((void *)dev_hndl, reg_addr,
+			num_regs, buf, buflen);
+	return rv;
+
+}
+
 #ifndef __QDMA_VF__
 /*****************************************************************************/
 /**
@@ -1691,6 +1738,45 @@ int qdma_queue_start(unsigned long dev_hndl, unsigned long id,
 		unlock_descq(descq);
 		return -EINVAL;
 	}
+
+	if ((xdev->version_info.ip_type == EQDMA_SOFT_IP) &&
+		(xdev->version_info.vivado_release >= QDMA_VIVADO_2020_2)) {
+
+		if (xdev->dev_cap.desc_eng_mode
+			== QDMA_DESC_ENG_BYPASS_ONLY) {
+			pr_err("Err: Bypass Only Design is not supported\n");
+			snprintf(buf, buflen,
+				"%s Bypass Only Design is not supported\n",
+				descq->conf.name);
+			unlock_descq(descq);
+			return -EINVAL;
+		}
+
+		if (descq->conf.desc_bypass) {
+			if (xdev->dev_cap.desc_eng_mode
+				== QDMA_DESC_ENG_INTERNAL_ONLY) {
+				pr_err("Err: Bypass mode not supported in Internal Mode only design\n");
+				snprintf(buf, buflen,
+					"%s  Bypass mode not supported in Internal Mode only design\n",
+					descq->conf.name);
+				unlock_descq(descq);
+				return -EINVAL;
+			}
+		}
+	}
+
+
+	if ((descq->conf.aperture_size != 0) &&
+			((descq->conf.aperture_size &
+			  (descq->conf.aperture_size - 1)))) {
+		pr_err("Err: %s Power of 2 aperture size supported\n",
+			descq->conf.name);
+		snprintf(buf, buflen,
+			"Err:%s Power of 2 aperture size supported\n",
+			descq->conf.name);
+		unlock_descq(descq);
+		return -ERANGE;
+	}
 	unlock_descq(descq);
 	/** complete the queue configuration*/
 	rv = qdma_descq_config_complete(descq);
@@ -1904,7 +1990,7 @@ int qdma_queue_stop(unsigned long dev_hndl, unsigned long id, char *buf,
 		cb->done = 1;
 		cb->status = -ENXIO;
 		if (req->fp_done) {
-			list_del(&cb->list);
+			qdma_work_queue_del(descq, cb);
 			req->fp_done(req, 0, -ENXIO);
 		} else
 			qdma_waitq_wakeup(&cb->wq);
@@ -2138,14 +2224,14 @@ handle_truncation:
   * @return  0: success
   * @return  <0: error
   *****************************************************************************/
-int qdma_software_version_info(char *software_version)
+int qdma_software_version_info(char *software_version, int length)
 {
 	if (!software_version) {
 		pr_err("Invalid input software_version:%p", software_version);
 		return -EINVAL;
 	}
 
-	sprintf(software_version, "%s", LIBQDMA_VERSION_STR);
+	snprintf(software_version, length, "%s", LIBQDMA_VERSION_STR);
 
 	return 0;
 }
@@ -2368,8 +2454,7 @@ ssize_t qdma_request_submit(unsigned long dev_hndl, unsigned long id,
 		rv = -EINVAL;
 		goto unmap_sgl;
 	}
-	list_add_tail(&cb->list, &descq->work_list);
-	descq->pend_req_desc += ((req->count + PAGE_SIZE - 1) >> PAGE_SHIFT);
+	qdma_work_queue_add(descq, cb);
 	unlock_descq(descq);
 
 	pr_debug("%s: cb 0x%p submitted.\n", descq->conf.name, cb);

QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_soft_access/eqdma_soft_access.h

@@ -14,15 +14,15 @@
  * the file called "COPYING".
  */
 
-#ifndef EQDMA_ACCESS_H_
-#define EQDMA_ACCESS_H_
-
-#include "qdma_access_common.h"
+#ifndef __EQDMA_SOFT_ACCESS_H_
+#define __EQDMA_SOFT_ACCESS_H_
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#include "qdma_platform.h"
+
 /**
  * enum qdma_error_idx - qdma errors
  */
@@ -191,8 +191,18 @@ struct eqdma_hw_err_info {
 	uint32_t stat_reg_addr;
 	uint32_t leaf_err_mask;
 	uint32_t global_err_mask;
+	void (*eqdma_hw_err_process)(void *dev_hndl);
 };
 
+#define EQDMA_OFFSET_VF_VERSION           0x5014
+#define EQDMA_OFFSET_VF_USER_BAR		  0x5018
+
+#define EQDMA_OFFSET_MBOX_BASE_PF         0x22400
+#define EQDMA_OFFSET_MBOX_BASE_VF         0x5000
+
+#define EQDMA_COMPL_CTXT_BADDR_HIGH_H_MASK             GENMASK_ULL(63, 38)
+#define EQDMA_COMPL_CTXT_BADDR_HIGH_L_MASK             GENMASK_ULL(37, 6)
+#define EQDMA_COMPL_CTXT_BADDR_LOW_MASK                GENMASK_ULL(5, 2)
 
 int eqdma_init_ctxt_memory(void *dev_hndl);
 
@@ -259,19 +269,38 @@ int eqdma_get_user_bar(void *dev_hndl, uint8_t is_vf,
 		uint8_t func_id, uint8_t *user_bar);
 
 int eqdma_dump_config_reg_list(void *dev_hndl,
-		uint32_t num_regs,
+		uint32_t total_regs,
 		struct qdma_reg_data *reg_list,
 		char *buf, uint32_t buflen);
 
 int eqdma_read_reg_list(void *dev_hndl, uint8_t is_vf,
-		uint16_t reg_rd_slot,
+		uint16_t reg_rd_group,
 		uint16_t *total_regs,
 		struct qdma_reg_data *reg_list);
 
 int eqdma_set_default_global_csr(void *dev_hndl);
 
+int eqdma_global_csr_conf(void *dev_hndl, uint8_t index, uint8_t count,
+				uint32_t *csr_val,
+				enum qdma_global_csr_type csr_type,
+				enum qdma_hw_access_type access_type);
+
+int eqdma_global_writeback_interval_conf(void *dev_hndl,
+				enum qdma_wrb_interval *wb_int,
+				enum qdma_hw_access_type access_type);
+
+int eqdma_mm_channel_conf(void *dev_hndl, uint8_t channel, uint8_t is_c2h,
+				uint8_t enable);
+
+int eqdma_dump_reg_info(void *dev_hndl, uint32_t reg_addr,
+			uint32_t num_regs, char *buf, uint32_t buflen);
+
+uint32_t eqdma_get_config_num_regs(void);
+
+struct xreg_info *eqdma_get_config_regs(void);
+
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* EQDMA_ACCESS_H_ */
+#endif /* __EQDMA_SOFT_ACCESS_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_common.h

@@ -14,21 +14,65 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_ACCESS_COMMON_H_
-#define QDMA_ACCESS_COMMON_H_
-
-#include "qdma_access_export.h"
-#include "qdma_access_errors.h"
+#ifndef __QDMA_ACCESS_COMMON_H_
+#define __QDMA_ACCESS_COMMON_H_
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#include "qdma_access_export.h"
+#include "qdma_access_errors.h"
+
 /* QDMA HW version string array length */
 #define QDMA_HW_VERSION_STRING_LEN			32
 
 #define ENABLE_INIT_CTXT_MEMORY			1
 
+#ifdef GCC_COMPILER
+static inline uint32_t get_trailing_zeros(uint64_t x)
+{
+	uint32_t rv =
+		__builtin_ffsll(x) - 1;
+	return rv;
+}
+#else
+static inline uint32_t get_trailing_zeros(uint64_t value)
+{
+	uint32_t pos = 0;
+
+	if ((value & 0xffffffff) == 0) {
+		pos += 32;
+		value >>= 32;
+	}
+	if ((value & 0xffff) == 0) {
+		pos += 16;
+		value >>= 16;
+	}
+	if ((value & 0xff) == 0) {
+		pos += 8;
+		value >>= 8;
+	}
+	if ((value & 0xf) == 0) {
+		pos += 4;
+		value >>= 4;
+	}
+	if ((value & 0x3) == 0) {
+		pos += 2;
+		value >>= 2;
+	}
+	if ((value & 0x1) == 0)
+		pos += 1;
+
+	return pos;
+}
+#endif
+
+#define FIELD_SHIFT(mask)       get_trailing_zeros(mask)
+#define FIELD_SET(mask, val)    ((val << FIELD_SHIFT(mask)) & mask)
+#define FIELD_GET(mask, reg)    ((reg & mask) >> FIELD_SHIFT(mask))
+
+
 /* CSR Default values */
 #define DEFAULT_MAX_DSC_FETCH               6
 #define DEFAULT_WRB_INT                     QDMA_WRB_INTERVAL_128
@@ -50,6 +94,66 @@ extern "C" {
  */
 #define QDMA_NUM_DATA_VEC_FOR_INTR_CXT  1
 
+enum ind_ctxt_cmd_op {
+	QDMA_CTXT_CMD_CLR,
+	QDMA_CTXT_CMD_WR,
+	QDMA_CTXT_CMD_RD,
+	QDMA_CTXT_CMD_INV
+};
+
+enum ind_ctxt_cmd_sel {
+	QDMA_CTXT_SEL_SW_C2H,
+	QDMA_CTXT_SEL_SW_H2C,
+	QDMA_CTXT_SEL_HW_C2H,
+	QDMA_CTXT_SEL_HW_H2C,
+	QDMA_CTXT_SEL_CR_C2H,
+	QDMA_CTXT_SEL_CR_H2C,
+	QDMA_CTXT_SEL_CMPT,
+	QDMA_CTXT_SEL_PFTCH,
+	QDMA_CTXT_SEL_INT_COAL,
+	QDMA_CTXT_SEL_PASID_RAM_LOW,
+	QDMA_CTXT_SEL_PASID_RAM_HIGH,
+	QDMA_CTXT_SEL_TIMER,
+	QDMA_CTXT_SEL_FMAP,
+};
+
+/* polling a register */
+#define	QDMA_REG_POLL_DFLT_INTERVAL_US	10		    /* 10us per poll */
+#define	QDMA_REG_POLL_DFLT_TIMEOUT_US	(500*1000)	/* 500ms */
+
+/** Constants */
+#define QDMA_NUM_RING_SIZES                                 16
+#define QDMA_NUM_C2H_TIMERS                                 16
+#define QDMA_NUM_C2H_BUFFER_SIZES                           16
+#define QDMA_NUM_C2H_COUNTERS                               16
+#define QDMA_MM_CONTROL_RUN                                 0x1
+#define QDMA_MM_CONTROL_STEP                                0x100
+#define QDMA_MAGIC_NUMBER                                   0x1fd3
+#define QDMA_PIDX_STEP                                      0x10
+#define QDMA_CMPT_CIDX_STEP                                 0x10
+#define QDMA_INT_CIDX_STEP                                  0x10
+
+
+/** QDMA_IND_REG_SEL_PFTCH */
+#define QDMA_PFTCH_CTXT_SW_CRDT_GET_H_MASK                  GENMASK(15, 3)
+#define QDMA_PFTCH_CTXT_SW_CRDT_GET_L_MASK                  GENMASK(2, 0)
+
+/** QDMA_IND_REG_SEL_CMPT */
+#define QDMA_COMPL_CTXT_BADDR_GET_H_MASK                    GENMASK_ULL(63, 38)
+#define QDMA_COMPL_CTXT_BADDR_GET_L_MASK                    GENMASK_ULL(37, 12)
+#define QDMA_COMPL_CTXT_PIDX_GET_H_MASK                     GENMASK(15, 4)
+#define QDMA_COMPL_CTXT_PIDX_GET_L_MASK                     GENMASK(3, 0)
+
+#define QDMA_INTR_CTXT_BADDR_GET_H_MASK                     GENMASK_ULL(63, 61)
+#define QDMA_INTR_CTXT_BADDR_GET_M_MASK                     GENMASK_ULL(60, 29)
+#define QDMA_INTR_CTXT_BADDR_GET_L_MASK                     GENMASK_ULL(28, 12)
+
+#define     QDMA_GLBL2_MM_CMPT_EN_MASK                      BIT(2)
+#define     QDMA_GLBL2_FLR_PRESENT_MASK                     BIT(1)
+#define     QDMA_GLBL2_MAILBOX_EN_MASK                      BIT(0)
+
+#define QDMA_REG_IND_CTXT_REG_COUNT                         8
+
 /* ------------------------ indirect register context fields -----------*/
 union qdma_ind_ctxt_cmd {
 	uint32_t word;
@@ -294,8 +398,6 @@ struct qdma_descq_cmpt_ctxt {
 	uint32_t pasid;
 	/** @pasid_en - PASID Enable */
 	uint8_t pasid_en;
-	/** @virtio_dsc_base - Virtio Desc Base Address */
-	uint8_t base_addr;
 	/** @vio_eop - Virtio End-of-packet */
 	uint8_t vio_eop;
 	/** @sh_cmpt - Shared Completion Queue */
@@ -518,11 +620,16 @@ void qdma_memset(void *to, uint8_t val, uint32_t size);
 int qdma_acc_reg_dump_buf_len(void *dev_hndl,
 		enum qdma_ip_type ip_type, int *buflen);
 
+int qdma_acc_reg_info_len(void *dev_hndl,
+		enum qdma_ip_type ip_type, int *buflen, int *num_regs);
 
 int qdma_acc_context_buf_len(void *dev_hndl,
 		enum qdma_ip_type ip_type, uint8_t st,
 		enum qdma_dev_q_type q_type, uint32_t *buflen);
 
+int qdma_acc_get_num_config_regs(void *dev_hndl,
+		enum qdma_ip_type ip_type, uint32_t *num_regs);
+
 /*
  * struct qdma_hw_access - Structure to hold HW access function pointers
  */
@@ -592,6 +699,10 @@ struct qdma_hw_access {
 	int (*qdma_hw_error_process)(void *dev_hndl);
 	int (*qdma_dump_config_regs)(void *dev_hndl, uint8_t is_vf, char *buf,
 					uint32_t buflen);
+	int (*qdma_dump_reg_info)(void *dev_hndl, uint32_t reg_addr,
+				  uint32_t num_regs,
+				  char *buf,
+				  uint32_t buflen);
 	int (*qdma_dump_queue_context)(void *dev_hndl,
 			uint8_t st,
 			enum qdma_dev_q_type q_type,
@@ -622,6 +733,7 @@ struct qdma_hw_access {
 			char *buf, uint32_t buflen);
 	uint32_t mbox_base_pf;
 	uint32_t mbox_base_vf;
+	uint32_t qdma_max_errors;
 };
 
 /*****************************************************************************/
@@ -643,6 +755,21 @@ struct qdma_hw_access {
 int qdma_hw_access_init(void *dev_hndl, uint8_t is_vf,
 				struct qdma_hw_access *hw_access);
 
+/*****************************************************************************/
+/**
+ * qdma_acc_dump_config_regs() - Function to get qdma config registers
+ *
+ * @dev_hndl:   device handle
+ * @is_vf:      Whether PF or VF
+ * @ip_type:	QDMA IP Type
+ * @reg_data:  pointer to register data to be filled
+ *
+ * Return:	Length up-till the buffer is filled -success and < 0 - failure
+ *****************************************************************************/
+int qdma_acc_get_config_regs(void *dev_hndl, uint8_t is_vf,
+		enum qdma_ip_type ip_type,
+		uint32_t *reg_data);
+
 /*****************************************************************************/
 /**
  * qdma_acc_dump_config_regs() - Function to get qdma config register dump in a
@@ -660,6 +787,23 @@ int qdma_acc_dump_config_regs(void *dev_hndl, uint8_t is_vf,
 		enum qdma_ip_type ip_type,
 		char *buf, uint32_t buflen);
 
+/*****************************************************************************/
+/**
+ * qdma_acc_dump_reg_info() - Function to get qdma reg info in a buffer
+ *
+ * @dev_hndl:   device handle
+ * @ip_type:	QDMA IP Type
+ * @reg_addr:   Register Address
+ * @num_regs:   Number of Registers
+ * @buf :       pointer to buffer to be filled
+ * @buflen :    Length of the buffer
+ *
+ * Return:	Length up-till the buffer is filled -success and < 0 - failure
+ *****************************************************************************/
+int qdma_acc_dump_reg_info(void *dev_hndl,
+		enum qdma_ip_type ip_type, uint32_t reg_addr,
+		uint32_t num_regs, char *buf, uint32_t buflen);
+
 /*****************************************************************************/
 /**
  * qdma_acc_dump_queue_context() - Function to dump qdma queue context data in a

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_errors.h

@@ -14,9 +14,12 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_ACCESS_ERRORS_H_
-#define QDMA_ACCESS_ERRORS_H_
+#ifndef __QDMA_ACCESS_ERRORS_H_
+#define __QDMA_ACCESS_ERRORS_H_
 
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * DOC: QDMA common library error codes definitions
@@ -62,4 +65,8 @@ enum qdma_access_error_codes {
 	QDMA_ERR_MBOX_ALL_ZERO_MSG,			/* 25 */
 };
 
-#endif /* QDMA_ACCESS_H_ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __QDMA_ACCESS_ERRORS_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_export.h

@@ -14,15 +14,15 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_ACCESS_EXPORT_H_
-#define QDMA_ACCESS_EXPORT_H_
-
-#include "qdma_platform_env.h"
+#ifndef __QDMA_ACCESS_EXPORT_H_
+#define __QDMA_ACCESS_EXPORT_H_
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#include "qdma_platform_env.h"
+
 /** QDMA Global CSR array size */
 #define QDMA_GLOBAL_CSR_ARRAY_SZ        16
 
@@ -44,6 +44,12 @@ struct qdma_dev_attributes {
 	uint8_t mm_cmpt_en:1;
 	/** @mailbox_en - Mailbox supported or not? */
 	uint8_t mailbox_en:1;
+	/** @debug_mode - Debug mode is enabled/disabled for IP */
+	uint8_t debug_mode:1;
+	/** @desc_eng_mode - Descriptor Engine mode:
+	 * Internal only/Bypass only/Internal & Bypass
+	 */
+	uint8_t desc_eng_mode:2;
 	/** @mm_channel_max - Num of MM channels */
 	uint8_t mm_channel_max;
 
@@ -202,6 +208,8 @@ enum qdma_vivado_release_id {
 	QDMA_VIVADO_2019_2,
 	/** @QDMA_VIVADO_2020_1 - Vivado version 2020.1  */
 	QDMA_VIVADO_2020_1,
+	/** @QDMA_VIVADO_2020_2 - Vivado version 2020.2  */
+	QDMA_VIVADO_2020_2,
 	/** @QDMA_VIVADO_NONE - Not a valid Vivado version*/
 	QDMA_VIVADO_NONE
 };
@@ -229,137 +237,19 @@ enum qdma_device_type {
 	QDMA_DEVICE_NONE
 };
 
-/**
- * enum qdma_error_idx - qdma errors
- */
-enum qdma_error_idx {
-	/* Descriptor errors */
-	QDMA_DSC_ERR_POISON,
-	QDMA_DSC_ERR_UR_CA,
-	QDMA_DSC_ERR_PARAM,
-	QDMA_DSC_ERR_ADDR,
-	QDMA_DSC_ERR_TAG,
-	QDMA_DSC_ERR_FLR,
-	QDMA_DSC_ERR_TIMEOUT,
-	QDMA_DSC_ERR_DAT_POISON,
-	QDMA_DSC_ERR_FLR_CANCEL,
-	QDMA_DSC_ERR_DMA,
-	QDMA_DSC_ERR_DSC,
-	QDMA_DSC_ERR_RQ_CANCEL,
-	QDMA_DSC_ERR_DBE,
-	QDMA_DSC_ERR_SBE,
-	QDMA_DSC_ERR_ALL,
-
-	/* TRQ Errors */
-	QDMA_TRQ_ERR_UNMAPPED,
-	QDMA_TRQ_ERR_QID_RANGE,
-	QDMA_TRQ_ERR_VF_ACCESS,
-	QDMA_TRQ_ERR_TCP_TIMEOUT,
-	QDMA_TRQ_ERR_ALL,
-
-	/* C2H Errors */
-	QDMA_ST_C2H_ERR_MTY_MISMATCH,
-	QDMA_ST_C2H_ERR_LEN_MISMATCH,
-	QDMA_ST_C2H_ERR_QID_MISMATCH,
-	QDMA_ST_C2H_ERR_DESC_RSP_ERR,
-	QDMA_ST_C2H_ERR_ENG_WPL_DATA_PAR_ERR,
-	QDMA_ST_C2H_ERR_MSI_INT_FAIL,
-	QDMA_ST_C2H_ERR_ERR_DESC_CNT,
-	QDMA_ST_C2H_ERR_PORTID_CTXT_MISMATCH,
-	QDMA_ST_C2H_ERR_PORTID_BYP_IN_MISMATCH,
-	QDMA_ST_C2H_ERR_CMPT_INV_Q_ERR,
-	QDMA_ST_C2H_ERR_CMPT_QFULL_ERR,
-	QDMA_ST_C2H_ERR_CMPT_CIDX_ERR,
-	QDMA_ST_C2H_ERR_CMPT_PRTY_ERR,
-	QDMA_ST_C2H_ERR_ALL,
-
-	/* Fatal Errors */
-	QDMA_ST_FATAL_ERR_MTY_MISMATCH,
-	QDMA_ST_FATAL_ERR_LEN_MISMATCH,
-	QDMA_ST_FATAL_ERR_QID_MISMATCH,
-	QDMA_ST_FATAL_ERR_TIMER_FIFO_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_PFCH_II_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_CMPT_CTXT_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_PFCH_CTXT_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_DESC_REQ_FIFO_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_INT_CTXT_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_CMPT_COAL_DATA_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_TUSER_FIFO_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_QID_FIFO_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_PAYLOAD_FIFO_RAM_RDBE,
-	QDMA_ST_FATAL_ERR_WPL_DATA_PAR,
-	QDMA_ST_FATAL_ERR_ALL,
-
-	/* H2C Errors */
-	QDMA_ST_H2C_ERR_ZERO_LEN_DESC,
-	QDMA_ST_H2C_ERR_CSI_MOP,
-	QDMA_ST_H2C_ERR_NO_DMA_DSC,
-	QDMA_ST_H2C_ERR_SBE,
-	QDMA_ST_H2C_ERR_DBE,
-	QDMA_ST_H2C_ERR_ALL,
-
-	/* Single bit errors */
-	QDMA_SBE_ERR_MI_H2C0_DAT,
-	QDMA_SBE_ERR_MI_C2H0_DAT,
-	QDMA_SBE_ERR_H2C_RD_BRG_DAT,
-	QDMA_SBE_ERR_H2C_WR_BRG_DAT,
-	QDMA_SBE_ERR_C2H_RD_BRG_DAT,
-	QDMA_SBE_ERR_C2H_WR_BRG_DAT,
-	QDMA_SBE_ERR_FUNC_MAP,
-	QDMA_SBE_ERR_DSC_HW_CTXT,
-	QDMA_SBE_ERR_DSC_CRD_RCV,
-	QDMA_SBE_ERR_DSC_SW_CTXT,
-	QDMA_SBE_ERR_DSC_CPLI,
-	QDMA_SBE_ERR_DSC_CPLD,
-	QDMA_SBE_ERR_PASID_CTXT_RAM,
-	QDMA_SBE_ERR_TIMER_FIFO_RAM,
-	QDMA_SBE_ERR_PAYLOAD_FIFO_RAM,
-	QDMA_SBE_ERR_QID_FIFO_RAM,
-	QDMA_SBE_ERR_TUSER_FIFO_RAM,
-	QDMA_SBE_ERR_WRB_COAL_DATA_RAM,
-	QDMA_SBE_ERR_INT_QID2VEC_RAM,
-	QDMA_SBE_ERR_INT_CTXT_RAM,
-	QDMA_SBE_ERR_DESC_REQ_FIFO_RAM,
-	QDMA_SBE_ERR_PFCH_CTXT_RAM,
-	QDMA_SBE_ERR_WRB_CTXT_RAM,
-	QDMA_SBE_ERR_PFCH_LL_RAM,
-	QDMA_SBE_ERR_H2C_PEND_FIFO,
-	QDMA_SBE_ERR_ALL,
-
-	/* Double bit Errors */
-	QDMA_DBE_ERR_MI_H2C0_DAT,
-	QDMA_DBE_ERR_MI_C2H0_DAT,
-	QDMA_DBE_ERR_H2C_RD_BRG_DAT,
-	QDMA_DBE_ERR_H2C_WR_BRG_DAT,
-	QDMA_DBE_ERR_C2H_RD_BRG_DAT,
-	QDMA_DBE_ERR_C2H_WR_BRG_DAT,
-	QDMA_DBE_ERR_FUNC_MAP,
-	QDMA_DBE_ERR_DSC_HW_CTXT,
-	QDMA_DBE_ERR_DSC_CRD_RCV,
-	QDMA_DBE_ERR_DSC_SW_CTXT,
-	QDMA_DBE_ERR_DSC_CPLI,
-	QDMA_DBE_ERR_DSC_CPLD,
-	QDMA_DBE_ERR_PASID_CTXT_RAM,
-	QDMA_DBE_ERR_TIMER_FIFO_RAM,
-	QDMA_DBE_ERR_PAYLOAD_FIFO_RAM,
-	QDMA_DBE_ERR_QID_FIFO_RAM,
-	QDMA_DBE_ERR_TUSER_FIFO_RAM,
-	QDMA_DBE_ERR_WRB_COAL_DATA_RAM,
-	QDMA_DBE_ERR_INT_QID2VEC_RAM,
-	QDMA_DBE_ERR_INT_CTXT_RAM,
-	QDMA_DBE_ERR_DESC_REQ_FIFO_RAM,
-	QDMA_DBE_ERR_PFCH_CTXT_RAM,
-	QDMA_DBE_ERR_WRB_CTXT_RAM,
-	QDMA_DBE_ERR_PFCH_LL_RAM,
-	QDMA_DBE_ERR_H2C_PEND_FIFO,
-	QDMA_DBE_ERR_ALL,
-
-	QDMA_ERRS_ALL
+enum qdma_desc_eng_mode {
+	/** @QDMA_DESC_ENG_INTERNAL_BYPASS - Internal and Bypass mode */
+	QDMA_DESC_ENG_INTERNAL_BYPASS,
+	/** @QDMA_DESC_ENG_BYPASS_ONLY - Only Bypass mode  */
+	QDMA_DESC_ENG_BYPASS_ONLY,
+	/** @QDMA_DESC_ENG_INTERNAL_ONLY - Only Internal mode  */
+	QDMA_DESC_ENG_INTERNAL_ONLY,
+	/** @QDMA_DESC_ENG_MODE_MAX - Max of desc engine modes  */
+	QDMA_DESC_ENG_MODE_MAX
 };
 
-
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* QDMA_ACCESS_EXPORT_H_ */
+#endif /* __QDMA_ACCESS_EXPORT_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_version.h

@@ -14,13 +14,13 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_VERSION_H_
-#define QDMA_VERSION_H_
+#ifndef __QDMA_ACCESS_VERSION_H_
+#define __QDMA_ACCESS_VERSION_H_
 
 
 #define QDMA_VERSION_MAJOR	2020
-#define QDMA_VERSION_MINOR	1
-#define QDMA_VERSION_PATCH	1
+#define QDMA_VERSION_MINOR	2
+#define QDMA_VERSION_PATCH	0
 
 #define QDMA_VERSION_STR	\
 	__stringify(QDMA_VERSION_MAJOR) "." \
@@ -33,4 +33,4 @@
 	  QDMA_VERSION_PATCH)
 
 
-#endif /* COMMON_QDMA_VERSION_H_ */
+#endif /* __QDMA_ACCESS_VERSION_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_list.h

@@ -14,8 +14,12 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_LIST_H_
-#define QDMA_LIST_H_
+#ifndef __QDMA_LIST_H_
+#define __QDMA_LIST_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * DOC: QDMA common library provided list implementation definitions
@@ -114,4 +118,8 @@ void qdma_list_insert_after(struct qdma_list_head *new_node,
  *****************************************************************************/
 void qdma_list_del(struct qdma_list_head *node);
 
-#endif /* QDMA_LIST_H_ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __QDMA_LIST_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_mbox_protocol.c

@@ -15,8 +15,6 @@
  */
 
 #include "qdma_mbox_protocol.h"
-#include "qdma_platform.h"
-#include "qdma_resource_mgmt.h"
 
 /** mailbox function status */
 #define MBOX_FN_STATUS			0x0
@@ -381,9 +379,9 @@ static inline void mbox_pf_hw_clear_func_ack(void *dev_hndl, uint16_t func_id)
 			(1 << bit));
 }
 
-static void qdma_mbox_memcpy(void *to, void *from, uint32_t size)
+static void qdma_mbox_memcpy(void *to, void *from, uint8_t size)
 {
-	uint32_t i;
+	uint8_t i;
 	uint8_t *_to = (uint8_t *)to;
 	uint8_t *_from = (uint8_t *)from;
 
@@ -391,9 +389,9 @@ static void qdma_mbox_memcpy(void *to, void *from, uint32_t size)
 		_to[i] = _from[i];
 }
 
-static void qdma_mbox_memset(void *to, uint8_t val, uint32_t size)
+static void qdma_mbox_memset(void *to, uint8_t val, uint8_t size)
 {
-	uint32_t i;
+	uint8_t i;
 	uint8_t *_to = (uint8_t *)to;
 
 	for (i = 0; i < size; i++)
@@ -1079,7 +1077,7 @@ int qdma_mbox_pf_rcv_msg_handler(void *dev_hndl, uint8_t dma_device_index,
 	case MBOX_OP_CSR:
 	{
 		struct mbox_msg_csr *rsp_csr = &resp->csr;
-		struct qdma_dev_attributes *dev_cap;
+		struct qdma_dev_attributes dev_cap;
 
 		uint32_t ringsz[QDMA_GLOBAL_CSR_ARRAY_SZ] = {0};
 		uint32_t bufsz[QDMA_GLOBAL_CSR_ARRAY_SZ] = {0};
@@ -1093,9 +1091,9 @@ int qdma_mbox_pf_rcv_msg_handler(void *dev_hndl, uint8_t dma_device_index,
 		if (rv < 0)
 			goto exit_func;
 
-		qdma_get_device_attr(dev_hndl, &dev_cap);
+		hw->qdma_get_device_attributes(dev_hndl, &dev_cap);
 
-		if (dev_cap->st_en) {
+		if (dev_cap.st_en) {
 			rv = hw->qdma_global_csr_conf(dev_hndl, 0,
 				QDMA_GLOBAL_CSR_ARRAY_SZ, bufsz,
 				QDMA_CSR_BUF_SZ, QDMA_HW_ACCESS_READ);
@@ -1104,7 +1102,7 @@ int qdma_mbox_pf_rcv_msg_handler(void *dev_hndl, uint8_t dma_device_index,
 				goto exit_func;
 		}
 
-		if (dev_cap->st_en || dev_cap->mm_cmpt_en) {
+		if (dev_cap.st_en || dev_cap.mm_cmpt_en) {
 			rv = hw->qdma_global_csr_conf(dev_hndl, 0,
 				QDMA_GLOBAL_CSR_ARRAY_SZ, tmr_th,
 				QDMA_CSR_TIMER_CNT, QDMA_HW_ACCESS_READ);

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_mbox_protocol.h

@@ -14,8 +14,12 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_MBOX_PROTOCOL_H_
-#define QDMA_MBOX_PROTOCOL_H_
+#ifndef __QDMA_MBOX_PROTOCOL_H_
+#define __QDMA_MBOX_PROTOCOL_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
  * DOC: QDMA message box handling interface definitions
@@ -24,10 +28,10 @@
  * signatures exported for QDMA Mbox message handling.
  */
 
-#include "qdma_platform_env.h"
-#include "qdma_access_common.h"
+#include "qdma_platform.h"
 #include "qdma_resource_mgmt.h"
 
+
 #define QDMA_MBOX_VF_ONLINE			(1)
 #define QDMA_MBOX_VF_OFFLINE		(-1)
 #define QDMA_MBOX_VF_RESET			(2)
@@ -154,7 +158,7 @@ void qdma_mbox_hw_init(void *dev_hndl, uint8_t is_vf);
 /**
  * qdma_mbox_pf_rcv_msg_handler(): handles the raw message received in pf
  *
- * @pci_bus_num:  pci bus number
+ * @dma_device_index:  pci bus number
  * @dev_hndl:  device handle
  * @func_id:   own function id
  * @rcv_msg:   received raw message
@@ -162,7 +166,7 @@ void qdma_mbox_hw_init(void *dev_hndl, uint8_t is_vf);
  *
  * Return:	0  : success and < 0: failure
  *****************************************************************************/
-int qdma_mbox_pf_rcv_msg_handler(void *dev_hndl, uint8_t pci_bus_num,
+int qdma_mbox_pf_rcv_msg_handler(void *dev_hndl, uint8_t dma_device_index,
 				 uint16_t func_id, uint32_t *rcv_msg,
 				 uint32_t *resp_msg);
 
@@ -683,4 +687,8 @@ int qdma_mbox_vf_rcv_msg_handler(uint32_t *rcv_msg, uint32_t *resp_msg);
  *****************************************************************************/
 uint8_t qdma_mbox_out_status(void *dev_hndl, uint8_t is_vf);
 
-#endif /* QDMA_MBOX_PROTOCOL_H_ */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __QDMA_MBOX_PROTOCOL_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_platform.h

@@ -14,11 +14,8 @@
  * the file called "COPYING".
  */
 
-#ifndef LIBQDMA_QDMA_PLATFORM_H_
-#define LIBQDMA_QDMA_PLATFORM_H_
-
-#include "qdma_access_common.h"
-#include "qdma_platform_env.h"
+#ifndef __QDMA_PLATFORM_H_
+#define __QDMA_PLATFORM_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -31,6 +28,8 @@ extern "C" {
  * required to be implemented by platform specific drivers.
  */
 
+#include "qdma_access_common.h"
+
 /*****************************************************************************/
 /**
  * qdma_calloc(): allocate memory and initialize with 0
@@ -130,28 +129,6 @@ int qdma_reg_access_release(void *dev_hndl);
  *****************************************************************************/
 void qdma_udelay(uint32_t delay_usec);
 
-/*****************************************************************************/
-/**
- * qdma_hw_error_handler() - function to handle the hardware errors
- *
- * @dev_hndl:   device handle
- * @err_idx: error index
- *
- * Return:	0   - success and < 0 - failure
- *****************************************************************************/
-void qdma_hw_error_handler(void *dev_hndl, enum qdma_error_idx err_idx);
-
-/*****************************************************************************/
-/**
- * qdma_get_device_attr() - function to get the device attributes
- *
- * @dev_hndl:   device handle
- * @dev_cap: pointer to hold the device capabilities
- *
- * Return:	0   - success and < 0 - failure
- *****************************************************************************/
-void qdma_get_device_attr(void *dev_hndl, struct qdma_dev_attributes **dev_cap);
-
 /*****************************************************************************/
 /**
  * qdma_get_hw_access() - function to get the qdma_hw_access
@@ -188,4 +165,4 @@ int qdma_get_err_code(int acc_err_code);
 }
 #endif
 
-#endif /* LIBQDMA_QDMA_PLATFORM_H_ */
+#endif /* __QDMA_PLATFORM_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_reg_dump.h

@@ -17,11 +17,16 @@
 #ifndef __QDMA_REG_DUMP_H__
 #define __QDMA_REG_DUMP_H__
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #include "qdma_platform_env.h"
 #include "qdma_access_common.h"
 
 #define DEBUGFS_DEV_INFO_SZ		(300)
 
+#define QDMA_REG_NAME_LENGTH	64
 #define DEBUGFS_INTR_CNTX_SZ	(2048 * 2)
 #define DBGFS_ERR_BUFLEN		(64)
 #define DEBGFS_LINE_SZ			(81)
@@ -50,19 +55,28 @@
 			(st_en << QDMA_ST_EN_SHIFT) | \
 			(mailbox_en << QDMA_MAILBOX_EN_SHIFT))
 
+
+struct regfield_info {
+		const char *field_name;
+		uint32_t field_mask;
+};
+
 struct xreg_info {
-	char name[32];
+	const char *name;
 	uint32_t addr;
 	uint32_t repeat;
 	uint32_t step;
 	uint8_t shift;
 	uint8_t len;
+	uint8_t is_debug_reg;
 	uint8_t mode;
 	uint8_t read_type;
+	uint8_t num_bitfields;
+	struct regfield_info *bitfields;
 };
 
-extern struct xreg_info qdma_config_regs[MAX_QDMA_CFG_REGS];
-extern struct xreg_info qdma_cpm_config_regs[MAX_QDMA_CFG_REGS];
-
+#ifdef __cplusplus
+}
+#endif
 
 #endif

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_resource_mgmt.h

@@ -14,8 +14,8 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_RESOURCE_MGMT_H_
-#define QDMA_RESOURCE_MGMT_H_
+#ifndef __QDMA_RESOURCE_MGMT_H_
+#define __QDMA_RESOURCE_MGMT_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -27,6 +27,7 @@ extern "C" {
  * Header file *qdma_resource_mgmt.h* defines data structures and function
  * signatures exported for QDMA queue management.
  */
+
 #include "qdma_platform_env.h"
 #include "qdma_access_export.h"
 
@@ -209,4 +210,4 @@ int qdma_get_device_active_queue_count(uint32_t dma_device_index,
 }
 #endif
 
-#endif /* LIBQDMA_QDMA_RESOURCE_MGMT_H_ */
+#endif /* __QDMA_RESOURCE_MGMT_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_s80_hard_access/qdma_s80_hard_access.h

@@ -14,15 +14,152 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_S80_HARD_ACCESS_H_
-#define QDMA_S80_HARD_ACCESS_H_
-
-#include "qdma_access_common.h"
+#ifndef __QDMA_S80_HARD_ACCESS_H_
+#define __QDMA_S80_HARD_ACCESS_H_
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+#include "qdma_platform.h"
+
+/**
+ * enum qdma_error_idx - qdma errors
+ */
+enum qdma_s80_hard_error_idx {
+	/* Descriptor errors */
+	QDMA_S80_HARD_DSC_ERR_POISON,
+	QDMA_S80_HARD_DSC_ERR_UR_CA,
+	QDMA_S80_HARD_DSC_ERR_PARAM,
+	QDMA_S80_HARD_DSC_ERR_ADDR,
+	QDMA_S80_HARD_DSC_ERR_TAG,
+	QDMA_S80_HARD_DSC_ERR_FLR,
+	QDMA_S80_HARD_DSC_ERR_TIMEOUT,
+	QDMA_S80_HARD_DSC_ERR_DAT_POISON,
+	QDMA_S80_HARD_DSC_ERR_FLR_CANCEL,
+	QDMA_S80_HARD_DSC_ERR_DMA,
+	QDMA_S80_HARD_DSC_ERR_DSC,
+	QDMA_S80_HARD_DSC_ERR_RQ_CANCEL,
+	QDMA_S80_HARD_DSC_ERR_DBE,
+	QDMA_S80_HARD_DSC_ERR_SBE,
+	QDMA_S80_HARD_DSC_ERR_ALL,
+
+	/* TRQ Errors */
+	QDMA_S80_HARD_TRQ_ERR_UNMAPPED,
+	QDMA_S80_HARD_TRQ_ERR_QID_RANGE,
+	QDMA_S80_HARD_TRQ_ERR_VF_ACCESS_ERR,
+	QDMA_S80_HARD_TRQ_ERR_TCP_TIMEOUT,
+	QDMA_S80_HARD_TRQ_ERR_ALL,
+
+	/* C2H Errors */
+	QDMA_S80_HARD_ST_C2H_ERR_MTY_MISMATCH,
+	QDMA_S80_HARD_ST_C2H_ERR_LEN_MISMATCH,
+	QDMA_S80_HARD_ST_C2H_ERR_QID_MISMATCH,
+	QDMA_S80_HARD_ST_C2H_ERR_DESC_RSP_ERR,
+	QDMA_S80_HARD_ST_C2H_ERR_ENG_WPL_DATA_PAR_ERR,
+	QDMA_S80_HARD_ST_C2H_ERR_MSI_INT_FAIL,
+	QDMA_S80_HARD_ST_C2H_ERR_ERR_DESC_CNT,
+	QDMA_S80_HARD_ST_C2H_ERR_PORTID_CTXT_MISMATCH,
+	QDMA_S80_HARD_ST_C2H_ERR_PORTID_BYP_IN_MISMATCH,
+	QDMA_S80_HARD_ST_C2H_ERR_WRB_INV_Q_ERR,
+	QDMA_S80_HARD_ST_C2H_ERR_WRB_QFULL_ERR,
+	QDMA_S80_HARD_ST_C2H_ERR_WRB_CIDX_ERR,
+	QDMA_S80_HARD_ST_C2H_ERR_WRB_PRTY_ERR,
+	QDMA_S80_HARD_ST_C2H_ERR_ALL,
+
+	/* Fatal Errors */
+	QDMA_S80_HARD_ST_FATAL_ERR_MTY_MISMATCH,
+	QDMA_S80_HARD_ST_FATAL_ERR_LEN_MISMATCH,
+	QDMA_S80_HARD_ST_FATAL_ERR_QID_MISMATCH,
+	QDMA_S80_HARD_ST_FATAL_ERR_TIMER_FIFO_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_PFCH_II_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_WRB_CTXT_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_PFCH_CTXT_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_DESC_REQ_FIFO_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_INT_CTXT_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_INT_QID2VEC_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_WRB_COAL_DATA_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_TUSER_FIFO_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_QID_FIFO_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_PAYLOAD_FIFO_RAM_RDBE,
+	QDMA_S80_HARD_ST_FATAL_ERR_WPL_DATA_PAR_ERR,
+	QDMA_S80_HARD_ST_FATAL_ERR_ALL,
+
+	/* H2C Errors */
+	QDMA_S80_HARD_ST_H2C_ERR_ZERO_LEN_DESC_ERR,
+	QDMA_S80_HARD_ST_H2C_ERR_SDI_MRKR_REQ_MOP_ERR,
+	QDMA_S80_HARD_ST_H2C_ERR_NO_DMA_DSC,
+	QDMA_S80_HARD_ST_H2C_ERR_DBE,
+	QDMA_S80_HARD_ST_H2C_ERR_SBE,
+	QDMA_S80_HARD_ST_H2C_ERR_ALL,
+
+	/* Single bit errors */
+	QDMA_S80_HARD_SBE_ERR_MI_H2C0_DAT,
+	QDMA_S80_HARD_SBE_ERR_MI_C2H0_DAT,
+	QDMA_S80_HARD_SBE_ERR_H2C_RD_BRG_DAT,
+	QDMA_S80_HARD_SBE_ERR_H2C_WR_BRG_DAT,
+	QDMA_S80_HARD_SBE_ERR_C2H_RD_BRG_DAT,
+	QDMA_S80_HARD_SBE_ERR_C2H_WR_BRG_DAT,
+	QDMA_S80_HARD_SBE_ERR_FUNC_MAP,
+	QDMA_S80_HARD_SBE_ERR_DSC_HW_CTXT,
+	QDMA_S80_HARD_SBE_ERR_DSC_CRD_RCV,
+	QDMA_S80_HARD_SBE_ERR_DSC_SW_CTXT,
+	QDMA_S80_HARD_SBE_ERR_DSC_CPLI,
+	QDMA_S80_HARD_SBE_ERR_DSC_CPLD,
+	QDMA_S80_HARD_SBE_ERR_PASID_CTXT_RAM,
+	QDMA_S80_HARD_SBE_ERR_TIMER_FIFO_RAM,
+	QDMA_S80_HARD_SBE_ERR_PAYLOAD_FIFO_RAM,
+	QDMA_S80_HARD_SBE_ERR_QID_FIFO_RAM,
+	QDMA_S80_HARD_SBE_ERR_TUSER_FIFO_RAM,
+	QDMA_S80_HARD_SBE_ERR_WRB_COAL_DATA_RAM,
+	QDMA_S80_HARD_SBE_ERR_INT_QID2VEC_RAM,
+	QDMA_S80_HARD_SBE_ERR_INT_CTXT_RAM,
+	QDMA_S80_HARD_SBE_ERR_DESC_REQ_FIFO_RAM,
+	QDMA_S80_HARD_SBE_ERR_PFCH_CTXT_RAM,
+	QDMA_S80_HARD_SBE_ERR_WRB_CTXT_RAM,
+	QDMA_S80_HARD_SBE_ERR_PFCH_LL_RAM,
+	QDMA_S80_HARD_SBE_ERR_ALL,
+
+	/* Double bit Errors */
+	QDMA_S80_HARD_DBE_ERR_MI_H2C0_DAT,
+	QDMA_S80_HARD_DBE_ERR_MI_C2H0_DAT,
+	QDMA_S80_HARD_DBE_ERR_H2C_RD_BRG_DAT,
+	QDMA_S80_HARD_DBE_ERR_H2C_WR_BRG_DAT,
+	QDMA_S80_HARD_DBE_ERR_C2H_RD_BRG_DAT,
+	QDMA_S80_HARD_DBE_ERR_C2H_WR_BRG_DAT,
+	QDMA_S80_HARD_DBE_ERR_FUNC_MAP,
+	QDMA_S80_HARD_DBE_ERR_DSC_HW_CTXT,
+	QDMA_S80_HARD_DBE_ERR_DSC_CRD_RCV,
+	QDMA_S80_HARD_DBE_ERR_DSC_SW_CTXT,
+	QDMA_S80_HARD_DBE_ERR_DSC_CPLI,
+	QDMA_S80_HARD_DBE_ERR_DSC_CPLD,
+	QDMA_S80_HARD_DBE_ERR_PASID_CTXT_RAM,
+	QDMA_S80_HARD_DBE_ERR_TIMER_FIFO_RAM,
+	QDMA_S80_HARD_DBE_ERR_PAYLOAD_FIFO_RAM,
+	QDMA_S80_HARD_DBE_ERR_QID_FIFO_RAM,
+	QDMA_S80_HARD_DBE_ERR_WRB_COAL_DATA_RAM,
+	QDMA_S80_HARD_DBE_ERR_INT_QID2VEC_RAM,
+	QDMA_S80_HARD_DBE_ERR_INT_CTXT_RAM,
+	QDMA_S80_HARD_DBE_ERR_DESC_REQ_FIFO_RAM,
+	QDMA_S80_HARD_DBE_ERR_PFCH_CTXT_RAM,
+	QDMA_S80_HARD_DBE_ERR_WRB_CTXT_RAM,
+	QDMA_S80_HARD_DBE_ERR_PFCH_LL_RAM,
+	QDMA_S80_HARD_DBE_ERR_ALL,
+
+	QDMA_S80_HARD_ERRS_ALL
+};
+
+struct qdma_s80_hard_hw_err_info {
+	enum qdma_s80_hard_error_idx idx;
+	const char *err_name;
+	uint32_t mask_reg_addr;
+	uint32_t stat_reg_addr;
+	uint32_t leaf_err_mask;
+	uint32_t global_err_mask;
+	void (*qdma_s80_hard_hw_err_process)(void *dev_hndl);
+};
+
+
 int qdma_s80_hard_init_ctxt_memory(void *dev_hndl);
 
 int qdma_s80_hard_qid2vec_conf(void *dev_hndl, uint8_t c2h, uint16_t hw_qid,
@@ -77,11 +214,15 @@ int qdma_s80_hard_get_device_attributes(void *dev_hndl,
 uint32_t qdma_s80_hard_reg_dump_buf_len(void);
 
 int qdma_s80_hard_context_buf_len(uint8_t st,
-		enum qdma_dev_q_type q_type, uint32_t *buflen);
+		enum qdma_dev_q_type q_type, uint32_t *req_buflen);
 
 int qdma_s80_hard_dump_config_regs(void *dev_hndl, uint8_t is_vf,
 		char *buf, uint32_t buflen);
 
+int qdma_s80_hard_hw_error_process(void *dev_hndl);
+const char *qdma_s80_hard_hw_get_error_name(uint32_t err_idx);
+int qdma_s80_hard_hw_error_enable(void *dev_hndl, uint32_t err_idx);
+
 int qdma_s80_hard_dump_queue_context(void *dev_hndl,
 		uint8_t st,
 		enum qdma_dev_q_type q_type,
@@ -100,17 +241,38 @@ int qdma_s80_hard_read_dump_queue_context(void *dev_hndl,
 		char *buf, uint32_t buflen);
 
 int qdma_s80_hard_dump_config_reg_list(void *dev_hndl,
-		uint32_t num_regs,
+		uint32_t total_regs,
 		struct qdma_reg_data *reg_list,
 		char *buf, uint32_t buflen);
 
 int qdma_s80_hard_read_reg_list(void *dev_hndl, uint8_t is_vf,
-		uint16_t reg_rd_group,
+		uint16_t reg_rd_slot,
 		uint16_t *total_regs,
 		struct qdma_reg_data *reg_list);
 
+int qdma_s80_hard_global_csr_conf(void *dev_hndl, uint8_t index,
+				uint8_t count,
+				uint32_t *csr_val,
+				enum qdma_global_csr_type csr_type,
+				enum qdma_hw_access_type access_type);
+
+int qdma_s80_hard_global_writeback_interval_conf(void *dev_hndl,
+				enum qdma_wrb_interval *wb_int,
+				enum qdma_hw_access_type access_type);
+
+int qdma_s80_hard_mm_channel_conf(void *dev_hndl, uint8_t channel,
+				uint8_t is_c2h,
+				uint8_t enable);
+
+int qdma_s80_hard_dump_reg_info(void *dev_hndl, uint32_t reg_addr,
+				uint32_t num_regs, char *buf, uint32_t buflen);
+
+uint32_t qdma_s80_hard_get_config_num_regs(void);
+
+struct xreg_info *qdma_s80_hard_get_config_regs(void);
+
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* QDMA_S80_HARD_ACCESS_H_ */
+#endif /* __QDMA_S80_HARD_ACCESS_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_soft_access/qdma_soft_access.h

@@ -14,12 +14,9 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_ACCESS_H_
-#define QDMA_ACCESS_H_
+#ifndef __QDMA_SOFT_ACCESS_H_
+#define __QDMA_SOFT_ACCESS_H_
 
-#include "qdma_access_export.h"
-#include "qdma_platform_env.h"
-#include "qdma_access_errors.h"
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -31,6 +28,136 @@ extern "C" {
  * exported by QDMA common library.
  */
 
+#include "qdma_platform.h"
+
+/**
+ * enum qdma_error_idx - qdma errors
+ */
+enum qdma_error_idx {
+	/* Descriptor errors */
+	QDMA_DSC_ERR_POISON,
+	QDMA_DSC_ERR_UR_CA,
+	QDMA_DSC_ERR_PARAM,
+	QDMA_DSC_ERR_ADDR,
+	QDMA_DSC_ERR_TAG,
+	QDMA_DSC_ERR_FLR,
+	QDMA_DSC_ERR_TIMEOUT,
+	QDMA_DSC_ERR_DAT_POISON,
+	QDMA_DSC_ERR_FLR_CANCEL,
+	QDMA_DSC_ERR_DMA,
+	QDMA_DSC_ERR_DSC,
+	QDMA_DSC_ERR_RQ_CANCEL,
+	QDMA_DSC_ERR_DBE,
+	QDMA_DSC_ERR_SBE,
+	QDMA_DSC_ERR_ALL,
+
+	/* TRQ Errors */
+	QDMA_TRQ_ERR_UNMAPPED,
+	QDMA_TRQ_ERR_QID_RANGE,
+	QDMA_TRQ_ERR_VF_ACCESS,
+	QDMA_TRQ_ERR_TCP_TIMEOUT,
+	QDMA_TRQ_ERR_ALL,
+
+	/* C2H Errors */
+	QDMA_ST_C2H_ERR_MTY_MISMATCH,
+	QDMA_ST_C2H_ERR_LEN_MISMATCH,
+	QDMA_ST_C2H_ERR_QID_MISMATCH,
+	QDMA_ST_C2H_ERR_DESC_RSP_ERR,
+	QDMA_ST_C2H_ERR_ENG_WPL_DATA_PAR_ERR,
+	QDMA_ST_C2H_ERR_MSI_INT_FAIL,
+	QDMA_ST_C2H_ERR_ERR_DESC_CNT,
+	QDMA_ST_C2H_ERR_PORTID_CTXT_MISMATCH,
+	QDMA_ST_C2H_ERR_PORTID_BYP_IN_MISMATCH,
+	QDMA_ST_C2H_ERR_CMPT_INV_Q_ERR,
+	QDMA_ST_C2H_ERR_CMPT_QFULL_ERR,
+	QDMA_ST_C2H_ERR_CMPT_CIDX_ERR,
+	QDMA_ST_C2H_ERR_CMPT_PRTY_ERR,
+	QDMA_ST_C2H_ERR_ALL,
+
+	/* Fatal Errors */
+	QDMA_ST_FATAL_ERR_MTY_MISMATCH,
+	QDMA_ST_FATAL_ERR_LEN_MISMATCH,
+	QDMA_ST_FATAL_ERR_QID_MISMATCH,
+	QDMA_ST_FATAL_ERR_TIMER_FIFO_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_PFCH_II_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_CMPT_CTXT_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_PFCH_CTXT_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_DESC_REQ_FIFO_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_INT_CTXT_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_CMPT_COAL_DATA_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_TUSER_FIFO_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_QID_FIFO_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_PAYLOAD_FIFO_RAM_RDBE,
+	QDMA_ST_FATAL_ERR_WPL_DATA_PAR,
+	QDMA_ST_FATAL_ERR_ALL,
+
+	/* H2C Errors */
+	QDMA_ST_H2C_ERR_ZERO_LEN_DESC,
+	QDMA_ST_H2C_ERR_CSI_MOP,
+	QDMA_ST_H2C_ERR_NO_DMA_DSC,
+	QDMA_ST_H2C_ERR_SBE,
+	QDMA_ST_H2C_ERR_DBE,
+	QDMA_ST_H2C_ERR_ALL,
+
+	/* Single bit errors */
+	QDMA_SBE_ERR_MI_H2C0_DAT,
+	QDMA_SBE_ERR_MI_C2H0_DAT,
+	QDMA_SBE_ERR_H2C_RD_BRG_DAT,
+	QDMA_SBE_ERR_H2C_WR_BRG_DAT,
+	QDMA_SBE_ERR_C2H_RD_BRG_DAT,
+	QDMA_SBE_ERR_C2H_WR_BRG_DAT,
+	QDMA_SBE_ERR_FUNC_MAP,
+	QDMA_SBE_ERR_DSC_HW_CTXT,
+	QDMA_SBE_ERR_DSC_CRD_RCV,
+	QDMA_SBE_ERR_DSC_SW_CTXT,
+	QDMA_SBE_ERR_DSC_CPLI,
+	QDMA_SBE_ERR_DSC_CPLD,
+	QDMA_SBE_ERR_PASID_CTXT_RAM,
+	QDMA_SBE_ERR_TIMER_FIFO_RAM,
+	QDMA_SBE_ERR_PAYLOAD_FIFO_RAM,
+	QDMA_SBE_ERR_QID_FIFO_RAM,
+	QDMA_SBE_ERR_TUSER_FIFO_RAM,
+	QDMA_SBE_ERR_WRB_COAL_DATA_RAM,
+	QDMA_SBE_ERR_INT_QID2VEC_RAM,
+	QDMA_SBE_ERR_INT_CTXT_RAM,
+	QDMA_SBE_ERR_DESC_REQ_FIFO_RAM,
+	QDMA_SBE_ERR_PFCH_CTXT_RAM,
+	QDMA_SBE_ERR_WRB_CTXT_RAM,
+	QDMA_SBE_ERR_PFCH_LL_RAM,
+	QDMA_SBE_ERR_H2C_PEND_FIFO,
+	QDMA_SBE_ERR_ALL,
+
+	/* Double bit Errors */
+	QDMA_DBE_ERR_MI_H2C0_DAT,
+	QDMA_DBE_ERR_MI_C2H0_DAT,
+	QDMA_DBE_ERR_H2C_RD_BRG_DAT,
+	QDMA_DBE_ERR_H2C_WR_BRG_DAT,
+	QDMA_DBE_ERR_C2H_RD_BRG_DAT,
+	QDMA_DBE_ERR_C2H_WR_BRG_DAT,
+	QDMA_DBE_ERR_FUNC_MAP,
+	QDMA_DBE_ERR_DSC_HW_CTXT,
+	QDMA_DBE_ERR_DSC_CRD_RCV,
+	QDMA_DBE_ERR_DSC_SW_CTXT,
+	QDMA_DBE_ERR_DSC_CPLI,
+	QDMA_DBE_ERR_DSC_CPLD,
+	QDMA_DBE_ERR_PASID_CTXT_RAM,
+	QDMA_DBE_ERR_TIMER_FIFO_RAM,
+	QDMA_DBE_ERR_PAYLOAD_FIFO_RAM,
+	QDMA_DBE_ERR_QID_FIFO_RAM,
+	QDMA_DBE_ERR_TUSER_FIFO_RAM,
+	QDMA_DBE_ERR_WRB_COAL_DATA_RAM,
+	QDMA_DBE_ERR_INT_QID2VEC_RAM,
+	QDMA_DBE_ERR_INT_CTXT_RAM,
+	QDMA_DBE_ERR_DESC_REQ_FIFO_RAM,
+	QDMA_DBE_ERR_PFCH_CTXT_RAM,
+	QDMA_DBE_ERR_WRB_CTXT_RAM,
+	QDMA_DBE_ERR_PFCH_LL_RAM,
+	QDMA_DBE_ERR_H2C_PEND_FIFO,
+	QDMA_DBE_ERR_ALL,
+
+	QDMA_ERRS_ALL
+};
+
 struct qdma_hw_err_info {
 	enum qdma_error_idx idx;
 	const char *err_name;
@@ -38,6 +165,7 @@ struct qdma_hw_err_info {
 	uint32_t stat_reg_addr;
 	uint32_t leaf_err_mask;
 	uint32_t global_err_mask;
+	void (*qdma_hw_err_process)(void *dev_hndl);
 };
 
 
@@ -98,6 +226,10 @@ int qdma_dump_intr_context(void *dev_hndl,
 
 uint32_t qdma_soft_reg_dump_buf_len(void);
 
+uint32_t qdma_get_config_num_regs(void);
+
+struct xreg_info *qdma_get_config_regs(void);
+
 int qdma_soft_context_buf_len(uint8_t st,
 		enum qdma_dev_q_type q_type, uint32_t *buflen);
 
@@ -129,7 +261,7 @@ int qdma_get_user_bar(void *dev_hndl, uint8_t is_vf,
 		uint8_t func_id, uint8_t *user_bar);
 
 int qdma_soft_dump_config_reg_list(void *dev_hndl,
-		uint32_t num_regs,
+		uint32_t total_regs,
 		struct qdma_reg_data *reg_list,
 		char *buf, uint32_t buflen);
 
@@ -138,9 +270,23 @@ int qdma_read_reg_list(void *dev_hndl, uint8_t is_vf,
 		uint16_t *total_regs,
 		struct qdma_reg_data *reg_list);
 
+int qdma_global_csr_conf(void *dev_hndl, uint8_t index, uint8_t count,
+				uint32_t *csr_val,
+				enum qdma_global_csr_type csr_type,
+				enum qdma_hw_access_type access_type);
+
+int qdma_global_writeback_interval_conf(void *dev_hndl,
+				enum qdma_wrb_interval *wb_int,
+				enum qdma_hw_access_type access_type);
+
+int qdma_mm_channel_conf(void *dev_hndl, uint8_t channel, uint8_t is_c2h,
+				uint8_t enable);
+
+int qdma_dump_reg_info(void *dev_hndl, uint32_t reg_addr,
+			uint32_t num_regs, char *buf, uint32_t buflen);
 
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* QDMA_ACCESS_H_ */
+#endif /* __QDMA_SOFT_ACCESS_H_ */

QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_soft_access/qdma_soft_reg.h

@@ -14,8 +14,8 @@
  * the file called "COPYING".
  */
 
-#ifndef QDMA_SOFT_REG_H__
-#define QDMA_SOFT_REG_H__
+#ifndef __QDMA_SOFT_REG_H__
+#define __QDMA_SOFT_REG_H__
 
 #ifdef __cplusplus
 extern "C" {
@@ -65,56 +65,7 @@ extern "C" {
 			(0xFFFFFFFFFFFFFFFF >> (BITS_PER_LONG_LONG - 1 - (h))))
 
 
-/*
- * Returns the number of trailing 0s in x, starting at LSB.
- * Same as gcc __builtin_ffsll function
- */
-#ifdef GCC_COMPILER
-static inline uint32_t get_trailing_zeros(uint64_t x)
-{
-	uint32_t rv =
-		__builtin_ffsll(x) - 1;
-	return rv;
-}
-#else
-static inline uint32_t get_trailing_zeros(uint64_t value)
-{
-	uint32_t pos = 0;
-
-	if ((value & 0xffffffff) == 0) {
-		pos += 32;
-		value >>= 32;
-	}
-	if ((value & 0xffff) == 0) {
-		pos += 16;
-		value >>= 16;
-	}
-	if ((value & 0xff) == 0) {
-		pos += 8;
-		value >>= 8;
-	}
-	if ((value & 0xf) == 0) {
-		pos += 4;
-		value >>= 4;
-	}
-	if ((value & 0x3) == 0) {
-		pos += 2;
-		value >>= 2;
-	}
-	if ((value & 0x1) == 0)
-		pos += 1;
-
-	return pos;
-}
-#endif
-
-#define FIELD_SHIFT(mask)       get_trailing_zeros(mask)
-#define FIELD_SET(mask, val)    ((val << FIELD_SHIFT(mask)) & mask)
-#define FIELD_GET(mask, reg)    ((reg & mask) >> FIELD_SHIFT(mask))
-
-/* polling a register */
-#define	QDMA_REG_POLL_DFLT_INTERVAL_US	10		    /* 10us per poll */
-#define	QDMA_REG_POLL_DFLT_TIMEOUT_US	(500*1000)	/* 500ms */
+#define DEBGFS_LINE_SZ			(81)
 
 
 #define QDMA_H2C_THROT_DATA_THRESH       0x4000
@@ -125,28 +76,6 @@ static inline uint32_t get_trailing_zeros(uint64_t value)
 /*
  * Q Context programming (indirect)
  */
-enum ind_ctxt_cmd_op {
-	QDMA_CTXT_CMD_CLR,
-	QDMA_CTXT_CMD_WR,
-	QDMA_CTXT_CMD_RD,
-	QDMA_CTXT_CMD_INV
-};
-
-enum ind_ctxt_cmd_sel {
-	QDMA_CTXT_SEL_SW_C2H,
-	QDMA_CTXT_SEL_SW_H2C,
-	QDMA_CTXT_SEL_HW_C2H,
-	QDMA_CTXT_SEL_HW_H2C,
-	QDMA_CTXT_SEL_CR_C2H,
-	QDMA_CTXT_SEL_CR_H2C,
-	QDMA_CTXT_SEL_CMPT,
-	QDMA_CTXT_SEL_PFTCH,
-	QDMA_CTXT_SEL_INT_COAL,
-	QDMA_CTXT_SEL_PASID_RAM_LOW,
-	QDMA_CTXT_SEL_PASID_RAM_HIGH,
-	QDMA_CTXT_SEL_TIMER,
-	QDMA_CTXT_SEL_FMAP,
-};
 
 #define QDMA_REG_IND_CTXT_REG_COUNT                         8
 #define QDMA_REG_IND_CTXT_WCNT_1                            1
@@ -197,9 +126,7 @@ enum ind_ctxt_cmd_sel {
 #define QDMA_SW_CTXT_W0_IRQ_ARM_MASK                        BIT(16)
 #define QDMA_SW_CTXT_W0_PIDX                                GENMASK(15, 0)
 
-/** QDMA_IND_REG_SEL_PFTCH */
-#define QDMA_PFTCH_CTXT_SW_CRDT_GET_H_MASK                  GENMASK(15, 3)
-#define QDMA_PFTCH_CTXT_SW_CRDT_GET_L_MASK                  GENMASK(2, 0)
+
 
 #define QDMA_PFTCH_CTXT_W1_VALID_MASK                       BIT(13)
 #define QDMA_PFTCH_CTXT_W1_SW_CRDT_H_MASK                   GENMASK(12, 0)
@@ -211,11 +138,8 @@ enum ind_ctxt_cmd_sel {
 #define QDMA_PFTCH_CTXT_W0_BUF_SIZE_IDX_MASK                GENMASK(4, 1)
 #define QDMA_PFTCH_CTXT_W0_BYPASS_MASK                      BIT(0)
 
-/** QDMA_IND_REG_SEL_CMPT */
-#define QDMA_COMPL_CTXT_BADDR_GET_H_MASK                    GENMASK_ULL(63, 38)
-#define QDMA_COMPL_CTXT_BADDR_GET_L_MASK                    GENMASK_ULL(37, 12)
-#define QDMA_COMPL_CTXT_PIDX_GET_H_MASK                     GENMASK(15, 4)
-#define QDMA_COMPL_CTXT_PIDX_GET_L_MASK                     GENMASK(3, 0)
+
+
 
 #define QDMA_COMPL_CTXT_W4_INTR_AGGR_MASK                   BIT(15)
 #define QDMA_COMPL_CTXT_W4_INTR_VEC_MASK                    GENMASK(14, 4)
@@ -256,9 +180,7 @@ enum ind_ctxt_cmd_sel {
 #define QDMA_CR_CTXT_W0_CREDT_MASK                          GENMASK(15, 0)
 
 /** QDMA_IND_REG_SEL_INTR */
-#define QDMA_INTR_CTXT_BADDR_GET_H_MASK                     GENMASK_ULL(63, 61)
-#define QDMA_INTR_CTXT_BADDR_GET_M_MASK                     GENMASK_ULL(60, 29)
-#define QDMA_INTR_CTXT_BADDR_GET_L_MASK                     GENMASK_ULL(28, 12)
+
 
 #define QDMA_INTR_CTXT_W2_AT_MASK                           BIT(18)
 #define QDMA_INTR_CTXT_W2_PIDX_MASK                         GENMASK(17, 6)
@@ -271,17 +193,9 @@ enum ind_ctxt_cmd_sel {
 #define QDMA_INTR_CTXT_W0_VEC_ID_MASK                       GENMASK(11, 1)
 #define QDMA_INTR_CTXT_W0_VALID_MASK                        BIT(0)
 
-/** Constants */
-#define QDMA_NUM_RING_SIZES                                 16
-#define QDMA_NUM_C2H_TIMERS                                 16
-#define QDMA_NUM_C2H_BUFFER_SIZES                           16
-#define QDMA_NUM_C2H_COUNTERS                               16
-#define QDMA_MM_CONTROL_RUN                                 0x1
-#define QDMA_MM_CONTROL_STEP                                0x100
-#define QDMA_MAGIC_NUMBER                                   0x1fd3
-#define QDMA_PIDX_STEP                                      0x10
-#define QDMA_CMPT_CIDX_STEP                                 0x10
-#define QDMA_INT_CIDX_STEP                                  0x10
+
+
+
 
 /* ------------------------ QDMA_TRQ_SEL_GLBL (0x00200)-------------------*/
 #define QDMA_OFFSET_GLBL_RNG_SZ                             0x204
@@ -459,9 +373,7 @@ enum ind_ctxt_cmd_sel {
 #define QDMA_OFFSET_GLBL2_CHANNEL_FUNC_RET                  0x12C
 #define QDMA_OFFSET_GLBL2_SYSTEM_ID                         0x130
 #define QDMA_OFFSET_GLBL2_MISC_CAP                          0x134
-#define     QDMA_GLBL2_MM_CMPT_EN_MASK                      BIT(2)
-#define     QDMA_GLBL2_FLR_PRESENT_MASK                     BIT(1)
-#define     QDMA_GLBL2_MAILBOX_EN_MASK                      BIT(0)
+
 #define     QDMA_GLBL2_DEVICE_ID_MASK                       GENMASK(31, 28)
 #define     QDMA_GLBL2_VIVADO_RELEASE_MASK                  GENMASK(27, 24)
 #define     QDMA_GLBL2_VERSAL_IP_MASK                       GENMASK(23, 20)
@@ -667,4 +579,4 @@ enum ind_ctxt_cmd_sel {
 }
 #endif
 
-#endif /* ifndef QDMA_SOFT_REG_H__ */
+#endif /* __QDMA_SOFT_REG_H__ */

QDMA/linux-kernel/driver/libqdma/qdma_context.c

@@ -207,7 +207,7 @@ static int make_cmpt_context(struct qdma_descq *descq,
 
 	cmpt_ctxt->bs_addr = descq->desc_cmpt_bus;
 	cmpt_ctxt->desc_sz = descq->conf.cmpl_desc_sz;
-	cmpt_ctxt->full_upd = descq->xdev->conf.intr_moderation;
+	cmpt_ctxt->full_upd = descq->conf.adaptive_rx;
 
 	cmpt_ctxt->valid = 1;
 

QDMA/linux-kernel/driver/libqdma/qdma_mbox.h

@@ -151,12 +151,12 @@ struct mbox_msg *qdma_mbox_msg_alloc(void);
 /**
  * __qdma_mbox_msg_free() - free the mailbox message
  *
- * @param	fname:	function name
+ * @param	f:		function name
  * @param	m:		mailbox message
  *
  * @return	none
  *****************************************************************************/
-void __qdma_mbox_msg_free(const char *fname, struct mbox_msg *m);
+void __qdma_mbox_msg_free(const char *f, struct mbox_msg *m);
 #define qdma_mbox_msg_free(m)	__qdma_mbox_msg_free(__func__, m)
 
 #endif /* #ifndef __QDMA_MBOX_H__ */