Commit a8e0c180 authored by Karen Xie's avatar Karen Xie

QDMA Reference Drivers 2018.3 release

parent 41195dfe
Release: 2018.3
===============
This release is based on DPDK v17.11.1 containing QDMA poll mode driver and
QDMA test application.
This release includes a patch file for dpdk-pktgen v3.4.7 that extends
dpdk-pktgen application to handle packets with packet sizes more than 1518 bytes
and it disables the packet size classification logic in dpdk-pktgen to remove
application overhead in performance measurement.
This patch is used for performance testing with dpdk-pktgen application.
The driver is validated against dpdk-pktgen and testpmd applications for API compliance.
2018.3 driver is not backward compatible with 2018.2 and earlier QDMA IP.
SUPPORTED FEATURES:
===================
- Support for both the AXI4 Memory Mapped(MM) and AXI4 Streaming(ST) Interfaces
- 2048 Queue Sets
- 2048 H2C Descriptor Rings
- 2048 C2H Descriptor Rings
- 2048 C2H Completion Rings
- Supports Polling Mode
- Supports SR-IOV with 4 Physical Functions(PF) and 252 Virtual Functions(VF)
- Allows Only Privileged/Physical functions to program the contexts and registers
- Function Level Reset(FLR) Support
- Mailbox Support
- Supports Descriptor Prefetch
- ST H2C to C2H and C2H to H2C loopback support
- Zero-byte transfer support
2018.3 Features
- Descriptor (8, 16, 32, 64 bytes) bypass support
- Support for Completion queue descriptors of 64 bytes size
- Support flexible BAR mapping for QDMA configuration register space
- Support disabling overflow check in completion ring
- Indirect programming of FMAP registers
KNOWN ISSUES:
============
- Occasionally, C2H completions are not observed when payload and immediate data transfers are combined
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# BSD LICENSE
#
# Copyright(c) 2017-2018 Xilinx, Inc. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# * Neither the name of the copyright holder nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
include $(RTE_SDK)/mk/rte.vars.mk
## if modified this BRAM_SIZE, then the same should be modified in the testapp Makefile also
## default set to 512KB
BRAM_SIZE ?= 524288
#
# library name
#
LIB = librte_pmd_qdma.a
# library version
LIBABIVER := 1
# versioning export map
EXPORT_MAP := rte_pmd_qdma_version.map
CFLAGS += -O3 -DDMA_BRAM_SIZE=$(BRAM_SIZE)
#CFLAGS += -g
CFLAGS += $(WERROR_FLAGS)
ifeq ($(TEST_64B_DESC_BYPASS),1)
CFLAGS += -DTEST_64B_DESC_BYPASS
endif
# this lib depends upon:
LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring
LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs
LDLIBS += -lrte_bus_pci
#
# all source are stored in SRCS-y
#
SRCS-$(CONFIG_RTE_LIBRTE_QDMA_PMD) += qdma_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_QDMA_PMD) += qdma_vf_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_QDMA_PMD) += qdma_devops.c
SRCS-$(CONFIG_RTE_LIBRTE_QDMA_PMD) += qdma_common.c
SRCS-$(CONFIG_RTE_LIBRTE_QDMA_PMD) += qdma_rxtx.c
SRCS-$(CONFIG_RTE_LIBRTE_QDMA_PMD) += qdma_xdebug.c
#
## Export include files
#
SYMLINK-y-include += qdma_export.h
include $(RTE_SDK)/mk/rte.lib.mk
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/*-
* BSD LICENSE
*
* Copyright(c) 2017-2018 Xilinx, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __QDMA_EXPORT_H__
#define __QDMA_EXPORT_H__
#include <rte_dev.h>
#include <rte_ethdev.h>
#include <rte_spinlock.h>
#include <rte_log.h>
#include <rte_byteorder.h>
#include <rte_memzone.h>
#include <linux/pci.h>
enum rte_xdebug_type {
ETH_XDEBUG_QDMA_GLOBAL_CSR,
ETH_XDEBUG_QUEUE_CONTEXT,
ETH_XDEBUG_QUEUE_STRUCT,
ETH_XDEBUG_QUEUE_DESC_DUMP,
ETH_XDEBUG_MAX,
};
enum rte_xdebug_desc_type {
ETH_XDEBUG_DESC_C2H,
ETH_XDEBUG_DESC_H2C,
ETH_XDEBUG_DESC_CMPT,
ETH_XDEBUG_DESC_MAX,
};
struct rte_xdebug_desc_param {
uint16_t queue;
int start;
int end;
enum rte_xdebug_desc_type type;
};
int qdma_xdebug(uint8_t port_id, enum rte_xdebug_type type,
void *params);
#endif /* ifndef __QDMA_EXPORT_H__ */
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/*-
* BSD LICENSE
*
* Copyright(c) 2018 Xilinx, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __QDMA_USER_H__
#define __QDMA_USER_H__
/**
* @file
* @brief This file contains example design/user logic controlled
* data structures
* The driver is specific to an example design, if the example design
* changes user controlled parameters, this file needs to be modified
* appropriately.
* Structures for Completion entry, Descriptor bypass can be added here.
*/
/**
* C2H Completion entry structure
* This structure is specific for the example design.
* Processing of this ring happens in qdma_rxtx.c.
*/
struct __attribute__ ((packed)) c2h_cmpt_ring
{
volatile uint32_t data_frmt:1; /* For 2018.2 IP, this field
* determines the Standard or User
* format of completion entry
*/
volatile uint32_t color:1; /* This field inverts every time
* PIDX wraps the completion ring
*/
volatile uint32_t err:1; /* Indicates that C2H engine
* encountered a descriptor
* error
*/
volatile uint32_t desc_used:1; /* Indicates that the completion
* packet consumes descriptor in
* C2H ring
*/
volatile uint32_t length:16; /* Indicates length of the data
* packet
*/
volatile uint32_t user_rsv:4; /* Reserved field */
volatile uint8_t user_def[]; /* User logic defined data of
* length based on CMPT entry
* length
*/
};
#endif /* ifndef __QDMA_USER_H__ */
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/*-
* BSD LICENSE
*
* Copyright(c) 2017-2018 Xilinx, Inc. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __QDMA_VERSION_H__
#define __QDMA_VERSION_H__
#define qdma_stringify1(x...) #x
#define qdma_stringify(x...) qdma_stringify1(x)
#define QDMA_PMD_MAJOR 2018
#define QDMA_PMD_MINOR 3
#define QDMA_PMD_PATCHLEVEL 19
#define QDMA_PMD_VERSION \
qdma_stringify(QDMA_PMD_MAJOR) "." \
qdma_stringify(QDMA_PMD_MINOR) "." \
qdma_stringify(QDMA_PMD_PATCHLEVEL)
#define QDMA_PMD_VERSION_NUMBER \
((QDMA_PMD_MAJOR) * 1000 + (QDMA_PMD_MINOR) * 100 + QDMA_PMD_PATCHLEVEL)
#endif /* ifndef __QDMA_VERSION_H__ */
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0001-PKTGEN-3.4.5-Patch-to-add-Jumbo-packet-support.patch is the patch file
over dpdk-pktgen v3.4.7 that extends dpdk-pktgen application to handle packets
with packet sizes more than 1518 bytes and it disables the packet size
classification logic in dpdk-pktgen to remove application overhead in
performance measurement.
This patch is used for performance testing with dpdk-pktgen application.
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docs/README
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KERNEL=="qdma[0-4]-MM-[0-9]*", MODE="0666"
KERNEL=="qdma[0-4]-ST-[0-9]*", MODE="0666"
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#Build flags common to xdma/qdma
ifeq ($(VF),1)
EXTRA_FLAGS += -D__QDMA_VF__
PFVF_TYPE = _vf
else
PFVF_TYPE =
endif
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