NEON: implement all intrinsics supported by architecture A64-remaining part (#1093)

* [NEON] Add 5 intrinsics (vdiv{h/q}_f{16/64}).
* [NEON] Add 11 dup_lane series intrinsics.
- 2 dup{q}_laneq_f16
- 9 dup{b,h}_lane{q}_{s/u}{8,16}, duph_laneq_f16
* [NEON] Add 8 intrinsics (veor3q{s/u}{8/16/32/64}).
* [NEON] Add fmlal, fmlsl, maxnmv, minnmv, pmaxnm, pminnm.
* [NEON] Add 12 fmlal series intrinsics.
* [NEON] Add 12 fmlsl series intrinsics.
* [NEON] Add 11 vmax series intrinsics.
- 1 vmaxh_f16
- 3 vmaxnm{/h/q}_f16
- 5 vmaxnmv{q}_f{16/32/64}
- 2 vmaxv{q}_f16
* [NEON] Add 11 vmin series intrinsics.
- 1 vminh_f16
- 3 vminnm{/h/q}_f16
- 5 vminnmv{q}_f{16/32/64}
- 2 vminv{q}_f16
* [NEON] Add 8 vpmax series intrinsics.
- 1 vpmaxq_f16
- 7 vpmaxnm{/s/q/qd}_f{16/32/64}
* [NEON] Add 9 vpmin series intrinsics.
- 2 vpmin{q}_f16
- 7 vpminnm{/s/q/qd}_f{16/32/64}
* [NEON] Add 8 intrinsic function families.
mmlaq, mull_high_lane, mull_high_n, mulx,
mulx_lane, mulx_n, qrdmlah, qmovun_high.
* [NEON] Add 3 vmmlaq series intrinsics.
* [NEON] Add 41 vmul-related intrinsics.
- 8 mull_high_lane series intrinsics
- 4 mull_high_n series intrinsics
- 9 vmulx series intrinsics
- 2 vmulx{q}_n_f16 series intrinsics
- 18 vmulx_lane series intrinsics
* [NEON] Add 1 vpaddq_f16 intrinsic.
* [NEON] Add 3 vqmovun_high_s{16/32/64} intrinsic.
* [NEON] Add 6 vqrdmlah series intrinsics.
* [NEON] Add 11 series intrinsics.
qrdmlah_lane, qrdmlsh, qrdmlsh_lane, qshrun_high_n,
rnd32x, rnd32z, rnd64x, rnd64z, rnda, rndx, shll_high_n.
* [NEON] Add 30 vqrdmlah, vqrdmlsh related intrinsics.
- 12 vqrdmlah{h/s/q}_lane{q}_s{16/32}
- 6 vqrdmlsh{h/s/q}_s{16/32}
- 12 vqrdmlsh{h/s/q}_lane{q}_s{16/32}
* [NEON] Add 2 vqrdmulhh_lane{q}_s16 intrinsics.
* [NEON] Add 5 vqsh related intrinsics.
- 1 vqshluh_n_s16
- 3 vqshrun_high_n_s{16/32/64}
- 1 vqshrun_n_s16
* [NEON] Add 16 vrnd32x, vrnd32z, vrnd64x, vrnd64z related intrinsics.
- 4 vrnd32x{q}_f{32/64}
- 4 vrnd32z{q}_f{32/64}
- 4 vrnd64x{q}_f{32/64}
- 4 vrnd64x{q}_f{32/64}
* [NEON] Add vrnd{/a/i/m/p/x} related intrinsics.
- 3 vrnd{/h/q}_f16
- 3 vrndi{/h/q}_f16
- 3 vrndm{/h/q}_f16
- 3 vrndp{/h/q}_f16
- 7 vrnda{q}_f{16/32/64}, vrndah_f16
- 7 vrndx{q}_f{16/32/64}, vrndxh_f16
* [NEON] Add 6 vshll_high_n series intrinsics.
* [NEON] Add 7 intrinsic series.
cadd_rot270, cadd_rot90, shrn_high_n, subhn_high,
sudot_lane, usdot, usdot_lane
* [NEON] Add 2 vcmla{q}_f16 intrinsics
* [NEON] Add 6 vshrn_high_n series intrinsics
* [NEON] Add 6 vsubhn_high series intrinsics
* [NEON] Add 10 vsudot_lane, vusdot, and vusdot_lane series intrinsics.
- 4 sudot{q}_lane{q}_s32
- 2 vusdot{q}_s32
- 4 vusdot{q}_lane{q}_s32
* [NEON] Add 10 vadd{q}_rot{90/270}_f{16/32/64} intrinsics.
* [NEON] Add 5 series intrinsics.
cmla_lane, cmla_rot180_lane, cmla_rot270_lane, cmla_rot90_lane, recpx.
* [NEON] Add 38 vcmla related intrinsics.
- 8 cvmla{q}_lane{q}_f{16/32}
- 2 cvmla{q}_rot90_f16
- 8 cvmla{q}_rot90_lane{q}_f{16/32}
- 2 cvmla{q}_rot180_f16
- 8 cvmla{q}_rot180_lane{q}_f{16/32}
- 2 cvmla{q}_rot270_f16
- 8 cvmla{q}_rot270_lane{q}_f{16/32}
* [NEON] Add vrecpeh_f16 and vrecpsh_f16 intrinsics.
* [NEON] Add 3 vrecpx{h,s,d}_f{16,32,64} intrinsics.
* [NEON] Add 8 series intrinsics.
__crc32, ras, sha1, sha256, sha512, sm3, sm4
* [NEON] Add 8 __crc series intrinsics.
* [NEON] Add vrax1q_u64 intrinsic
* [NEON] Add sha1, sha256, and sha512 series intrinsics
* [NEON] Add sm3 and sm4 series intrinsics
* [NEON] Include <arm_acle.h> for __crc32 intrinsics
* [NEON] Use uint to simulate the poly type and implement it
* [NEON] Add poly type related intrinsics
* [NEON] Add ldr and str related intrinsics.
Co-authored-by: Eric Yi-Yen Chung <eric681@andestech.com>
Co-authored-by: Michael R. Crusoe <michael.crusoe@gmail.com>

arm/neon.h

@@ -71,12 +71,12 @@
 #include "neon/clz.h"
 #include "neon/cmla.h"
 #include "neon/cmla_lane.h"
+#include "neon/cmla_rot180.h"
 #include "neon/cmla_rot180_lane.h"
+#include "neon/cmla_rot270.h"
 #include "neon/cmla_rot270_lane.h"
-#include "neon/cmla_rot90_lane.h"
 #include "neon/cmla_rot90.h"
-#include "neon/cmla_rot180.h"
-#include "neon/cmla_rot270.h"
+#include "neon/cmla_rot90_lane.h"
 #include "neon/cnt.h"
 #include "neon/cvt.h"
 #include "neon/cvt_n.h"
@@ -85,6 +85,7 @@
 #include "neon/cvtp.h"
 #include "neon/combine.h"
 #include "neon/copy_lane.h"
+#include "neon/crc32.h"
 #include "neon/create.h"
 #include "neon/div.h"
 #include "neon/dot.h"
@@ -96,6 +97,8 @@
 #include "neon/fma.h"
 #include "neon/fma_lane.h"
 #include "neon/fma_n.h"
+#include "neon/fmlal.h"
+#include "neon/fmlsl.h"
 #include "neon/fms.h"
 #include "neon/fms_lane.h"
 #include "neon/fms_n.h"
@@ -124,9 +127,11 @@
 #include "neon/ld4_lane.h"
 #include "neon/max.h"
 #include "neon/maxnm.h"
+#include "neon/maxnmv.h"
 #include "neon/maxv.h"
 #include "neon/min.h"
 #include "neon/minnm.h"
+#include "neon/minnmv.h"
 #include "neon/minv.h"
 #include "neon/mla.h"
 #include "neon/mla_lane.h"
@@ -146,7 +151,7 @@
 #include "neon/mlsl_high_n.h"
 #include "neon/mlsl_lane.h"
 #include "neon/mlsl_n.h"
-//#include "neon/mmlaq.h"
+#include "neon/mmlaq.h"
 #include "neon/movl.h"
 #include "neon/movl_high.h"
 #include "neon/movn.h"
@@ -156,8 +161,13 @@
 #include "neon/mul_n.h"
 #include "neon/mull.h"
 #include "neon/mull_high.h"
+#include "neon/mull_high_lane.h"
+#include "neon/mull_high_n.h"
 #include "neon/mull_lane.h"
 #include "neon/mull_n.h"
+#include "neon/mulx.h"
+#include "neon/mulx_lane.h"
+#include "neon/mulx_n.h"
 #include "neon/mvn.h"
 #include "neon/neg.h"
 #include "neon/orn.h"
@@ -166,7 +176,9 @@
 #include "neon/padd.h"
 #include "neon/paddl.h"
 #include "neon/pmax.h"
+#include "neon/pmaxnm.h"
 #include "neon/pmin.h"
+#include "neon/pminnm.h"
 #include "neon/qabs.h"
 #include "neon/qadd.h"
 #include "neon/qdmlal.h"
@@ -190,6 +202,10 @@
 #include "neon/qdmull_high_n.h"
 #include "neon/qdmull_lane.h"
 #include "neon/qdmull_n.h"
+#include "neon/qrdmlah.h"
+#include "neon/qrdmlah_lane.h"
+#include "neon/qrdmlsh.h"
+#include "neon/qrdmlsh_lane.h"
 #include "neon/qrdmulh.h"
 #include "neon/qrdmulh_lane.h"
 #include "neon/qrdmulh_n.h"
@@ -199,8 +215,9 @@
 #include "neon/qrshrun_high_n.h"
 #include "neon/qrshrun_n.h"
 #include "neon/qmovn.h"
-#include "neon/qmovun.h"
 #include "neon/qmovn_high.h"
+#include "neon/qmovun.h"
+#include "neon/qmovun_high.h"
 #include "neon/qneg.h"
 #include "neon/qsub.h"
 #include "neon/qshl.h"
@@ -208,24 +225,33 @@
 #include "neon/qshlu_n.h"
 #include "neon/qshrn_high_n.h"
 #include "neon/qshrn_n.h"
+#include "neon/qshrun_high_n.h"
 #include "neon/qshrun_n.h"
 #include "neon/qtbl.h"
 #include "neon/qtbx.h"
 #include "neon/raddhn.h"
 #include "neon/raddhn_high.h"
+#include "neon/rax.h"
 #include "neon/rbit.h"
 #include "neon/recpe.h"
 #include "neon/recps.h"
+#include "neon/recpx.h"
 #include "neon/reinterpret.h"
 #include "neon/rev16.h"
 #include "neon/rev32.h"
 #include "neon/rev64.h"
 #include "neon/rhadd.h"
 #include "neon/rnd.h"
+#include "neon/rnd32x.h"
+#include "neon/rnd32z.h"
+#include "neon/rnd64x.h"
+#include "neon/rnd64z.h"
+#include "neon/rnda.h"
 #include "neon/rndm.h"
 #include "neon/rndi.h"
 #include "neon/rndn.h"
 #include "neon/rndp.h"
+#include "neon/rndx.h"
 #include "neon/rshl.h"
 #include "neon/rshr_n.h"
 #include "neon/rshrn_high_n.h"
@@ -236,12 +262,19 @@
 #include "neon/rsubhn.h"
 #include "neon/rsubhn_high.h"
 #include "neon/set_lane.h"
+#include "neon/sha1.h"
+#include "neon/sha256.h"
+#include "neon/sha512.h"
 #include "neon/shl.h"
 #include "neon/shl_n.h"
+#include "neon/shll_high_n.h"
 #include "neon/shll_n.h"
 #include "neon/shr_n.h"
+#include "neon/shrn_high_n.h"
 #include "neon/shrn_n.h"
 #include "neon/sli_n.h"
+#include "neon/sm3.h"
+#include "neon/sm4.h"
 #include "neon/sqadd.h"
 #include "neon/sqrt.h"
 #include "neon/sra_n.h"
@@ -262,10 +295,12 @@
 #include "neon/st4_lane.h"
 #include "neon/sub.h"
 #include "neon/subhn.h"
+#include "neon/subhn_high.h"
 #include "neon/subl.h"
 #include "neon/subl_high.h"
 #include "neon/subw.h"
 #include "neon/subw_high.h"
+#include "neon/sudot_lane.h"
 #include "neon/tbl.h"
 #include "neon/tbx.h"
 #include "neon/trn.h"
@@ -273,6 +308,8 @@
 #include "neon/trn2.h"
 #include "neon/tst.h"
 #include "neon/uqadd.h"
+#include "neon/usdot.h"
+#include "neon/usdot_lane.h"
 #include "neon/uzp.h"
 #include "neon/uzp1.h"
 #include "neon/uzp2.h"

arm/neon/add.h

@@ -22,6 +22,7 @@
  *
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_ADD_H)
@@ -738,6 +739,172 @@ simde_vaddq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
   #define vaddq_u64(a, b) simde_vaddq_u64((a), (b))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vadd_p8(simde_poly8x8_t a, simde_poly8x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(_GCC_ARM_NEON_H)
+    return vadd_p8(a, b);
+  #else
+    simde_poly8x8_private
+      r_,
+      a_ = simde_poly8x8_to_private(a),
+      b_ = simde_poly8x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = b_.values[i] ^ ((0 ^ a_.values[i]) & 0xFF);
+    }
+
+    return simde_poly8x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vadd_p8
+  #define vadd_p8(a, b) simde_vadd_p8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vadd_p16(simde_poly16x4_t a, simde_poly16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(_GCC_ARM_NEON_H)
+    return vadd_p16(a, b);
+  #else
+    simde_poly16x4_private
+      r_,
+      a_ = simde_poly16x4_to_private(a),
+      b_ = simde_poly16x4_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = b_.values[i] ^ ((0 ^ a_.values[i]) & 0xFFFF);
+    }
+
+    return simde_poly16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vadd_p16
+  #define vadd_p16(a, b) simde_vadd_p16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vadd_p64(simde_poly64x1_t a, simde_poly64x1_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_CRYPTO) && \
+      !defined(_GCC_ARM_NEON_H)
+    return vadd_p64(a, b);
+  #else
+    simde_poly64x1_private
+      r_,
+      a_ = simde_poly64x1_to_private(a),
+      b_ = simde_poly64x1_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = b_.values[i] ^ ((0 ^ a_.values[i]) & 0xFFFFFFFFFFFFFFFF);
+    }
+
+    return simde_poly64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vadd_p64
+  #define vadd_p64(a, b) simde_vadd_p64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vaddq_p8(simde_poly8x16_t a, simde_poly8x16_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(_GCC_ARM_NEON_H)
+    return vaddq_p8(a, b);
+  #else
+    simde_poly8x16_private
+      r_,
+      a_ = simde_poly8x16_to_private(a),
+      b_ = simde_poly8x16_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = b_.values[i] ^ ((0 ^ a_.values[i]) & 0xFF);
+    }
+
+    return simde_poly8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vaddq_p8
+  #define vaddq_p8(a, b) simde_vaddq_p8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vaddq_p16(simde_poly16x8_t a, simde_poly16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(_GCC_ARM_NEON_H)
+    return vaddq_p16(a, b);
+  #else
+    simde_poly16x8_private
+      r_,
+      a_ = simde_poly16x8_to_private(a),
+      b_ = simde_poly16x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = b_.values[i] ^ ((0 ^ a_.values[i]) & 0xFFFF);
+    }
+
+    return simde_poly16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vaddq_p16
+  #define vaddq_p16(a, b) simde_vaddq_p16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vaddq_p64(simde_poly64x2_t a, simde_poly64x2_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_CRYPTO) && \
+      !defined(_GCC_ARM_NEON_H)
+    return vaddq_p64(a, b);
+  #else
+    simde_poly64x2_private
+      r_,
+      a_ = simde_poly64x2_to_private(a),
+      b_ = simde_poly64x2_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = b_.values[i] ^ ((0 ^ a_.values[i]) & 0xFFFFFFFFFFFFFFFF);
+    }
+
+    return simde_poly64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vaddq_p64
+  #define vaddq_p64(a, b) simde_vaddq_p64((a), (b))
+#endif
+
+#if !defined(SIMDE_TARGET_NOT_SUPPORT_INT128_TYPE)
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly128_t
+simde_vaddq_p128(simde_poly128_t a, simde_poly128_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_CRYPTO) && \
+      !defined(_GCC_ARM_NEON_H)
+    return vaddq_p128(a, b);
+  #else
+    simde_poly128_t mask = 0xFFFFFFFFFFFFFFFFull;
+    mask = mask << 64;
+    mask = mask | 0xFFFFFFFFFFFFFFFFull;
+    return b ^ ((0 ^ a) & mask);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vaddq_p128
+  #define vaddq_p128(a, b) simde_vaddq_p128((a), (b))
+#endif
+#endif /* !defined(SIMDE_TARGET_NOT_SUPPORT_INT128_TYPE) */
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/aes.h

@@ -34,7 +34,7 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
-static uint8_t xtime(uint8_t x)
+static uint8_t simde_xtime(uint8_t x)
 {
   return HEDLEY_STATIC_CAST(uint8_t, (x<<1) ^ (((x>>7) & 1) * 0x1b));
 }
@@ -152,10 +152,10 @@ simde_vaesmcq_u8(simde_uint8x16_t data) {
     {
       t   = a_.values[i*4+0];
       Tmp = a_.values[i*4+0] ^ a_.values[i*4+1] ^ a_.values[i*4+2] ^ a_.values[i*4+3] ;
-      Tm  = a_.values[i*4+0] ^ a_.values[i*4+1] ; Tm = xtime(Tm);  a_.values[i*4+0] ^= Tm ^ Tmp ;
-      Tm  = a_.values[i*4+1] ^ a_.values[i*4+2] ; Tm = xtime(Tm);  a_.values[i*4+1] ^= Tm ^ Tmp ;
-      Tm  = a_.values[i*4+2] ^ a_.values[i*4+3] ; Tm = xtime(Tm);  a_.values[i*4+2] ^= Tm ^ Tmp ;
-      Tm  = a_.values[i*4+3] ^ t ;        Tm = xtime(Tm);  a_.values[i*4+3] ^= Tm ^ Tmp ;
+      Tm  = a_.values[i*4+0] ^ a_.values[i*4+1] ; Tm = simde_xtime(Tm);  a_.values[i*4+0] ^= Tm ^ Tmp ;
+      Tm  = a_.values[i*4+1] ^ a_.values[i*4+2] ; Tm = simde_xtime(Tm);  a_.values[i*4+1] ^= Tm ^ Tmp ;
+      Tm  = a_.values[i*4+2] ^ a_.values[i*4+3] ; Tm = simde_xtime(Tm);  a_.values[i*4+2] ^= Tm ^ Tmp ;
+      Tm  = a_.values[i*4+3] ^ t ;        Tm = simde_xtime(Tm);  a_.values[i*4+3] ^= Tm ^ Tmp ;
     }
     return simde_uint8x16_from_private(a_);
   #endif
@@ -168,10 +168,10 @@ simde_vaesmcq_u8(simde_uint8x16_t data) {
 static uint8_t Multiply(uint8_t x, uint8_t y)
 {
   return (((y & 1) * x) ^
-       ((y>>1 & 1) * xtime(x)) ^
-       ((y>>2 & 1) * xtime(xtime(x))) ^
-       ((y>>3 & 1) * xtime(xtime(xtime(x)))) ^
-       ((y>>4 & 1) * xtime(xtime(xtime(xtime(x)))))); /* this last call to xtime() can be omitted */
+       ((y>>1 & 1) * simde_xtime(x)) ^
+       ((y>>2 & 1) * simde_xtime(simde_xtime(x))) ^
+       ((y>>3 & 1) * simde_xtime(simde_xtime(simde_xtime(x)))) ^
+       ((y>>4 & 1) * simde_xtime(simde_xtime(simde_xtime(simde_xtime(x)))))); /* this last call to simde_xtime() can be omitted */
 }
 
 SIMDE_FUNCTION_ATTRIBUTES

arm/neon/bsl.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_BSL_H)
@@ -755,6 +756,156 @@ simde_vbslq_u64(simde_uint64x2_t a, simde_uint64x2_t b, simde_uint64x2_t c) {
   #define vbslq_u64(a, b, c) simde_vbslq_u64((a), (b), (c))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vbsl_p8(simde_uint8x8_t a, simde_poly8x8_t b, simde_poly8x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vbsl_p8(a, b, c);
+  #else
+    simde_poly8x8_private
+      r_,
+      b_ = simde_poly8x8_to_private(b),
+      c_ = simde_poly8x8_to_private(c);
+    simde_uint8x8_private a_ = simde_uint8x8_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (b_.values[i] & a_.values[i]) | (c_.values[i] & ~a_.values[i]);
+    }
+
+    return simde_poly8x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vbsl_p8
+  #define vbsl_p8(a, b, c) simde_vbsl_p8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vbsl_p16(simde_uint16x4_t a, simde_poly16x4_t b, simde_poly16x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vbsl_p16(a, b, c);
+  #else
+    simde_poly16x4_private
+      r_,
+      b_ = simde_poly16x4_to_private(b),
+      c_ = simde_poly16x4_to_private(c);
+    simde_uint16x4_private a_ = simde_uint16x4_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (b_.values[i] & a_.values[i]) | (c_.values[i] & ~a_.values[i]);
+    }
+
+    return simde_poly16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vbsl_p16
+  #define vbsl_p16(a, b, c) simde_vbsl_p16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vbsl_p64(simde_uint64x1_t a, simde_poly64x1_t b, simde_poly64x1_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vbsl_p64(a, b, c);
+  #else
+    simde_poly64x1_private
+      r_,
+      b_ = simde_poly64x1_to_private(b),
+      c_ = simde_poly64x1_to_private(c);
+    simde_uint64x1_private a_ = simde_uint64x1_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (b_.values[i] & a_.values[i]) | (c_.values[i] & ~a_.values[i]);
+    }
+
+    return simde_poly64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vbsl_p64
+  #define vbsl_p64(a, b, c) simde_vbsl_p64((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vbslq_p8(simde_uint8x16_t a, simde_poly8x16_t b, simde_poly8x16_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vbslq_p8(a, b, c);
+  #else
+    simde_poly8x16_private
+      r_,
+      b_ = simde_poly8x16_to_private(b),
+      c_ = simde_poly8x16_to_private(c);
+    simde_uint8x16_private a_ = simde_uint8x16_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (b_.values[i] & a_.values[i]) | (c_.values[i] & ~a_.values[i]);
+    }
+
+    return simde_poly8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vbslq_p8
+  #define vbslq_p8(a, b, c) simde_vbslq_p8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vbslq_p16(simde_uint16x8_t a, simde_poly16x8_t b, simde_poly16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vbslq_p16(a, b, c);
+  #else
+    simde_poly16x8_private
+      r_,
+      b_ = simde_poly16x8_to_private(b),
+      c_ = simde_poly16x8_to_private(c);
+    simde_uint16x8_private a_ = simde_uint16x8_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (b_.values[i] & a_.values[i]) | (c_.values[i] & ~a_.values[i]);
+    }
+
+    return simde_poly16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vbslq_p16
+  #define vbslq_p16(a, b, c) simde_vbslq_p16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vbslq_p64(simde_uint64x2_t a, simde_poly64x2_t b, simde_poly64x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vbslq_p64(a, b, c);
+  #else
+    simde_poly64x2_private
+      r_,
+      b_ = simde_poly64x2_to_private(b),
+      c_ = simde_poly64x2_to_private(c);
+    simde_uint64x2_private a_ = simde_uint64x2_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (b_.values[i] & a_.values[i]) | (c_.values[i] & ~a_.values[i]);
+    }
+
+    return simde_poly64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vbslq_p64
+  #define vbslq_p64(a, b, c) simde_vbslq_p64((a), (b), (c))
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/ceq.h

@@ -22,6 +22,7 @@
  *
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_CEQ_H)
@@ -766,6 +767,102 @@ simde_vceqq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
   #define vceqq_u64(a, b) simde_vceqq_u64((a), (b))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x8_t
+simde_vceq_p8(simde_poly8x8_t a, simde_poly8x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vceq_p8(a, b);
+  #else
+    simde_uint8x8_private r_;
+    simde_poly8x8_private
+      a_ = simde_poly8x8_to_private(a),
+      b_ = simde_poly8x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (a_.values[i] == b_.values[i]) ? HEDLEY_STATIC_CAST(uint8_t, ~UINT8_C(0)) : HEDLEY_STATIC_CAST(uint8_t, UINT8_C(0));
+    }
+
+    return simde_uint8x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vceq_p8
+  #define vceq_p8(a, b) simde_vceq_p8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16_t
+simde_vceqq_p8(simde_poly8x16_t a, simde_poly8x16_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vceqq_p8(a, b);
+  #else
+    simde_uint8x16_private r_;
+    simde_poly8x16_private
+      a_ = simde_poly8x16_to_private(a),
+      b_ = simde_poly8x16_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (a_.values[i] == b_.values[i]) ? HEDLEY_STATIC_CAST(uint8_t, ~UINT8_C(0)) : HEDLEY_STATIC_CAST(uint8_t, UINT8_C(0));
+    }
+
+    return simde_uint8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vceqq_p8
+  #define vceqq_p8(a, b) simde_vceqq_p8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1_t
+simde_vceq_p64(simde_poly64x1_t a, simde_poly64x1_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vceq_p64(a, b);
+  #else
+    simde_uint64x1_private r_;
+    simde_poly64x1_private
+      a_ = simde_poly64x1_to_private(a),
+      b_ = simde_poly64x1_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (a_.values[i] == b_.values[i]) ? ~UINT64_C(0) : UINT64_C(0);
+    }
+
+    return simde_uint64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vceq_p64
+  #define vceq_p64(a, b) simde_vceq_p64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vceqq_p64(simde_poly64x2_t a, simde_poly64x2_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vceqq_p64(a, b);
+  #else
+    simde_uint64x2_private r_;
+    simde_poly64x2_private
+      a_ = simde_poly64x2_to_private(a),
+      b_ = simde_poly64x2_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = (a_.values[i] == b_.values[i]) ? ~UINT64_C(0) : UINT64_C(0);
+    }
+
+    return simde_uint64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vceqq_p64
+  #define vceqq_p64(a, b) simde_vceqq_p64((a), (b))
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/ceqz.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_CEQZ_H)
@@ -415,6 +416,62 @@ simde_vceqzd_f64(simde_float64_t a) {
   #define vceqzd_f64(a) simde_vceqzd_f64((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x8_t
+simde_vceqz_p8(simde_poly8x8_t a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vceqz_p8(a);
+  #else
+    return simde_vceq_p8(a, simde_vdup_n_p8(0));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vceqz_p8
+  #define vceqz_p8(a) simde_vceqz_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16_t
+simde_vceqzq_p8(simde_poly8x16_t a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vceqzq_p8(a);
+  #else
+    return simde_vceqq_p8(a, simde_vdupq_n_p8(0));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vceqzq_p8
+  #define vceqzq_p8(a) simde_vceqzq_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x1_t
+simde_vceqz_p64(simde_poly64x1_t a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vceqz_p64(a);
+  #else
+    return simde_vceq_p64(a, simde_vdup_n_p64(0));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vceqz_p64
+  #define vceqz_p64(a) simde_vceqz_p64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_vceqzq_p64(simde_poly64x2_t a) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vceqzq_p64(a);
+  #else
+    return simde_vceqq_p64(a, simde_vdupq_n_p64(0));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vceqzq_p64
+  #define vceqzq_p64(a) simde_vceqzq_p64((a))
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/cmla.h

@@ -22,6 +22,7 @@
 *
 * Copyright:
 *   2021      Atharva Nimbalkar <atharvakn@gmail.com>
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
 */
 
 #if !defined(SIMDE_ARM_NEON_CMLA_H)
@@ -33,12 +34,47 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vcmla_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmla_f16(r, a, b);
+  #else
+    simde_float16x4_private
+      r_ = simde_float16x4_to_private(r),
+      a_ = simde_float16x4_to_private(a),
+      b_ = simde_float16x4_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0]) / 2) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) +
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) +
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+    }
+
+    return simde_float16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmla_f16
+  #define vcmla_f16(r, a, b) simde_vcmla_f16(r, a, b)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vcmla_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmla_f32(r, a, b);
   #else
     simde_float32x2_private
@@ -64,12 +100,47 @@ simde_vcmla_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
   #define vcmla_f32(r, a, b) simde_vcmla_f32(r, a, b)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vcmlaq_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmlaq_f16(r, a, b);
+  #else
+    simde_float16x8_private
+      r_ = simde_float16x8_to_private(r),
+      a_ = simde_float16x8_to_private(a),
+      b_ = simde_float16x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0]) / 2) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) +
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) +
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+    }
+
+    return simde_float16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmlaq_f16
+  #define vcmlaq_f16(r, a, b) simde_vcmlaq_f16(r, a, b)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x4_t
 simde_vcmlaq_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_f32(r, a, b);
   #else
     simde_float32x4_private
@@ -102,7 +173,8 @@ simde_float64x2_t
 simde_vcmlaq_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x2_t b) {
   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_f64(r, a, b);
   #else
     simde_float64x2_private

arm/neon/cmla_rot180.h

@@ -22,6 +22,7 @@
 *
 * Copyright:
 *   2021      Atharva Nimbalkar <atharvakn@gmail.com>
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
 */
 
 #if !defined(SIMDE_ARM_NEON_CMLA_ROT180_H)
@@ -33,12 +34,82 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vcmla_rot180_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmla_rot180_f16(r, a, b);
+  #else
+    simde_float16x4_private
+      r_ = simde_float16x4_to_private(r),
+      a_ = simde_float16x4_to_private(a),
+      b_ = simde_float16x4_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) -
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) -
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+    }
+
+    return simde_float16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmla_rot180_f16
+  #define vcmla_rot180_f16(r, a, b) simde_vcmla_rot180_f16(r, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vcmlaq_rot180_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmlaq_rot180_f16(r, a, b);
+  #else
+    simde_float16x8_private
+      r_ = simde_float16x8_to_private(r),
+      a_ = simde_float16x8_to_private(a),
+      b_ = simde_float16x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) -
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) -
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i]));
+    }
+
+    return simde_float16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmlaq_rot180_f16
+  #define vcmlaq_rot180_f16(r, a, b) simde_vcmlaq_rot180_f16(r, a, b)
+#endif
+
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vcmla_rot180_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmla_rot180_f32(r, a, b);
   #else
     simde_float32x2_private
@@ -71,7 +142,8 @@ simde_float32x4_t
 simde_vcmlaq_rot180_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_rot180_f32(r, a, b);
   #else
     simde_float32x4_private
@@ -108,7 +180,8 @@ simde_float64x2_t
 simde_vcmlaq_rot180_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x2_t b) {
   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_rot180_f64(r, a, b);
   #else
     simde_float64x2_private

arm/neon/cmla_rot270.h

@@ -22,6 +22,7 @@
 *
 * Copyright:
 *   2021      Atharva Nimbalkar <atharvakn@gmail.com>
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
 */
 
 #if !defined(SIMDE_ARM_NEON_CMLA_ROT270_H)
@@ -33,12 +34,81 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vcmla_rot270_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmla_rot270_f16(r, a, b);
+  #else
+    simde_float16x4_private
+      r_ = simde_float16x4_to_private(r),
+      a_ = simde_float16x4_to_private(a),
+      b_ = simde_float16x4_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) +
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) -
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+    }
+
+    return simde_float16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmla_rot270_f16
+  #define vcmla_rot270_f16(r, a, b) simde_vcmla_rot270_f16(r, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vcmlaq_rot270_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmlaq_rot270_f16(r, a, b);
+  #else
+    simde_float16x8_private
+      r_ = simde_float16x8_to_private(r),
+      a_ = simde_float16x8_to_private(a),
+      b_ = simde_float16x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) +
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) -
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+    }
+
+    return simde_float16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmlaq_rot270_f16
+  #define vcmlaq_rot270_f16(r, a, b) simde_vcmlaq_rot270_f16(r, a, b)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vcmla_rot270_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmla_rot270_f32(r, a, b);
   #else
     simde_float32x2_private
@@ -71,7 +141,8 @@ simde_float32x4_t
 simde_vcmlaq_rot270_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_rot270_f32(r, a, b);
   #else
     simde_float32x4_private
@@ -108,7 +179,8 @@ simde_float64x2_t
 simde_vcmlaq_rot270_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x2_t b) {
   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_rot270_f64(r, a, b);
   #else
     simde_float64x2_private

arm/neon/cmla_rot90.h

@@ -22,6 +22,7 @@
 *
 * Copyright:
 *   2021      Atharva Nimbalkar <atharvakn@gmail.com>
+*   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
 */
 
 #if !defined(SIMDE_ARM_NEON_CMLA_ROT90_H)
@@ -33,12 +34,81 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vcmla_rot90_f16(simde_float16x4_t r, simde_float16x4_t a, simde_float16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmla_rot90_f16(r, a, b);
+  #else
+    simde_float16x4_private
+      r_ = simde_float16x4_to_private(r),
+      a_ = simde_float16x4_to_private(a),
+      b_ = simde_float16x4_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) -
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) +
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+    }
+
+    return simde_float16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmla_rot90_f16
+  #define vcmla_rot90_f16(r, a, b) simde_vcmla_rot90_f16(r, a, b)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vcmlaq_rot90_f16(simde_float16x8_t r, simde_float16x8_t a, simde_float16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
+      (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(8,5,0)) && \
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(SIMDE_ARM_NEON_FP16) && defined(__ARM_FEATURE_COMPLEX)
+    return vcmlaq_rot90_f16(r, a, b);
+  #else
+    simde_float16x8_private
+      r_ = simde_float16x8_to_private(r),
+      a_ = simde_float16x8_to_private(a),
+      b_ = simde_float16x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / (2 * sizeof(r_.values[0]))) ; i++) {
+      r_.values[2 * i] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i]) -
+          simde_float16_to_float32(b_.values[2 * i + 1]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+      r_.values[2 * i + 1] = simde_float16_from_float32(
+          simde_float16_to_float32(r_.values[2 * i + 1]) +
+          simde_float16_to_float32(b_.values[2 * i]) *
+          simde_float16_to_float32(a_.values[2 * i + 1]));
+    }
+
+    return simde_float16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcmlaq_rot90_f16
+  #define vcmlaq_rot90_f16(r, a, b) simde_vcmlaq_rot90_f16(r, a, b)
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vcmla_rot90_f32(simde_float32x2_t r, simde_float32x2_t a, simde_float32x2_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmla_rot90_f32(r, a, b);
   #else
     simde_float32x2_private
@@ -71,7 +141,8 @@ simde_float32x4_t
 simde_vcmlaq_rot90_f32(simde_float32x4_t r, simde_float32x4_t a, simde_float32x4_t b) {
   #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_rot90_f32(r, a, b);
   #else
     simde_float32x4_private
@@ -108,7 +179,8 @@ simde_float64x2_t
 simde_vcmlaq_rot90_f64(simde_float64x2_t r, simde_float64x2_t a, simde_float64x2_t b) {
   #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && SIMDE_ARCH_ARM_CHECK(8,3) && \
       (!defined(HEDLEY_GCC_VERSION) || HEDLEY_GCC_VERSION_CHECK(9,0,0)) && \
-      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0))
+      (!defined(__clang__) || SIMDE_DETECT_CLANG_VERSION_CHECK(12,0,0)) && \
+      defined(__ARM_FEATURE_COMPLEX)
     return vcmlaq_rot90_f64(r, a, b);
   #else
     simde_float64x2_private

arm/neon/cnt.h

@@ -22,6 +22,7 @@
  *
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_CNT_H)
@@ -164,6 +165,34 @@ simde_vcntq_u8(simde_uint8x16_t a) {
   #define vcntq_u8(a) simde_vcntq_u8((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vcnt_p8(simde_poly8x8_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcnt_p8(a);
+  #else
+    return simde_vreinterpret_p8_s8(simde_vcnt_s8(simde_vreinterpret_s8_p8(a)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcnt_p8
+  #define vcnt_p8(a) simde_vcnt_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vcntq_p8(simde_poly8x16_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcntq_p8(a);
+  #else
+    return simde_vreinterpretq_p8_s8(simde_vcntq_s8(simde_vreinterpretq_s8_p8(a)));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcntq_p8
+  #define vcntq_p8(a) simde_vcntq_p8((a))
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/combine.h

@@ -364,6 +364,85 @@ simde_vcombine_u64(simde_uint64x1_t low, simde_uint64x1_t high) {
   #define vcombine_u64(low, high) simde_vcombine_u64((low), (high))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vcombine_p8(simde_poly8x8_t low, simde_poly8x8_t high) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcombine_p8(low, high);
+  #else
+    simde_poly8x16_private r_;
+    simde_poly8x8_private
+      low_ = simde_poly8x8_to_private(low),
+      high_ = simde_poly8x8_to_private(high);
+
+    size_t halfway = (sizeof(r_.values) / sizeof(r_.values[0])) / 2;
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < halfway ; i++) {
+      r_.values[i] = low_.values[i];
+      r_.values[i + halfway] = high_.values[i];
+    }
+
+    return simde_poly8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcombine_p8
+  #define vcombine_p8(low, high) simde_vcombine_p8((low), (high))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vcombine_p16(simde_poly16x4_t low, simde_poly16x4_t high) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcombine_p16(low, high);
+  #else
+    simde_poly16x8_private r_;
+    simde_poly16x4_private
+      low_ = simde_poly16x4_to_private(low),
+      high_ = simde_poly16x4_to_private(high);
+
+    size_t halfway = (sizeof(r_.values) / sizeof(r_.values[0])) / 2;
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < halfway ; i++) {
+      r_.values[i] = low_.values[i];
+      r_.values[i + halfway] = high_.values[i];
+    }
+
+    return simde_poly16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcombine_p16
+  #define vcombine_p16(low, high) simde_vcombine_p16((low), (high))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vcombine_p64(simde_poly64x1_t low, simde_poly64x1_t high) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vcombine_p64(low, high);
+  #else
+    simde_poly64x2_private r_;
+    simde_poly64x1_private
+      low_ = simde_poly64x1_to_private(low),
+      high_ = simde_poly64x1_to_private(high);
+
+    size_t halfway = (sizeof(r_.values) / sizeof(r_.values[0])) / 2;
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < halfway ; i++) {
+      r_.values[i] = low_.values[i];
+      r_.values[i + halfway] = high_.values[i];
+    }
+
+    return simde_poly64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcombine_p64
+  #define vcombine_p64(low, high) simde_vcombine_p64((low), (high))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/copy_lane.h

@@ -854,6 +854,253 @@ simde_vcopyq_laneq_f64(simde_float64x2_t a, const int lane1, simde_float64x2_t b
   #define vcopyq_laneq_f64(a, lane1, b, lane2) simde_vcopyq_laneq_f64((a), (lane1), (b), (lane2))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vcopy_lane_p8(simde_poly8x8_t a, const int lane1, simde_poly8x8_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 7)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 7) {
+  simde_poly8x8_private
+    b_ = simde_poly8x8_to_private(b),
+    r_ = simde_poly8x8_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly8x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopy_lane_p8(a, lane1, b, lane2) vcopy_lane_p8((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopy_lane_p8
+  #define vcopy_lane_p8(a, lane1, b, lane2) simde_vcopy_lane_p8((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vcopy_lane_p16(simde_poly16x4_t a, const int lane1, simde_poly16x4_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 3)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 3) {
+  simde_poly16x4_private
+    b_ = simde_poly16x4_to_private(b),
+    r_ = simde_poly16x4_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopy_lane_p16(a, lane1, b, lane2) vcopy_lane_p16((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopy_lane_p16
+  #define vcopy_lane_p16(a, lane1, b, lane2) simde_vcopy_lane_p16((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vcopy_lane_p64(simde_poly64x1_t a, const int lane1, simde_poly64x1_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 0)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 0) {
+  simde_poly64x1_private
+    b_ = simde_poly64x1_to_private(b),
+    r_ = simde_poly64x1_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly64x1_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopy_lane_p64(a, lane1, b, lane2) vcopy_lane_p64((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopy_lane_p64
+  #define vcopy_lane_p64(a, lane1, b, lane2) simde_vcopy_lane_p64((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vcopy_laneq_p8(simde_poly8x8_t a, const int lane1, simde_poly8x16_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 7)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 15) {
+  simde_poly8x8_private
+    r_ = simde_poly8x8_to_private(a);
+  simde_poly8x16_private
+    b_ = simde_poly8x16_to_private(b);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly8x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopy_laneq_p8(a, lane1, b, lane2) vcopy_laneq_p8((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopy_laneq_p8
+  #define vcopy_laneq_p8(a, lane1, b, lane2) simde_vcopy_laneq_p8((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vcopy_laneq_p16(simde_poly16x4_t a, const int lane1, simde_poly16x8_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 3)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 7) {
+  simde_poly16x4_private
+    r_ = simde_poly16x4_to_private(a);
+  simde_poly16x8_private
+    b_ = simde_poly16x8_to_private(b);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly16x4_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopy_laneq_p16(a, lane1, b, lane2) vcopy_laneq_p16((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopy_laneq_p16
+  #define vcopy_laneq_p16(a, lane1, b, lane2) simde_vcopy_laneq_p16((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vcopy_laneq_p64(simde_poly64x1_t a, const int lane1, simde_poly64x2_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 0)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 1) {
+  simde_poly64x1_private
+    r_ = simde_poly64x1_to_private(a);
+  simde_poly64x2_private
+    b_ = simde_poly64x2_to_private(b);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly64x1_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopy_laneq_p64(a, lane1, b, lane2) vcopy_laneq_p64((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopy_laneq_p64
+  #define vcopy_laneq_p64(a, lane1, b, lane2) simde_vcopy_laneq_p64((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vcopyq_lane_p8(simde_poly8x16_t a, const int lane1, simde_poly8x8_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 15)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 7) {
+  simde_poly8x8_private
+    b_ = simde_poly8x8_to_private(b);
+  simde_poly8x16_private
+    r_ = simde_poly8x16_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly8x16_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopyq_lane_p8(a, lane1, b, lane2) vcopyq_lane_p8((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopyq_lane_p8
+  #define vcopyq_lane_p8(a, lane1, b, lane2) simde_vcopyq_lane_p8((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vcopyq_lane_p16(simde_poly16x8_t a, const int lane1, simde_poly16x4_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 7)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 3) {
+  simde_poly16x4_private
+    b_ = simde_poly16x4_to_private(b);
+  simde_poly16x8_private
+    r_ = simde_poly16x8_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly16x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopyq_lane_p16(a, lane1, b, lane2) vcopyq_lane_p16((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopyq_lane_p16
+  #define vcopyq_lane_p16(a, lane1, b, lane2) simde_vcopyq_lane_p16((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vcopyq_lane_p64(simde_poly64x2_t a, const int lane1, simde_poly64x1_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 1)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 0) {
+  simde_poly64x1_private
+    b_ = simde_poly64x1_to_private(b);
+  simde_poly64x2_private
+    r_ = simde_poly64x2_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopyq_lane_p64(a, lane1, b, lane2) vcopyq_lane_p64((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopyq_lane_p64
+  #define vcopyq_lane_p64(a, lane1, b, lane2) simde_vcopyq_lane_p64((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vcopyq_laneq_p8(simde_poly8x16_t a, const int lane1, simde_poly8x16_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 15)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 15) {
+  simde_poly8x16_private
+    b_ = simde_poly8x16_to_private(b),
+    r_ = simde_poly8x16_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly8x16_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopyq_laneq_p8(a, lane1, b, lane2) vcopyq_laneq_p8((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopyq_laneq_p8
+  #define vcopyq_laneq_p8(a, lane1, b, lane2) simde_vcopyq_laneq_p8((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vcopyq_laneq_p16(simde_poly16x8_t a, const int lane1, simde_poly16x8_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 7)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 7) {
+  simde_poly16x8_private
+    b_ = simde_poly16x8_to_private(b),
+    r_ = simde_poly16x8_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly16x8_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopyq_laneq_p16(a, lane1, b, lane2) vcopyq_laneq_p16((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopyq_laneq_p16
+  #define vcopyq_laneq_p16(a, lane1, b, lane2) simde_vcopyq_laneq_p16((a), (lane1), (b), (lane2))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vcopyq_laneq_p64(simde_poly64x2_t a, const int lane1, simde_poly64x2_t b, const int lane2)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane1, 0, 1)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane2, 0, 1) {
+  simde_poly64x2_private
+    b_ = simde_poly64x2_to_private(b),
+    r_ = simde_poly64x2_to_private(a);
+
+  r_.values[lane1] = b_.values[lane2];
+  return simde_poly64x2_from_private(r_);
+}
+#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vcopyq_laneq_p64(a, lane1, b, lane2) vcopyq_laneq_p64((a), (lane1), (b), (lane2))
+#endif
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vcopyq_laneq_p64
+  #define vcopyq_laneq_p64(a, lane1, b, lane2) simde_vcopyq_laneq_p64((a), (lane1), (b), (lane2))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/create.h

@@ -193,6 +193,49 @@ simde_vcreate_f64(uint64_t a) {
   #define vcreate_f64(a) simde_vcreate_f64(a)
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vcreate_p8(simde_poly64_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcreate_p8(a);
+  #else
+    return simde_vreinterpret_p8_p64(simde_vdup_n_p64(a));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcreate_p8
+  #define vcreate_p8(a) simde_vcreate_p8(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vcreate_p16(simde_poly64_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vcreate_p16(a);
+  #else
+    return simde_vreinterpret_p16_p64(simde_vdup_n_p64(a));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vcreate_p16
+  #define vcreate_p16(a) simde_vcreate_p16(a)
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vcreate_p64(simde_poly64_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vcreate_p64(a);
+  #else
+    return simde_vdup_n_p64(a);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vcreate_p64
+  #define vcreate_p64(a) simde_vcreate_p64(a)
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/cvt.h

@@ -1626,7 +1626,7 @@ simde_vcvtas_u32_f32(simde_float32 a) {
     } else if (HEDLEY_UNLIKELY(simde_math_isnanf(a))) {
       return 0;
     } else {
-      if(a < 0) return 0;
+      if (a < 0) return 0;
       return HEDLEY_STATIC_CAST(uint32_t, simde_math_roundf(a));
     }
   #endif
@@ -2068,6 +2068,7 @@ simde_vcvtx_high_f32_f64(simde_float32x2_t r, simde_float64x2_t a) {
   #define vcvtx_high_f32_f64(r, a) simde_vcvtx_high_f32_f64((r), (a))
 #endif
 
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/div.h

@@ -35,6 +35,68 @@ HEDLEY_DIAGNOSTIC_PUSH
 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
 SIMDE_BEGIN_DECLS_
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16_t
+simde_vdivh_f16(simde_float16_t a, simde_float16_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vdivh_f16(a, b);
+  #else
+    return simde_float16_from_float32(simde_float16_to_float32(a) / simde_float16_to_float32(b));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vdivh_f16
+  #define vdivh_f16(a, b) simde_vdivh_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x4_t
+simde_vdiv_f16(simde_float16x4_t a, simde_float16x4_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vdiv_f16(a, b);
+  #else
+    simde_float16x4_private
+      r_,
+      a_ = simde_float16x4_to_private(a),
+      b_ = simde_float16x4_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vdivh_f16(a_.values[i], b_.values[i]);
+    }
+
+    return simde_float16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vdiv_f16
+  #define vdiv_f16(a, b) simde_vdiv_f16((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float16x8_t
+simde_vdivq_f16(simde_float16x8_t a, simde_float16x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
+    return vdivq_f16(a, b);
+  #else
+    simde_float16x8_private
+      r_,
+      a_ = simde_float16x8_to_private(a),
+      b_ = simde_float16x8_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = simde_vdivh_f16(a_.values[i], b_.values[i]);
+    }
+
+    return simde_float16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vdivq_f16
+  #define vdivq_f16(a, b) simde_vdivq_f16((a), (b))
+#endif
+
 SIMDE_FUNCTION_ATTRIBUTES
 simde_float32x2_t
 simde_vdiv_f32(simde_float32x2_t a, simde_float32x2_t b) {
@@ -83,6 +145,53 @@ simde_vdivq_f32(simde_float32x4_t a, simde_float32x4_t b) {
   #define vdivq_f32(a, b) simde_vdivq_f32((a), (b))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x1_t
+simde_vdiv_f64(simde_float64x1_t a, simde_float64x1_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vdiv_f64(a, b);
+  #else
+    simde_float64x1_private
+      r_,
+      a_ = simde_float64x1_to_private(a),
+      b_ = simde_float64x1_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] / b_.values[i];
+    }
+
+    return simde_float64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vdiv_f64
+  #define vdiv_f64(a, b) simde_vdiv_f64((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_float64x2_t
+simde_vdivq_f64(simde_float64x2_t a, simde_float64x2_t b) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
+    return vdivq_f64(a, b);
+  #else
+    simde_float64x2_private
+      r_,
+      a_ = simde_float64x2_to_private(a),
+      b_ = simde_float64x2_to_private(b);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] / b_.values[i];
+    }
+
+    return simde_float64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef vdivq_f64
+  #define vdivq_f64(a, b) simde_vdivq_f64((a), (b))
+#endif
 
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP

arm/neon/dot_lane.h

@@ -485,6 +485,7 @@ simde_vdotq_lane_s32(simde_int32x4_t r, simde_int8x16_t a, simde_int8x8_t b, con
   #define vdotq_lane_s32(r, a, b, lane) simde_vdotq_lane_s32((r), (a), (b), (lane))
 #endif
 
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/dup_n.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Sean Maher <seanptmaher@gmail.com> (Copyright owned by Google, LLC)
  *   2020      Evan Nemerson <evan@nemerson.com>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_DUP_N_H)
@@ -668,6 +669,145 @@ simde_vdupq_n_u64(uint64_t value) {
   #define vmovq_n_u64(value) simde_vmovq_n_u64((value))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vdup_n_p8(simde_poly8_t value) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vdup_n_p8(value);
+  #else
+    simde_poly8x8_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = value;
+    }
+
+    return simde_poly8x8_from_private(r_);
+  #endif
+}
+#define simde_vmov_n_p8 simde_vdup_n_p8
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vdup_n_p8
+  #define vdup_n_p8(value) simde_vdup_n_p8((value))
+  #undef vmov_n_p8
+  #define vmov_n_p8(value) simde_vmov_n_p8((value))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vdup_n_p16(simde_poly16_t value) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vdup_n_p16(value);
+  #else
+    simde_poly16x4_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = value;
+    }
+
+    return simde_poly16x4_from_private(r_);
+  #endif
+}
+#define simde_vmov_n_p16 simde_vdup_n_p16
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vdup_n_p16
+  #define vdup_n_p16(value) simde_vdup_n_p16((value))
+  #undef vmov_n_p16
+  #define vmov_n_p16(value) simde_vmov_n_p16((value))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vdup_n_p64(simde_poly64_t value) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vdup_n_p64(value);
+  #else
+    simde_poly64x1_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = value;
+    }
+
+    return simde_poly64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vdup_n_p64
+  #define vdup_n_p64(value) simde_vdup_n_p64((value))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vdupq_n_p8(simde_poly8_t value) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vdupq_n_p8(value);
+  #else
+    simde_poly8x16_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = value;
+    }
+
+    return simde_poly8x16_from_private(r_);
+  #endif
+}
+#define simde_vmovq_n_p8 simde_vdupq_n_p8
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vdupq_n_p8
+  #define vdupq_n_p8(value) simde_vdupq_n_p8((value))
+  #undef vmovq_n_p8
+  #define vmovq_n_p8(value) simde_vmovq_n_p8((value))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vdupq_n_p16(simde_poly16_t value) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vdupq_n_p16(value);
+  #else
+    simde_poly16x8_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = value;
+    }
+
+    return simde_poly16x8_from_private(r_);
+  #endif
+}
+#define simde_vmovq_n_p16 simde_vdupq_n_p16
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vdupq_n_p16
+  #define vdupq_n_p16(value) simde_vdupq_n_p16((value))
+  #undef vmovq_n_p16
+  #define vmovq_n_p16(value) simde_vmovq_n_p16((value))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vdupq_n_p64(simde_poly64_t value) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vdupq_n_p64(value);
+  #else
+    simde_poly64x2_private r_;
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = value;
+    }
+
+    return simde_poly64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vdupq_n_p64
+  #define vdupq_n_p64(value) simde_vdupq_n_p64((value))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/eor.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2020      Christopher Moore <moore@free.fr>
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_EOR_H)
@@ -546,6 +547,207 @@ simde_veorq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
   #define veorq_u64(a, b) simde_veorq_u64((a), (b))
 #endif
 
+// Note: EOR3 instructions are implemented only when FEAT_SHA3 is implemented.
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int8x16_t
+simde_veor3q_s8(simde_int8x16_t a, simde_int8x16_t b, simde_int8x16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_s8(a, b, c);
+  #else
+    simde_int8x16_private
+      r_,
+      a_ = simde_int8x16_to_private(a),
+      b_ = simde_int8x16_to_private(b),
+      c_ = simde_int8x16_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_int8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_s8
+  #define veor3q_s8(a, b, c) simde_veor3q_s8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int16x8_t
+simde_veor3q_s16(simde_int16x8_t a, simde_int16x8_t b, simde_int16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_s16(a, b, c);
+  #else
+    simde_int16x8_private
+      r_,
+      a_ = simde_int16x8_to_private(a),
+      b_ = simde_int16x8_to_private(b),
+      c_ = simde_int16x8_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_int16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_s16
+  #define veor3q_s16(a, b, c) simde_veor3q_s16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int32x4_t
+simde_veor3q_s32(simde_int32x4_t a, simde_int32x4_t b, simde_int32x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_s32(a, b, c);
+  #else
+    simde_int32x4_private
+      r_,
+      a_ = simde_int32x4_to_private(a),
+      b_ = simde_int32x4_to_private(b),
+      c_ = simde_int32x4_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_int32x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_s32
+  #define veor3q_s32(a, b, c) simde_veor3q_s32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_int64x2_t
+simde_veor3q_s64(simde_int64x2_t a, simde_int64x2_t b, simde_int64x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_s64(a, b, c);
+  #else
+    simde_int64x2_private
+      r_,
+      a_ = simde_int64x2_to_private(a),
+      b_ = simde_int64x2_to_private(b),
+      c_ = simde_int64x2_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_int64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_s64
+  #define veor3q_s64(a, b, c) simde_veor3q_s64((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint8x16_t
+simde_veor3q_u8(simde_uint8x16_t a, simde_uint8x16_t b, simde_uint8x16_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_u8(a, b, c);
+  #else
+    simde_uint8x16_private
+      r_,
+      a_ = simde_uint8x16_to_private(a),
+      b_ = simde_uint8x16_to_private(b),
+      c_ = simde_uint8x16_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_uint8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_u8
+  #define veor3q_u8(a, b, c) simde_veor3q_u8((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint16x8_t
+simde_veor3q_u16(simde_uint16x8_t a, simde_uint16x8_t b, simde_uint16x8_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_u16(a, b, c);
+  #else
+    simde_uint16x8_private
+      r_,
+      a_ = simde_uint16x8_to_private(a),
+      b_ = simde_uint16x8_to_private(b),
+      c_ = simde_uint16x8_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_uint16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_u16
+  #define veor3q_u16(a, b, c) simde_veor3q_u16((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint32x4_t
+simde_veor3q_u32(simde_uint32x4_t a, simde_uint32x4_t b, simde_uint32x4_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_u32(a, b, c);
+  #else
+    simde_uint32x4_private
+      r_,
+      a_ = simde_uint32x4_to_private(a),
+      b_ = simde_uint32x4_to_private(b),
+      c_ = simde_uint32x4_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_uint32x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_u32
+  #define veor3q_u32(a, b, c) simde_veor3q_u32((a), (b), (c))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_uint64x2_t
+simde_veor3q_u64(simde_uint64x2_t a, simde_uint64x2_t b, simde_uint64x2_t c) {
+  #if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(__ARM_FEATURE_SHA3)
+    return veor3q_u64(a, b, c);
+  #else
+    simde_uint64x2_private
+      r_,
+      a_ = simde_uint64x2_to_private(a),
+      b_ = simde_uint64x2_to_private(b),
+      c_ = simde_uint64x2_to_private(c);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i] ^ b_.values[i] ^ c_.values[i];
+    }
+
+    return simde_uint64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
+  #undef veor3q_u64
+  #define veor3q_u64(a, b, c) simde_veor3q_u64((a), (b), (c))
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/ext.h

@@ -897,6 +897,161 @@ simde_vextq_u64(simde_uint64x2_t a, simde_uint64x2_t b, const int n)
   #define vextq_u64(a, b, n) simde_vextq_u64((a), (b), (n))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vext_p8(simde_poly8x8_t a, simde_poly8x8_t b, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde_poly8x8_t r;
+    SIMDE_CONSTIFY_8_(vext_p8, r, (HEDLEY_UNREACHABLE(), a), n, a, b);
+    return r;
+  #else
+    simde_poly8x8_private
+      a_ = simde_poly8x8_to_private(a),
+      b_ = simde_poly8x8_to_private(b),
+      r_ = a_;
+    const size_t n_ = HEDLEY_STATIC_CAST(size_t, n);
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      size_t src = i + n_;
+      r_.values[i] = (src < (sizeof(r_.values) / sizeof(r_.values[0]))) ? a_.values[src] : b_.values[src & 7];
+    }
+    return simde_poly8x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vext_p8
+  #define vext_p8(a, b, n) simde_vext_p8((a), (b), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vext_p16(simde_poly16x4_t a, simde_poly16x4_t b, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 3) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde_poly16x4_t r;
+    SIMDE_CONSTIFY_4_(vext_p16, r, (HEDLEY_UNREACHABLE(), a), n, a, b);
+    return r;
+  #else
+    simde_poly16x4_private
+      a_ = simde_poly16x4_to_private(a),
+      b_ = simde_poly16x4_to_private(b),
+      r_ = a_;
+    const size_t n_ = HEDLEY_STATIC_CAST(size_t, n);
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      size_t src = i + n_;
+      r_.values[i] = (src < (sizeof(r_.values) / sizeof(r_.values[0]))) ? a_.values[src] : b_.values[src & 3];
+    }
+    return simde_poly16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vext_p16
+  #define vext_p16(a, b, n) simde_vext_p16((a), (b), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vext_p64(simde_poly64x1_t a, simde_poly64x1_t b, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 0) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    (void) n;
+    return vext_p64(a, b, 0);
+  #else
+    simde_poly64x1_private
+      a_ = simde_poly64x1_to_private(a),
+      b_ = simde_poly64x1_to_private(b),
+      r_ = a_;
+    const size_t n_ = HEDLEY_STATIC_CAST(size_t, n);
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      size_t src = i + n_;
+      r_.values[i] = (src < (sizeof(r_.values) / sizeof(r_.values[0]))) ? a_.values[src] : b_.values[src & 0];
+    }
+    return simde_poly64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vext_p64
+  #define vext_p64(a, b, n) simde_vext_p64((a), (b), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vextq_p8(simde_poly8x16_t a, simde_poly8x16_t b, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde_poly8x16_t r;
+    SIMDE_CONSTIFY_16_(vextq_p8, r, (HEDLEY_UNREACHABLE(), a), n, a, b);
+    return r;
+  #else
+    simde_poly8x16_private
+      a_ = simde_poly8x16_to_private(a),
+      b_ = simde_poly8x16_to_private(b),
+      r_ = a_;
+    const size_t n_ = HEDLEY_STATIC_CAST(size_t, n);
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      size_t src = i + n_;
+      r_.values[i] = (src < (sizeof(r_.values) / sizeof(r_.values[0]))) ? a_.values[src] : b_.values[src & 15];
+    }
+    return simde_poly8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vextq_p8
+  #define vextq_p8(a, b, n) simde_vextq_p8((a), (b), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vextq_p16(simde_poly16x8_t a, simde_poly16x8_t b, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    simde_poly16x8_t r;
+    SIMDE_CONSTIFY_8_(vextq_p16, r, (HEDLEY_UNREACHABLE(), a), n, a, b);
+    return r;
+  #else
+    simde_poly16x8_private
+      a_ = simde_poly16x8_to_private(a),
+      b_ = simde_poly16x8_to_private(b),
+      r_ = a_;
+    const size_t n_ = HEDLEY_STATIC_CAST(size_t, n);
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      size_t src = i + n_;
+      r_.values[i] = (src < (sizeof(r_.values) / sizeof(r_.values[0]))) ? a_.values[src] : b_.values[src & 7];
+    }
+    return simde_poly16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vextq_p16
+  #define vextq_p16(a, b, n) simde_vextq_p16((a), (b), (n))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vextq_p64(simde_poly64x2_t a, simde_poly64x2_t b, const int n)
+    SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 1) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    simde_poly64x2_t r;
+    SIMDE_CONSTIFY_2_(vextq_p64, r, (HEDLEY_UNREACHABLE(), a), n, a, b);
+    return r;
+  #else
+    simde_poly64x2_private
+      a_ = simde_poly64x2_to_private(a),
+      b_ = simde_poly64x2_to_private(b),
+      r_ = a_;
+    const size_t n_ = HEDLEY_STATIC_CAST(size_t, n);
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      size_t src = i + n_;
+      r_.values[i] = (src < (sizeof(r_.values) / sizeof(r_.values[0]))) ? a_.values[src] : b_.values[src & 1];
+    }
+    return simde_poly64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vextq_p64
+  #define vextq_p64(a, b, n) simde_vextq_p64((a), (b), (n))
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/get_high.h

@@ -317,6 +317,73 @@ simde_vget_high_u64(simde_uint64x2_t a) {
   #define vget_high_u64(a) simde_vget_high_u64((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vget_high_p8(simde_poly8x16_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vget_high_p8(a);
+  #else
+    simde_poly8x8_private r_;
+    simde_poly8x16_private a_ = simde_poly8x16_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i + (sizeof(r_.values) / sizeof(r_.values[0]))];
+    }
+
+    return simde_poly8x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vget_high_p8
+  #define vget_high_p8(a) simde_vget_high_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vget_high_p16(simde_poly16x8_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vget_high_p16(a);
+  #else
+    simde_poly16x4_private r_;
+    simde_poly16x8_private a_ = simde_poly16x8_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i + (sizeof(r_.values) / sizeof(r_.values[0]))];
+    }
+
+    return simde_poly16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vget_high_p16
+  #define vget_high_p16(a) simde_vget_high_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vget_high_p64(simde_poly64x2_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vget_high_p64(a);
+  #else
+    simde_poly64x1_private r_;
+    simde_poly64x2_private a_ = simde_poly64x2_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i + (sizeof(r_.values) / sizeof(r_.values[0]))];
+    }
+
+    return simde_poly64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vget_high_p64
+  #define vget_high_p64(a) simde_vget_high_p64((a))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/get_lane.h

@@ -556,6 +556,120 @@ simde_vgetq_lane_u64(simde_uint64x2_t v, const int lane)
   #define vgetq_lane_u64(v, lane) simde_vgetq_lane_u64((v), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8_t
+simde_vget_lane_p8(simde_poly8x8_t v, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_poly8_t r;
+  simde_poly8x8_private v_ = simde_poly8x8_to_private(v);
+  r = v_.values[lane];
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vget_lane_p8(v, lane) vget_lane_p8((v), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vget_lane_p8
+  #define vget_lane_p8(v, lane) simde_vget_lane_p8((v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16_t
+simde_vget_lane_p16(simde_poly16x4_t v, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_poly16_t r;
+  simde_poly16x4_private v_ = simde_poly16x4_to_private(v);
+
+  r = v_.values[lane];
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vget_lane_p16(v, lane) vget_lane_p16((v), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vget_lane_p16
+  #define vget_lane_p16(v, lane) simde_vget_lane_p16((v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64_t
+simde_vget_lane_p64(simde_poly64x1_t v, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_poly64_t r;
+  simde_poly64x1_private v_ = simde_poly64x1_to_private(v);
+
+  r = v_.values[lane];
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vget_lane_p64(v, lane) vget_lane_p64((v), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vget_lane_p64
+  #define vget_lane_p64(v, lane) simde_vget_lane_p64((v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8_t
+simde_vgetq_lane_p8(simde_poly8x16_t v, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) {
+  simde_poly8_t r;
+  simde_poly8x16_private v_ = simde_poly8x16_to_private(v);
+
+  r = v_.values[lane];
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vgetq_lane_p8(v, lane) vgetq_lane_p8((v), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vgetq_lane_p8
+  #define vgetq_lane_p8(v, lane) simde_vgetq_lane_p8((v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16_t
+simde_vgetq_lane_p16(simde_poly16x8_t v, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_poly16_t r;
+  simde_poly16x8_private v_ = simde_poly16x8_to_private(v);
+
+  r = v_.values[lane];
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vgetq_lane_p16(v, lane) vgetq_lane_p16((v), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vgetq_lane_p16
+  #define vgetq_lane_p16(v, lane) simde_vgetq_lane_p16((v), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64_t
+simde_vgetq_lane_p64(simde_poly64x2_t v, const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_poly64_t r;
+  simde_poly64x2_private v_ = simde_poly64x2_to_private(v);
+
+  r = v_.values[lane];
+
+  return r;
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && !defined(SIMDE_BUG_CLANG_71362)
+  #define simde_vgetq_lane_p64(v, lane) vgetq_lane_p64((v), (lane))
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vgetq_lane_p64
+  #define vgetq_lane_p64(v, lane) simde_vgetq_lane_p64((v), (lane))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/get_low.h

@@ -349,6 +349,73 @@ simde_vget_low_u64(simde_uint64x2_t a) {
   #define vget_low_u64(a) simde_vget_low_u64((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vget_low_p8(simde_poly8x16_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vget_low_p8(a);
+  #else
+    simde_poly8x8_private r_;
+    simde_poly8x16_private a_ = simde_poly8x16_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i];
+    }
+
+    return simde_poly8x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vget_low_p8
+  #define vget_low_p8(a) simde_vget_low_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vget_low_p16(simde_poly16x8_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vget_low_p16(a);
+  #else
+    simde_poly16x4_private r_;
+    simde_poly16x8_private a_ = simde_poly16x8_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i];
+    }
+
+    return simde_poly16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vget_low_p16
+  #define vget_low_p16(a) simde_vget_low_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vget_low_p64(simde_poly64x2_t a) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vget_low_p64(a);
+  #else
+    simde_poly64x1_private r_;
+    simde_poly64x2_private a_ = simde_poly64x2_to_private(a);
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      r_.values[i] = a_.values[i];
+    }
+
+    return simde_poly64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vget_low_p64
+  #define vget_low_p64(a) simde_vget_low_p64((a))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/ld1.h

@@ -23,6 +23,7 @@
  * Copyright:
  *   2020      Evan Nemerson <evan@nemerson.com>
  *   2021      Zhi An Ng <zhin@google.com> (Copyright owned by Google, LLC)
+ *   2023      Yi-Yen Chung <eric681@andestech.com> (Copyright owned by Andes Technology)
  */
 
 #if !defined(SIMDE_ARM_NEON_LD1_H)
@@ -430,6 +431,122 @@ simde_vld1q_u64(uint64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
   #define vld1q_u64(a) simde_vld1q_u64((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vld1_p8(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1_p8(ptr);
+  #else
+    simde_poly8x8_private r_;
+    simde_memcpy(&r_, ptr, sizeof(r_));
+    return simde_poly8x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p8
+  #define vld1_p8(a) simde_vld1_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vld1_p16(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1_p16(ptr);
+  #else
+    simde_poly16x4_private r_;
+    simde_memcpy(&r_, ptr, sizeof(r_));
+    return simde_poly16x4_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p16
+  #define vld1_p16(a) simde_vld1_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vld1_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(1)]) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld1_p64(ptr);
+  #else
+    simde_poly64x1_private r_;
+    simde_memcpy(&r_, ptr, sizeof(r_));
+    return simde_poly64x1_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p64
+  #define vld1_p64(a) simde_vld1_p64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vld1q_p8(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld1q_p8(ptr);
+  #else
+    simde_poly8x16_private r_;
+    simde_memcpy(&r_, ptr, sizeof(r_));
+    return simde_poly8x16_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p8
+  #define vld1q_p8(a) simde_vld1q_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vld1q_p16(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1q_p16(ptr);
+  #else
+    simde_poly16x8_private r_;
+    simde_memcpy(&r_, ptr, sizeof(r_));
+    return simde_poly16x8_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p16
+  #define vld1q_p16(a) simde_vld1q_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vld1q_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld1q_p64(ptr);
+  #else
+    simde_poly64x2_private r_;
+    simde_memcpy(&r_, ptr, sizeof(r_));
+    return simde_poly64x2_from_private(r_);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p64
+  #define vld1q_p64(a) simde_vld1q_p64((a))
+#endif
+
+#if !defined(SIMDE_TARGET_NOT_SUPPORT_INT128_TYPE)
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly128_t
+simde_vldrq_p128(simde_poly128_t const ptr[HEDLEY_ARRAY_PARAM(1)]) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
+    return vldrq_p128(ptr);
+  #else
+    simde_poly128_t r_;
+    simde_memcpy(&r_, ptr, sizeof(r_));
+    return r_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vldrq_p128
+  #define vldrq_p128(a) simde_vldrq_p128((a))
+#endif
+
+#endif /* !defined(SIMDE_TARGET_NOT_SUPPORT_INT128_TYPE) */
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/ld1_dup.h

@@ -430,6 +430,91 @@ simde_vld1q_dup_u64(uint64_t const * ptr) {
   #define vld1q_dup_u64(a) simde_vld1q_dup_u64((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vld1_dup_p8(simde_poly8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1_dup_p8(ptr);
+  #else
+    return simde_vdup_n_p8(*ptr);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_dup_p8
+  #define vld1_dup_p8(a) simde_vld1_dup_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vld1_dup_p16(simde_poly16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1_dup_p16(ptr);
+  #else
+    return simde_vdup_n_p16(*ptr);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_dup_p16
+  #define vld1_dup_p16(a) simde_vld1_dup_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vld1_dup_p64(simde_poly64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld1_dup_p64(ptr);
+  #else
+    return simde_vdup_n_p64(*ptr);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1_dup_p64
+  #define vld1_dup_p64(a) simde_vld1_dup_p64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vld1q_dup_p8(simde_poly8_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1q_dup_p8(ptr);
+  #else
+    return simde_vdupq_n_p8(*ptr);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_dup_p8
+  #define vld1q_dup_p8(a) simde_vld1q_dup_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vld1q_dup_p16(simde_poly16_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld1q_dup_p16(ptr);
+  #else
+    return simde_vdupq_n_p16(*ptr);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_dup_p16
+  #define vld1q_dup_p16(a) simde_vld1q_dup_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vld1q_dup_p64(simde_poly64_t const * ptr) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld1q_dup_p64(ptr);
+  #else
+    return simde_vdupq_n_p64(*ptr);
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_dup_p64
+  #define vld1q_dup_p64(a) simde_vld1q_dup_p64((a))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/ld1_lane.h

@@ -386,6 +386,109 @@ simde_float64x2_t simde_vld1q_lane_f64(simde_float64_t const *ptr, simde_float64
   #define vld1q_lane_f64(ptr, src, lane) simde_vld1q_lane_f64((ptr), (src), (lane))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vld1_lane_p8(simde_poly8_t const *ptr, simde_poly8x8_t src,
+                   const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_poly8x8_private r = simde_poly8x8_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_poly8x8_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld1_lane_p8(ptr, src, lane) vld1_lane_p8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_lane_p8
+  #define vld1_lane_p8(ptr, src, lane) simde_vld1_lane_p8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4_t
+simde_vld1_lane_p16(simde_poly16_t const *ptr, simde_poly16x4_t src,
+                    const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 3) {
+  simde_poly16x4_private r = simde_poly16x4_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_poly16x4_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld1_lane_p16(ptr, src, lane) vld1_lane_p16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_lane_p16
+  #define vld1_lane_p16(ptr, src, lane) simde_vld1_lane_p16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1_t
+simde_vld1_lane_p64(simde_poly64_t const *ptr, simde_poly64x1_t src,
+                    const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 0) {
+  simde_poly64x1_private r = simde_poly64x1_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_poly64x1_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+  #define simde_vld1_lane_p64(ptr, src, lane) vld1_lane_p64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1_lane_p64
+  #define vld1_lane_p64(ptr, src, lane) simde_vld1_lane_p64((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vld1q_lane_p8(simde_poly8_t const *ptr, simde_poly8x16_t src,
+                    const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 15) {
+  simde_poly8x16_private r = simde_poly8x16_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_poly8x16_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld1q_lane_p8(ptr, src, lane) vld1q_lane_p8(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_lane_p8
+  #define vld1q_lane_p8(ptr, src, lane) simde_vld1q_lane_p8((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8_t
+simde_vld1q_lane_p16(simde_poly16_t const *ptr, simde_poly16x8_t src,
+                     const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 7) {
+  simde_poly16x8_private r = simde_poly16x8_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_poly16x8_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+  #define simde_vld1q_lane_p16(ptr, src, lane) vld1q_lane_p16(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_lane_p16
+  #define vld1q_lane_p16(ptr, src, lane) simde_vld1q_lane_p16((ptr), (src), (lane))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2_t
+simde_vld1q_lane_p64(simde_poly64_t const *ptr, simde_poly64x2_t src,
+                     const int lane)
+    SIMDE_REQUIRE_CONSTANT_RANGE(lane, 0, 1) {
+  simde_poly64x2_private r = simde_poly64x2_to_private(src);
+  r.values[lane] = *ptr;
+  return simde_poly64x2_from_private(r);
+}
+#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+  #define simde_vld1q_lane_p64(ptr, src, lane) vld1q_lane_p64(ptr, src, lane)
+#endif
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_lane_p64
+  #define vld1q_lane_p64(ptr, src, lane) simde_vld1q_lane_p64((ptr), (src), (lane))
+#endif
+
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP
 

arm/neon/ld1_x2.h

@@ -294,6 +294,70 @@ simde_vld1_u64_x2(uint64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
   #define vld1_u64_x2(a) simde_vld1_u64_x2((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8x2_t
+simde_vld1_p8_x2(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_95399)
+    return vld1_p8_x2(ptr);
+  #else
+    simde_poly8x8_private a_[2];
+    for (size_t i = 0; i < 16; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_poly8x8x2_t s_ = { { simde_poly8x8_from_private(a_[0]),
+                               simde_poly8x8_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p8_x2
+  #define vld1_p8_x2(a) simde_vld1_p8_x2((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4x2_t
+simde_vld1_p16_x2(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && !defined(SIMDE_BUG_GCC_95399)
+    return vld1_p16_x2(ptr);
+  #else
+    simde_poly16x4_private a_[2];
+    for (size_t i = 0; i < 8; i++) {
+      a_[i / 4].values[i % 4] = ptr[i];
+    }
+    simde_poly16x4x2_t s_ = { { simde_poly16x4_from_private(a_[0]),
+                                simde_poly16x4_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p16_x2
+  #define vld1_p16_x2(a) simde_vld1_p16_x2((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1x2_t
+simde_vld1_p64_x2(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(9,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_p64_x2(ptr);
+  #else
+    simde_poly64x1_private a_[2];
+    for (size_t i = 0; i < 2; i++) {
+      a_[i].values[0] = ptr[i];
+    }
+    simde_poly64x1x2_t s_ = { { simde_poly64x1_from_private(a_[0]),
+                                simde_poly64x1_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p64_x2
+  #define vld1_p64_x2(a) simde_vld1_p64_x2((a))
+#endif
+
+
 #endif /* !defined(SIMDE_BUG_INTEL_857088) */
 
 SIMDE_END_DECLS_

arm/neon/ld1_x3.h

@@ -304,6 +304,75 @@ simde_vld1_u64_x3(uint64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
   #define vld1_u64_x3(a) simde_vld1_u64_x3((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8x3_t
+simde_vld1_p8_x3(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_p8_x3(ptr);
+  #else
+    simde_poly8x8_private a_[3];
+    for (size_t i = 0; i < 24; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_poly8x8x3_t s_ = { { simde_poly8x8_from_private(a_[0]),
+                               simde_poly8x8_from_private(a_[1]),
+                               simde_poly8x8_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p8_x3
+  #define vld1_p8_x3(a) simde_vld1_p8_x3((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4x3_t
+simde_vld1_p16_x3(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(12)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_p16_x3(ptr);
+  #else
+    simde_poly16x4_private a_[3];
+    for (size_t i = 0; i < 12; i++) {
+      a_[i / 4].values[i % 4] = ptr[i];
+    }
+    simde_poly16x4x3_t s_ = { { simde_poly16x4_from_private(a_[0]),
+                                simde_poly16x4_from_private(a_[1]),
+                                simde_poly16x4_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p16_x3
+  #define vld1_p16_x3(a) simde_vld1_p16_x3((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1x3_t
+simde_vld1_p64_x3(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(9,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_p64_x3(ptr);
+  #else
+    simde_poly64x1_private a_[3];
+    for (size_t i = 0; i < 3; i++) {
+      a_[i].values[0] = ptr[i];
+    }
+    simde_poly64x1x3_t s_ = { { simde_poly64x1_from_private(a_[0]),
+                                simde_poly64x1_from_private(a_[1]),
+                                simde_poly64x1_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p64_x3
+  #define vld1_p64_x3(a) simde_vld1_p64_x3((a))
+#endif
+
+
 #endif /* !defined(SIMDE_BUG_INTEL_857088) */
 
 SIMDE_END_DECLS_

arm/neon/ld1_x4.h

@@ -316,6 +316,78 @@ simde_vld1_u64_x4(uint64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
   #define vld1_u64_x4(a) simde_vld1_u64_x4((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8x4_t
+simde_vld1_p8_x4(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_p8_x4(ptr);
+  #else
+    simde_poly8x8_private a_[4];
+    for (size_t i = 0; i < 32; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_poly8x8x4_t s_ = { { simde_poly8x8_from_private(a_[0]),
+                               simde_poly8x8_from_private(a_[1]),
+                               simde_poly8x8_from_private(a_[2]),
+                               simde_poly8x8_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p8_x4
+  #define vld1_p8_x4(a) simde_vld1_p8_x4((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4x4_t
+simde_vld1_p16_x4(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_p16_x4(ptr);
+  #else
+    simde_poly16x4_private a_[4];
+    for (size_t i = 0; i < 16; i++) {
+      a_[i / 4].values[i % 4] = ptr[i];
+    }
+    simde_poly16x4x4_t s_ = { { simde_poly16x4_from_private(a_[0]),
+                                simde_poly16x4_from_private(a_[1]),
+                                simde_poly16x4_from_private(a_[2]),
+                                simde_poly16x4_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p16_x4
+  #define vld1_p16_x4(a) simde_vld1_p16_x4((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1x4_t
+simde_vld1_p64_x4(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE))) && \
+      (!defined(__clang__) || (SIMDE_DETECT_CLANG_VERSION_CHECK(9,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1_p64_x4(ptr);
+  #else
+    simde_poly64x1_private a_[4];
+    for (size_t i = 0; i < 4; i++) {
+      a_[i].values[0] = ptr[i];
+    }
+    simde_poly64x1x4_t s_ = { { simde_poly64x1_from_private(a_[0]),
+                                simde_poly64x1_from_private(a_[1]),
+                                simde_poly64x1_from_private(a_[2]),
+                                simde_poly64x1_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1_p64_x4
+  #define vld1_p64_x4(a) simde_vld1_p64_x4((a))
+#endif
+
+
 #endif /* !defined(SIMDE_BUG_INTEL_857088) */
 
 SIMDE_END_DECLS_

arm/neon/ld1q_x2.h

@@ -295,6 +295,73 @@ simde_vld1q_u64_x2(uint64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
   #define vld1q_u64_x2(a) simde_vld1q_u64_x2((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16x2_t
+simde_vld1q_p8_x2(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p8_x2(ptr);
+  #else
+    simde_poly8x16_private a_[2];
+    for (size_t i = 0; i < 32; i++) {
+      a_[i / 16].values[i % 16] = ptr[i];
+    }
+    simde_poly8x16x2_t s_ = { { simde_poly8x16_from_private(a_[0]),
+                                simde_poly8x16_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p8_x2
+  #define vld1q_p8_x2(a) simde_vld1q_p8_x2((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8x2_t
+simde_vld1q_p16_x2(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p16_x2(ptr);
+  #else
+    simde_poly16x8_private a_[2];
+    for (size_t i = 0; i < 16; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_poly16x8x2_t s_ = { { simde_poly16x8_from_private(a_[0]),
+                                simde_poly16x8_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p16_x2
+  #define vld1q_p16_x2(a) simde_vld1q_p16_x2((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2x2_t
+simde_vld1q_p64_x2(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,0,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p64_x2(ptr);
+  #else
+    simde_poly64x2_private a_[2];
+    for (size_t i = 0; i < 4; i++) {
+      a_[i / 2].values[i % 2] = ptr[i];
+    }
+    simde_poly64x2x2_t s_ = { { simde_poly64x2_from_private(a_[0]),
+                                simde_poly64x2_from_private(a_[1]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p64_x2
+  #define vld1q_p64_x2(a) simde_vld1q_p64_x2((a))
+#endif
+
+
 #endif /* !defined(SIMDE_BUG_INTEL_857088) */
 
 SIMDE_END_DECLS_

arm/neon/ld1q_x3.h

@@ -304,6 +304,76 @@ simde_vld1q_u64_x3(uint64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
   #define vld1q_u64_x3(a) simde_vld1q_u64_x3((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16x3_t
+simde_vld1q_p8_x3(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(48)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p8_x3(ptr);
+  #else
+    simde_poly8x16_private a_[3];
+    for (size_t i = 0; i < 48; i++) {
+      a_[i / 16].values[i % 16] = ptr[i];
+    }
+    simde_poly8x16x3_t s_ = { { simde_poly8x16_from_private(a_[0]),
+                                simde_poly8x16_from_private(a_[1]),
+                                simde_poly8x16_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p8_x3
+  #define vld1q_p8_x3(a) simde_vld1q_p8_x3((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8x3_t
+simde_vld1q_p16_x3(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(24)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p16_x3(ptr);
+  #else
+    simde_poly16x8_private a_[3];
+    for (size_t i = 0; i < 24; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_poly16x8x3_t s_ = { { simde_poly16x8_from_private(a_[0]),
+                                simde_poly16x8_from_private(a_[1]),
+                                simde_poly16x8_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p16_x3
+  #define vld1q_p16_x3(a) simde_vld1q_p16_x3((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2x3_t
+simde_vld1q_p64_x3(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(3)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p64_x3(ptr);
+  #else
+    simde_poly64x2_private a_[3];
+    for (size_t i = 0; i < 6; i++) {
+      a_[i / 2].values[i % 2] = ptr[i];
+    }
+    simde_poly64x2x3_t s_ = { { simde_poly64x2_from_private(a_[0]),
+                                simde_poly64x2_from_private(a_[1]),
+                                simde_poly64x2_from_private(a_[2]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p64_x3
+  #define vld1q_p64_x3(a) simde_vld1q_p64_x3((a))
+#endif
+
+
 #endif /* !defined(SIMDE_BUG_INTEL_857088) */
 
 SIMDE_END_DECLS_

arm/neon/ld1q_x4.h

@@ -316,6 +316,79 @@ simde_vld1q_u64_x4(uint64_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
   #define vld1q_u64_x4(a) simde_vld1q_u64_x4((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16x4_t
+simde_vld1q_p8_x4(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(64)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p8_x4(ptr);
+  #else
+    simde_poly8x16_private a_[4];
+    for (size_t i = 0; i < 64; i++) {
+      a_[i / 16].values[i % 16] = ptr[i];
+    }
+    simde_poly8x16x4_t s_ = { { simde_poly8x16_from_private(a_[0]),
+                                simde_poly8x16_from_private(a_[1]),
+                                simde_poly8x16_from_private(a_[2]),
+                                simde_poly8x16_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p8_x4
+  #define vld1q_p8_x4(a) simde_vld1q_p8_x4((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8x4_t
+simde_vld1q_p16_x4(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V7_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p16_x4(ptr);
+  #else
+    simde_poly16x8_private a_[4];
+    for (size_t i = 0; i < 32; i++) {
+      a_[i / 8].values[i % 8] = ptr[i];
+    }
+    simde_poly16x8x4_t s_ = { { simde_poly16x8_from_private(a_[0]),
+                                simde_poly16x8_from_private(a_[1]),
+                                simde_poly16x8_from_private(a_[2]),
+                                simde_poly16x8_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p16_x4
+  #define vld1q_p16_x4(a) simde_vld1q_p16_x4((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2x4_t
+simde_vld1q_p64_x4(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if \
+      defined(SIMDE_ARM_NEON_A32V8_NATIVE) && \
+      (!defined(HEDLEY_GCC_VERSION) || (HEDLEY_GCC_VERSION_CHECK(8,5,0) && defined(SIMDE_ARM_NEON_A64V8_NATIVE)))
+    return vld1q_p64_x4(ptr);
+  #else
+    simde_poly64x2_private a_[4];
+    for (size_t i = 0; i < 8; i++) {
+      a_[i / 2].values[i % 2] = ptr[i];
+    }
+    simde_poly64x2x4_t s_ = { { simde_poly64x2_from_private(a_[0]),
+                                simde_poly64x2_from_private(a_[1]),
+                                simde_poly64x2_from_private(a_[2]),
+                                simde_poly64x2_from_private(a_[3]) } };
+    return s_;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld1q_p64_x4
+  #define vld1q_p64_x4(a) simde_vld1q_p64_x4((a))
+#endif
+
+
 #endif /* !defined(SIMDE_BUG_INTEL_857088) */
 
 SIMDE_END_DECLS_

arm/neon/ld2.h

@@ -830,6 +830,190 @@ simde_vld2q_f64(simde_float64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
   #define vld2q_f64(a) simde_vld2q_f64((a))
 #endif
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8x2_t
+simde_vld2_p8(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_p8(ptr);
+  #else
+    simde_poly8x8_private r_[2];
+
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_[0])) ; i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+
+    simde_poly8x8x2_t r = { {
+      simde_poly8x8_from_private(r_[0]),
+      simde_poly8x8_from_private(r_[1]),
+    } };
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_p8
+  #define vld2_p8(a) simde_vld2_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x4x2_t
+simde_vld2_p16(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2_p16(ptr);
+  #else
+    #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) && HEDLEY_GCC_VERSION_CHECK(12,0,0)
+      HEDLEY_DIAGNOSTIC_PUSH
+      SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_
+    #endif
+    simde_poly16x4_private r_[2];
+
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_[0])) ; i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+    #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) && HEDLEY_GCC_VERSION_CHECK(12,0,0)
+      HEDLEY_DIAGNOSTIC_POP
+    #endif
+
+    simde_poly16x4x2_t r = { {
+      simde_poly16x4_from_private(r_[0]),
+      simde_poly16x4_from_private(r_[1]),
+    } };
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2_p16
+  #define vld2_p16(a) simde_vld2_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x1x2_t
+simde_vld2_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2_p64(ptr);
+  #else
+    simde_poly64x1_private r_[2];
+
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_[0])) ; i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+
+    simde_poly64x1x2_t r = { {
+      simde_poly64x1_from_private(r_[0]),
+      simde_poly64x1_from_private(r_[1]),
+    } };
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2_p64
+  #define vld2_p64(a) simde_vld2_p64((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16x2_t
+simde_vld2q_p8(simde_poly8_t const ptr[HEDLEY_ARRAY_PARAM(32)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2q_p8(ptr);
+  #else
+    #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) && HEDLEY_GCC_VERSION_CHECK(12,0,0) && defined(SIMDE_ARCH_RISCV64)
+      HEDLEY_DIAGNOSTIC_PUSH
+      SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_
+    #endif
+    simde_poly8x16_private r_[2];
+
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_[0])) ; i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+
+    simde_poly8x16x2_t r = { {
+      simde_poly8x16_from_private(r_[0]),
+      simde_poly8x16_from_private(r_[1]),
+    } };
+
+    #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) && HEDLEY_GCC_VERSION_CHECK(12,0,0) && defined(SIMDE_ARCH_RISCV64)
+      HEDLEY_DIAGNOSTIC_POP
+    #endif
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_p8
+  #define vld2q_p8(a) simde_vld2q_p8((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly16x8x2_t
+simde_vld2q_p16(simde_poly16_t const ptr[HEDLEY_ARRAY_PARAM(16)]) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vld2q_p16(ptr);
+  #else
+    #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) && HEDLEY_GCC_VERSION_CHECK(12,0,0) && defined(SIMDE_ARCH_RISCV64)
+      HEDLEY_DIAGNOSTIC_PUSH
+      SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_
+    #endif
+    simde_poly16x8_private r_[2];
+
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_[0])) ; i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+
+    simde_poly16x8x2_t r = { {
+      simde_poly16x8_from_private(r_[0]),
+      simde_poly16x8_from_private(r_[1]),
+    } };
+    #if defined(SIMDE_DIAGNOSTIC_DISABLE_UNINITIALIZED_) && HEDLEY_GCC_VERSION_CHECK(12,0,0) && defined(SIMDE_ARCH_RISCV64)
+      HEDLEY_DIAGNOSTIC_POP
+    #endif
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_p16
+  #define vld2q_p16(a) simde_vld2q_p16((a))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly64x2x2_t
+simde_vld2q_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
+  #if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
+    return vld2q_p64(ptr);
+  #else
+    simde_poly64x2_private r_[2];
+
+    for (size_t i = 0 ; i < (sizeof(r_) / sizeof(r_[0])) ; i++) {
+      for (size_t j = 0 ; j < (sizeof(r_[0].values) / sizeof(r_[0].values[0])) ; j++) {
+        r_[i].values[j] = ptr[i + (j * (sizeof(r_) / sizeof(r_[0])))];
+      }
+    }
+
+    simde_poly64x2x2_t r = { {
+      simde_poly64x2_from_private(r_[0]),
+      simde_poly64x2_from_private(r_[1]),
+    } };
+
+    return r;
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
+  #undef vld2q_p64
+  #define vld2q_p64(a) simde_vld2q_p64((a))
+#endif
+
+
 #endif /* !defined(SIMDE_BUG_INTEL_857088) */
 
 SIMDE_END_DECLS_

arm/neon/mul.h

@@ -643,6 +643,68 @@ simde_x_vmulq_u64(simde_uint64x2_t a, simde_uint64x2_t b) {
     );
 }
 
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x8_t
+simde_vmul_p8(simde_poly8x8_t a, simde_poly8x8_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vmul_p8(a, b);
+  #else
+    simde_uint8x8_private
+      r_,
+      a_ = simde_uint8x8_to_private(simde_vreinterpret_u8_p8(a)),
+      b_ = simde_uint8x8_to_private(simde_vreinterpret_u8_p8(b));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      uint16_t extend_op2 = HEDLEY_STATIC_CAST(uint16_t, b_.values[i]);
+      uint16_t result = 0;
+      for(uint16_t j = 0; j < 8; ++j) {
+        if (a_.values[i] & (1 << j)) {
+          result = HEDLEY_STATIC_CAST(uint16_t, result ^ (extend_op2 << j));
+        }
+      }
+      r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (result & (0xFF)));
+    }
+
+    return simde_vreinterpret_p8_u8(simde_uint8x8_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmul_p8
+  #define vmul_p8(a, b) simde_vmul_p8((a), (b))
+#endif
+
+SIMDE_FUNCTION_ATTRIBUTES
+simde_poly8x16_t
+simde_vmulq_p8(simde_poly8x16_t a, simde_poly8x16_t b) {
+  #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
+    return vmulq_p8(a, b);
+  #else
+    simde_uint8x16_private
+      r_,
+      a_ = simde_uint8x16_to_private(simde_vreinterpretq_u8_p8(a)),
+      b_ = simde_uint8x16_to_private(simde_vreinterpretq_u8_p8(b));
+
+    SIMDE_VECTORIZE
+    for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
+      uint16_t extend_op2 = HEDLEY_STATIC_CAST(uint16_t, b_.values[i]);
+      uint16_t result = 0;
+      for(uint16_t j = 0; j < 8; ++j) {
+        if (a_.values[i] & (1 << j)) {
+          result = HEDLEY_STATIC_CAST(uint16_t, result ^ (extend_op2 << j));
+        }
+      }
+      r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, (result & (0xFF)));
+    }
+
+    return simde_vreinterpretq_p8_u8(simde_uint8x16_from_private(r_));
+  #endif
+}
+#if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
+  #undef vmulq_p8
+  #define vmulq_p8(a, b) simde_vmulq_p8((a), (b))
+#endif
+
 SIMDE_END_DECLS_
 HEDLEY_DIAGNOSTIC_POP