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Commit d656b4d7 authored by jinbo's avatar jinbo Committed by Michael R. Crusoe
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x86 sse2: small fixes for loongarch 

At present, the instructions like slli/srli on loongarch only
accept immediate constant values for shit count, so in order
to avoid compiler errors in the build process, we need to use
sll/srl version instead. In the feature, if the compiler
supports the formers, we can restore them.
parent 8f56d4ff
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x86/sse2.h
View file @ d656b4d7
...@@ -6163,7 +6163,7 @@ simde_mm_sll_epi16 (simde__m128i a, simde__m128i count) { ...@@ -6163,7 +6163,7 @@ simde_mm_sll_epi16 (simde__m128i a, simde__m128i count) {
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
r_.neon_u16 = vshlq_u16(a_.neon_u16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, count_.u64[0]))); r_.neon_u16 = vshlq_u16(a_.neon_u16, vdupq_n_s16(HEDLEY_STATIC_CAST(int16_t, count_.u64[0])));
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE) #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vslli_h(a_.lsx_i64, count_.u64[0]); r_.lsx_i64 = __lsx_vsll_h(a_.lsx_i64, __lsx_vreplgr2vr_h(count_.u64[0]));
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 16) ? wasm_i16x8_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i16x8_const(0,0,0,0,0,0,0,0)); r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 16) ? wasm_i16x8_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i16x8_const(0,0,0,0,0,0,0,0));
#else #else
...@@ -6199,7 +6199,7 @@ simde_mm_sll_epi32 (simde__m128i a, simde__m128i count) { ...@@ -6199,7 +6199,7 @@ simde_mm_sll_epi32 (simde__m128i a, simde__m128i count) {
#elif defined(SIMDE_ARM_NEON_A32V7_NATIVE) #elif defined(SIMDE_ARM_NEON_A32V7_NATIVE)
r_.neon_u32 = vshlq_u32(a_.neon_u32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, count_.u64[0]))); r_.neon_u32 = vshlq_u32(a_.neon_u32, vdupq_n_s32(HEDLEY_STATIC_CAST(int32_t, count_.u64[0])));
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE) #elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vslli_w(a_.lsx_i64, count_.u64[0]); r_.lsx_i64 = __lsx_vsll_w(a_.lsx_i64, __lsx_vreplgr2vr_w(count_.u64[0]));
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 32) ? wasm_i32x4_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i32x4_const(0,0,0,0)); r_.wasm_v128 = ((wasm_i64x2_extract_lane(count_.wasm_v128, 0) < 32) ? wasm_i32x4_shl(a_.wasm_v128, HEDLEY_STATIC_CAST(int32_t, wasm_i64x2_extract_lane(count_.wasm_v128, 0))) : wasm_i32x4_const(0,0,0,0));
#else #else
...@@ -6561,7 +6561,9 @@ simde_mm_slli_epi16 (simde__m128i a, const int imm8) ...@@ -6561,7 +6561,9 @@ simde_mm_slli_epi16 (simde__m128i a, const int imm8)
r_, r_,
a_ = simde__m128i_to_private(a); a_ = simde__m128i_to_private(a);
#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) #if defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vsll_h(a_.lsx_i64, __lsx_vreplgr2vr_h(imm8));
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
r_.i16 = a_.i16 << SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff); r_.i16 = a_.i16 << SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff);
#else #else
const int s = (imm8 > HEDLEY_STATIC_CAST(int, sizeof(r_.i16[0]) * CHAR_BIT) - 1) ? 0 : imm8; const int s = (imm8 > HEDLEY_STATIC_CAST(int, sizeof(r_.i16[0]) * CHAR_BIT) - 1) ? 0 : imm8;
...@@ -6589,8 +6591,6 @@ simde_mm_slli_epi16 (simde__m128i a, const int imm8) ...@@ -6589,8 +6591,6 @@ simde_mm_slli_epi16 (simde__m128i a, const int imm8)
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
#define simde_mm_slli_epi16(a, imm8) \ #define simde_mm_slli_epi16(a, imm8) \
((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sl(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8))))) ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sl(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8)))))
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
#define simde_mm_slli_epi16(a, imm8) ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_lsx_i64(__lsx_vslli_h(simde__m128i_to_private(a).lsx_i64, ((imm8) & 15))))
#endif #endif
#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
#define _mm_slli_epi16(a, imm8) simde_mm_slli_epi16(a, imm8) #define _mm_slli_epi16(a, imm8) simde_mm_slli_epi16(a, imm8)
...@@ -6607,7 +6607,9 @@ simde_mm_slli_epi32 (simde__m128i a, const int imm8) ...@@ -6607,7 +6607,9 @@ simde_mm_slli_epi32 (simde__m128i a, const int imm8)
r_, r_,
a_ = simde__m128i_to_private(a); a_ = simde__m128i_to_private(a);
#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) #if defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vsll_w(a_.lsx_i64, __lsx_vreplgr2vr_w(imm8));
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
r_.i32 = a_.i32 << imm8; r_.i32 = a_.i32 << imm8;
#else #else
SIMDE_VECTORIZE SIMDE_VECTORIZE
...@@ -6646,8 +6648,6 @@ simde_mm_slli_epi32 (simde__m128i a, const int imm8) ...@@ -6646,8 +6648,6 @@ simde_mm_slli_epi32 (simde__m128i a, const int imm8)
} \ } \
ret; \ ret; \
})) }))
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
#define simde_mm_slli_epi32(a, imm8) ((imm8 & ~31) ? simde_mm_setzero_si128() : simde__m128i_from_lsx_i64(__lsx_vslli_w(simde__m128i_to_private(a).lsx_i64, ((imm8) & 31))))
#endif #endif
#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
#define _mm_slli_epi32(a, imm8) simde_mm_slli_epi32(a, imm8) #define _mm_slli_epi32(a, imm8) simde_mm_slli_epi32(a, imm8)
...@@ -6664,7 +6664,9 @@ simde_mm_slli_epi64 (simde__m128i a, const int imm8) ...@@ -6664,7 +6664,9 @@ simde_mm_slli_epi64 (simde__m128i a, const int imm8)
r_, r_,
a_ = simde__m128i_to_private(a); a_ = simde__m128i_to_private(a);
#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) #if defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vsll_d(a_.lsx_i64, __lsx_vreplgr2vr_d(imm8));
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
r_.i64 = a_.i64 << imm8; r_.i64 = a_.i64 << imm8;
#else #else
SIMDE_VECTORIZE SIMDE_VECTORIZE
...@@ -6688,8 +6690,6 @@ simde_mm_slli_epi64 (simde__m128i a, const int imm8) ...@@ -6688,8 +6690,6 @@ simde_mm_slli_epi64 (simde__m128i a, const int imm8)
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
#define simde_mm_slli_epi64(a, imm8) \ #define simde_mm_slli_epi64(a, imm8) \
((imm8 < 64) ? wasm_i64x2_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0)) ((imm8 < 64) ? wasm_i64x2_shl(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0))
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
#define simde_mm_slli_epi64(a, imm8) ((imm8 & ~63) ? simde_mm_setzero_si128() : simde__m128i_from_lsx_i64(__lsx_vslli_d(simde__m128i_to_private(a).lsx_i64, ((imm8) & 63))))
#endif #endif
#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
#define _mm_slli_epi64(a, imm8) simde_mm_slli_epi64(a, imm8) #define _mm_slli_epi64(a, imm8) simde_mm_slli_epi64(a, imm8)
...@@ -6706,7 +6706,9 @@ simde_mm_srli_epi16 (simde__m128i a, const int imm8) ...@@ -6706,7 +6706,9 @@ simde_mm_srli_epi16 (simde__m128i a, const int imm8)
r_, r_,
a_ = simde__m128i_to_private(a); a_ = simde__m128i_to_private(a);
#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) #if defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vsrl_h(a_.lsx_i64, __lsx_vreplgr2vr_h(imm8));
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
r_.u16 = a_.u16 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8); r_.u16 = a_.u16 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8);
#else #else
SIMDE_VECTORIZE SIMDE_VECTORIZE
...@@ -6733,8 +6735,6 @@ simde_mm_srli_epi16 (simde__m128i a, const int imm8) ...@@ -6733,8 +6735,6 @@ simde_mm_srli_epi16 (simde__m128i a, const int imm8)
#elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE) #elif defined(SIMDE_POWER_ALTIVEC_P6_NATIVE)
#define simde_mm_srli_epi16(a, imm8) \ #define simde_mm_srli_epi16(a, imm8) \
((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sr(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8))))) ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_altivec_i16(vec_sr(simde__m128i_to_altivec_i16(a), vec_splat_u16(HEDLEY_STATIC_CAST(unsigned short, imm8)))))
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
#define simde_mm_srli_epi16(a, imm8) ((imm8 & ~15) ? simde_mm_setzero_si128() : simde__m128i_from_lsx_i64(__lsx_vsrli_h(simde__m128i_to_private(a).lsx_i64, ((imm8) & 15))))
#endif #endif
#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
#define _mm_srli_epi16(a, imm8) simde_mm_srli_epi16(a, imm8) #define _mm_srli_epi16(a, imm8) simde_mm_srli_epi16(a, imm8)
...@@ -6751,7 +6751,9 @@ simde_mm_srli_epi32 (simde__m128i a, const int imm8) ...@@ -6751,7 +6751,9 @@ simde_mm_srli_epi32 (simde__m128i a, const int imm8)
r_, r_,
a_ = simde__m128i_to_private(a); a_ = simde__m128i_to_private(a);
#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) #if defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vsrl_w(a_.lsx_i64, __lsx_vreplgr2vr_w(imm8));
#elif defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
r_.u32 = a_.u32 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff); r_.u32 = a_.u32 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8 & 0xff);
#else #else
SIMDE_VECTORIZE SIMDE_VECTORIZE
...@@ -6790,8 +6792,6 @@ simde_mm_srli_epi32 (simde__m128i a, const int imm8) ...@@ -6790,8 +6792,6 @@ simde_mm_srli_epi32 (simde__m128i a, const int imm8)
} \ } \
ret; \ ret; \
})) }))
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
#define simde_mm_srli_epi32(a, imm8) ((imm8 & ~31) ? simde_mm_setzero_si128() : simde__m128i_from_lsx_i64(__lsx_vsrli_w(simde__m128i_to_private(a).lsx_i64, ((imm8) & 31))))
#endif #endif
#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
#define _mm_srli_epi32(a, imm8) simde_mm_srli_epi32(a, imm8) #define _mm_srli_epi32(a, imm8) simde_mm_srli_epi32(a, imm8)
...@@ -6810,6 +6810,8 @@ simde_mm_srli_epi64 (simde__m128i a, const int imm8) ...@@ -6810,6 +6810,8 @@ simde_mm_srli_epi64 (simde__m128i a, const int imm8)
#if defined(SIMDE_ARM_NEON_A32V7_NATIVE) #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(-imm8)); r_.neon_u64 = vshlq_u64(a_.neon_u64, vdupq_n_s64(-imm8));
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
r_.lsx_i64 = __lsx_vsrl_d(a_.lsx_i64, __lsx_vreplgr2vr_d(imm8));
#else #else
#if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_94488) #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR) && !defined(SIMDE_BUG_GCC_94488)
r_.u64 = a_.u64 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8); r_.u64 = a_.u64 >> SIMDE_CAST_VECTOR_SHIFT_COUNT(8, imm8);
...@@ -6836,8 +6838,6 @@ simde_mm_srli_epi64 (simde__m128i a, const int imm8) ...@@ -6836,8 +6838,6 @@ simde_mm_srli_epi64 (simde__m128i a, const int imm8)
#elif defined(SIMDE_WASM_SIMD128_NATIVE) #elif defined(SIMDE_WASM_SIMD128_NATIVE)
#define simde_mm_srli_epi64(a, imm8) \ #define simde_mm_srli_epi64(a, imm8) \
((imm8 < 64) ? wasm_u64x2_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0)) ((imm8 < 64) ? wasm_u64x2_shr(simde__m128i_to_private(a).wasm_v128, imm8) : wasm_i64x2_const(0,0))
#elif defined(SIMDE_LOONGARCH_LSX_NATIVE)
#define simde_mm_srli_epi64(a, imm8) ((imm8 & ~63) ? simde_mm_setzero_si128() : simde__m128i_from_lsx_i64(__lsx_vsrli_d(simde__m128i_to_private(a).lsx_i64, ((imm8) & 63))))
#endif #endif
#if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES) #if defined(SIMDE_X86_SSE2_ENABLE_NATIVE_ALIASES)
#define _mm_srli_epi64(a, imm8) simde_mm_srli_epi64(a, imm8) #define _mm_srli_epi64(a, imm8) simde_mm_srli_epi64(a, imm8)
......
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