Closes: https://github.com/simd-everywhere/simde/issues/1219

The vst1_*_x4 built-in functions in GCC 11 produce incorrect results,
as following exanple, this patch circumvents the issue by avoiding these
functions in GCC 11 and earlier versions.

float32x2x4_t val = {{
        {0.10f, 0.20f},
        {0.30f, 0.40f},
        {0.50f, 0.60f},
        {0.70f, 0.80f}
    }};
    float result[16];

    vst1_f32_x4(result, val);

get result = {0.100000 0.200000 0.500000 0.600000 0.000000 0.000000 0.000000 0.000000}
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>

Resolved a build failure on ARM64 with GCC 11 caused by excess
elements in a vector initializer. The issue stemmed from the
`__builtin_shuffle` function, where the number of elements in
the argument vector(s) and the mask vector must match.

For more details, refer to issue #1211.
Signed-off-by: LI Qingwu <Qing-wu.Li@leica-geosystems.com.cn>

Contains RVV implementations for the following Neon instructions: 

`abal`, `abdl_high`, `addw`, `addw_high`, `bcax`, `bic`, `cadd_rot270`, `cadd_rot90`, `cmla_lane`, `cmla_rot180_lane` , `cmla_rot270_lane`, `cmla_rot90_lane`, `combine`, `cvt`, `dot`, `dot_lane`, `dup_n`, `eor`, `ext`, `maxnmv`, `minnmv` , `movl` , `movn` , `qdmull` , `qshlu_n`,  `rnda`,  `rsubhn` , `shl`, `shl_n`, `shll_n`, `shr_n`, `shrn_n`, `sqadd`, `sqrt` 

Contains RVV implementations for the following Neon instructions.

`abs`, `addl`, `addl_high`, `addlv`, `addv`, `cge`, `cgt`, `cle`, `clez`, `clt`, `cnt`, `fma`, `fms`, `fms_n`, `get_high`, `get_low`, `hsub`, `mla`, `mla_n`, `mlal`, `mlal_high`, `mlal_high_n`, `mlal_n`, `mls`, `mls_n`, `mlsl`, `mlsl_high`, `mlsl_high_n`, `mlsl_n`, `qsub`, `qtbl`, `qtbx`, `rbit`, `recpe`, `rev16`, `rev32`, `rev64`, `subl`, `subl_high`, `subw`, `subw_high`, `tbl`, `tbx`