Commit 0cacf29d authored by Robert Schmidt's avatar Robert Schmidt

Merge branch 'integration_2022_wk44' into 'develop'

integration_2022_wk44

See merge request oai/openairinterface5g!1800

!1745 Configurable re-transmission rounds in dlsim and ulsim
!1699 NR RRC pdsch_Config harmonization
!1787 Bugfix in Delta_TF calculation for PHR
!1790 remove unused NR RRC code
!1774 Fix BWP switching to the previous active BWP when there is a RA with Msg3 through DCCH or DTCH
!1772 Add RRC measurement configuration and handling
!1731 replacing call to RRC processing timers for msg3 dcch
!1764 NR_UE: improve timing and initial frequency synchronization
!1777 NR UE move DLSCH PHY memory to stack
!1791 missed to test return code of bind()
parents 4940146f 159c9b6e
......@@ -359,6 +359,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- Support for master cell group configuration
- Interface with NGAP for the interactions with the AMF
- Interface with F1AP for CU/DU split deployment option
- Periodic RRC measurements of serving cell (no A/B events)
**gNB X2AP**
- Integration of X2AP messages and procedures for the exchanges with the eNB over X2 interface supporting the NSA setup according to 36.423 Rel. 15
......
......@@ -646,7 +646,7 @@ void UE_processing(nr_rxtx_thread_data_t *rxtxD) {
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
PHY_VARS_NR_UE *UE = rxtxD->UE;
uint8_t gNB_id = 0;
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
nr_phy_data_t phy_data = {0};
if (IS_SOFTMODEM_NOS1 || get_softmodem_params()->sa) {
/* send tick to RLC and PDCP every ms */
......@@ -662,7 +662,7 @@ void UE_processing(nr_rxtx_thread_data_t *rxtxD) {
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id, &phy_pdcch_config);
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, gNB_id, &phy_data);
UE->if_inst->dl_indication(&dl_indication, NULL);
}
......@@ -671,7 +671,7 @@ void UE_processing(nr_rxtx_thread_data_t *rxtxD) {
phy_procedures_slot_parallelization_nrUE_RX( UE, proc, 0, 0, 1, no_relay, NULL );
#else
uint64_t a=rdtsc_oai();
phy_procedures_nrUE_RX(UE, proc, gNB_id, &phy_pdcch_config, &rxtxD->txFifo);
phy_procedures_nrUE_RX(UE, proc, gNB_id, &phy_data, &rxtxD->txFifo);
LOG_D(PHY, "In %s: slot %d, time %llu\n", __FUNCTION__, proc->nr_slot_rx, (rdtsc_oai()-a)/3500);
#endif
......@@ -798,10 +798,10 @@ void syncInFrame(PHY_VARS_NR_UE *UE, openair0_timestamp *timestamp) {
int computeSamplesShift(PHY_VARS_NR_UE *UE) {
int samples_shift = -(UE->rx_offset>>1);
UE->rx_offset = 0; // reset so that it is not applied falsely in case of SSB being only in every second frame
UE->max_pos_fil = 0; // reset IIR filter when sample shift is applied
if (samples_shift != 0) {
LOG_I(NR_PHY,"Adjusting frame in time by %i samples\n", samples_shift);
UE->rx_offset = 0; // reset so that it is not applied falsely in case of SSB being only in every second frame
UE->max_pos_fil += samples_shift << 15; // reset IIR filter when sample shift is applied
}
return samples_shift;
}
......@@ -889,7 +889,7 @@ void *UE_thread(void *arg) {
continue;
}
if (start_rx_stream==0) {
if (start_rx_stream == 0) {
start_rx_stream=1;
syncInFrame(UE, &timestamp);
UE->rx_offset=0;
......
......@@ -413,12 +413,6 @@ int main( int argc, char **argv ) {
if (set_exe_prio)
set_priority(79);
if (mlockall(MCL_CURRENT | MCL_FUTURE) == -1)
{
fprintf(stderr, "mlockall: %s\n", strerror(errno));
return EXIT_FAILURE;
}
//uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
PHY_VARS_NR_UE *UE[MAX_NUM_CCs];
start_background_system();
......@@ -529,7 +523,6 @@ int main( int argc, char **argv ) {
pthread_mutex_init(&ue_pf_po_mutex, NULL);
memset (&UE_PF_PO[0][0], 0, sizeof(UE_PF_PO_t)*NUMBER_OF_UE_MAX*MAX_NUM_CCs);
set_latency_target();
mlockall(MCL_CURRENT | MCL_FUTURE);
if(IS_SOFTMODEM_DOSCOPE) {
load_softscope("nr",PHY_vars_UE_g[0][0]);
......
......@@ -34,6 +34,7 @@
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "openair2/COMMON/prs_nr_paramdef.h"
#include "SCHED_NR_UE/harq_nr.h"
extern uint16_t beta_cqi[16];
......@@ -627,21 +628,74 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
}
}
void free_nr_ue_dl_harq(NR_DL_UE_HARQ_t* harq_list, int number_of_processes, int num_rb) {
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS;
if (num_rb != 273) {
a_segments = a_segments*num_rb;
a_segments = (a_segments/273)+1;
}
for (int i=0; i<number_of_processes; i++) {
free_and_zero(harq_list[i].b);
for (int r=0; r<a_segments; r++) {
free_and_zero(harq_list[i].c[r]);
free_and_zero(harq_list[i].d[r]);
}
free_and_zero(harq_list[i].c);
free_and_zero(harq_list[i].d);
}
}
void term_nr_ue_transport(PHY_VARS_NR_UE *ue)
{
const int N_RB_DL = ue->frame_parms.N_RB_DL;
int num_cw = NR_MAX_NB_LAYERS > 4? 2:1;
for (int i = 0; i < NUMBER_OF_CONNECTED_gNB_MAX; i++) {
for (int j = 0; j < 2; j++) {
free_nr_ue_dlsch(&ue->dlsch[i][j], N_RB_DL);
if (j==0)
free_nr_ue_ulsch(&ue->ulsch[i], N_RB_DL, &ue->frame_parms);
for (int j = 0; j < num_cw; j++) {
free_nr_ue_dl_harq(ue->dl_harq_processes[j], NR_MAX_DLSCH_HARQ_PROCESSES, N_RB_DL);
free_nr_ue_ulsch(&ue->ulsch[i], N_RB_DL, &ue->frame_parms);
}
}
}
void nr_init_harq_processes(NR_DL_UE_HARQ_t* harq_list, int number_of_processes, int num_rb) {
free_nr_ue_dlsch(&ue->dlsch_SI[i], N_RB_DL);
free_nr_ue_dlsch(&ue->dlsch_ra[i], N_RB_DL);
int a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
if (num_rb != 273) {
a_segments = a_segments*num_rb;
a_segments = (a_segments/273)+1;
}
free_nr_ue_dlsch(&ue->dlsch_MCH[0], N_RB_DL);
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
for (int i=0; i<number_of_processes; i++) {
memset(harq_list + i, 0, sizeof(NR_DL_UE_HARQ_t));
init_downlink_harq_status(harq_list + i);
harq_list[i].b = malloc16(dlsch_bytes);
if (harq_list[i].b)
memset(harq_list[i].b, 0, dlsch_bytes);
else
AssertFatal(true, "Unable to reset harq memory \"b\"\n");
harq_list[i].c = malloc16(a_segments*sizeof(uint8_t *));
harq_list[i].d = malloc16(a_segments*sizeof(int16_t *));
for (int r=0; r<a_segments; r++) {
harq_list[i].c[r] = malloc16(1056);
harq_list[i].d[r] = malloc16(5*8448*sizeof(int16_t));
if (harq_list[i].c[r])
memset(harq_list[i].c[r],0,1056);
else
AssertFatal(true, "Unable to reset harq memory \"c\"\n");
if (harq_list[i].d[r])
memset(harq_list[i].d[r],0,5*8448);
else
AssertFatal(true, "Unable to reset harq memory \"d\"\n");
}
}
}
void init_nr_ue_transport(PHY_VARS_NR_UE *ue) {
......@@ -650,21 +704,14 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue) {
for (int i = 0; i < NUMBER_OF_CONNECTED_gNB_MAX; i++) {
for (int j=0; j<num_codeword; j++) {
AssertFatal((ue->dlsch[i][j] = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d] => %p\n",i,j,ue->dlsch[i][j]);
nr_init_harq_processes(ue->dl_harq_processes[j], NR_MAX_DLSCH_HARQ_PROCESSES, ue->frame_parms.N_RB_DL);
if (j==0) {
AssertFatal((ue->ulsch[i] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES,&ue->frame_parms))!=NULL,"Can't get ue ulsch structures\n");
LOG_D(PHY,"ulsch[%d] => %p\n",i,ue->ulsch[i]);
}
}
ue->dlsch_SI[i] = new_nr_ue_dlsch(1,1,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL);
ue->dlsch_ra[i] = new_nr_ue_dlsch(1,1,NSOFT,ue->max_ldpc_iterations,ue->frame_parms.N_RB_DL);
}
//ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
ue->dlsch_MCH[0] = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,MAX_LDPC_ITERATIONS_MBSFN,ue->frame_parms.N_RB_DL);
for(int i=0; i<5; i++)
ue->dl_stats[i] = 0;
}
......
......@@ -418,6 +418,8 @@ void reset_DLSCH_struct(const PHY_VARS_gNB *gNB, processingData_L1tx_t *msg);
void RCconfig_nrUE_prs(void *cfg);
void init_nr_prs_ue_vars(PHY_VARS_NR_UE *ue);
void nr_init_harq_processes(NR_DL_UE_HARQ_t* harq_list, int number_of_processes, int num_rb);
void free_nr_ue_dl_harq(NR_DL_UE_HARQ_t* harq_list, int number_of_processes, int num_rb);
/** @} */
#endif
......
......@@ -74,13 +74,12 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB,
harq->slot=slot;
harq->handled = 0;
harq->status= NR_ACTIVE;
harq->new_rx = harq->ndi != ulsch_pdu->pusch_data.new_data_indicator;
if (harq->new_rx) {
harq->ndi = ulsch_pdu->pusch_data.new_data_indicator;
harq->new_rx = ulsch_pdu->pusch_data.new_data_indicator;
LOG_D(PHY,"ULSCH ID %d RNTI %x HARQ PID %d new data indicator %d\n",ulsch_id, ulsch_pdu->rnti, harq_pid, ulsch_pdu->pusch_data.new_data_indicator);
if (harq->new_rx)
harq->round = 0;
} else {
else
harq->round++;
}
memcpy((void*)&ulsch->harq_processes[harq_pid]->ulsch_pdu, (void*)ulsch_pdu, sizeof(nfapi_nr_pusch_pdu_t));
......
......@@ -104,7 +104,6 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations, uint16_t N_RB_UL)
ulsch->max_ldpc_iterations = max_ldpc_iterations;
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
ulsch->harq_processes[i] = (NR_UL_gNB_HARQ_t *)malloc16_clear(sizeof(NR_UL_gNB_HARQ_t));
ulsch->harq_processes[i]->b = (uint8_t*)malloc16_clear(ulsch_bytes);
ulsch->harq_processes[i]->c = (uint8_t**)malloc16_clear(a_segments*sizeof(uint8_t *));
......@@ -442,30 +441,16 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_ULSCH_DECODING,1);
harq_process->TBS = pusch_pdu->pusch_data.tb_size;
harq_process->round = nr_rv_to_round(pusch_pdu->pusch_data.rv_index);
harq_process->new_rx = false; // flag to indicate if this is a new reception for this harq (initialized to false)
dtx_det = 0;
if (harq_process->round == 0) {
harq_process->new_rx = true;
harq_process->ndi = pusch_pdu->pusch_data.new_data_indicator;
}
// this happens if there was a DTX in round 0
if (harq_process->ndi != pusch_pdu->pusch_data.new_data_indicator) {
harq_process->new_rx = true;
harq_process->ndi = pusch_pdu->pusch_data.new_data_indicator;
LOG_D(PHY,"Missed ULSCH detection. NDI toggled but rv %d does not correspond to first reception\n",pusch_pdu->pusch_data.rv_index);
}
A = (harq_process->TBS)<<3;
// target_code_rate is in 0.1 units
float Coderate = (float) pusch_pdu->target_code_rate / 10240.0f;
LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, Coderate %f RV %d round %d\n",
harq_pid, A, G, mcs, n_layers, nb_rb, Qm, Coderate, pusch_pdu->pusch_data.rv_index, harq_process->round);
LOG_D(PHY,"ULSCH Decoding, harq_pid %d rnti %x TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, Coderate %f RV %d round %d new RX %d\n",
harq_pid, ulsch->rnti, A, G, mcs, n_layers, nb_rb, Qm, Coderate, pusch_pdu->pusch_data.rv_index, harq_process->round, harq_process->new_rx);
p_decParams->BG = pusch_pdu->maintenance_parms_v3.ldpcBaseGraph;
int kc;
......@@ -701,7 +686,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
LOG_D(PHY,"[gNB %d] ULSCH: Setting ACK for slot %d TBS %d\n",
phy_vars_gNB->Mod_id,harq_process->slot,harq_process->TBS);
harq_process->status = SCH_IDLE;
harq_process->round = 0;
harq_process->round = 0;
ulsch->harq_mask &= ~(1 << harq_pid);
LOG_D(PHY, "ULSCH received ok \n");
......
......@@ -27,7 +27,7 @@
#include "executables/softmodem-common.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#define DEBUG_PHY
//#define DEBUG_PHY
// Adjust location synchronization point to account for drift
// The adjustment is performed once per frame based on the
......@@ -75,14 +75,14 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
// filter position to reduce jitter
if (clear == 1)
ue->max_pos_fil = max_pos;
ue->max_pos_fil = max_pos << 15;
else
ue->max_pos_fil = ((ue->max_pos_fil * coef) + (max_pos * ncoef)) >> 15;
ue->max_pos_fil = ((ue->max_pos_fil * coef) >> 15) + (max_pos * ncoef);
// do not filter to have proactive timing adjustment
//ue->max_pos_fil = max_pos;
//ue->max_pos_fil = max_pos << 15;
int diff = ue->max_pos_fil - sync_pos;
int diff = (ue->max_pos_fil >> 15) - sync_pos;
if (frame_parms->freq_range==nr_FR2)
sync_offset = 2;
......@@ -118,7 +118,7 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
}
#ifdef DEBUG_PHY
LOG_D(PHY,"AbsSubframe %d: diff = %i, rx_offset (final) = %i : clear = %d, max_pos = %d, max_pos_fil = %d, max_val = %d, sync_pos %d\n",
LOG_I(PHY,"AbsSubframe %d: diff = %i, rx_offset (final) = %i : clear = %d, max_pos = %d, max_pos_fil = %d, max_val = %d, sync_pos %d\n",
subframe,
diff,
ue->rx_offset,
......
......@@ -27,6 +27,7 @@
#include "PHY/NR_REFSIG/nr_refsig.h"
#include "PHY/NR_REFSIG/dmrs_nr.h"
#include "PHY/NR_REFSIG/ptrs_nr.h"
#include "PHY/NR_REFSIG/nr_mod_table.h"
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "common/utils/nr/nr_common.h"
......@@ -39,7 +40,26 @@
//#define DEBUG_PBCH
//#define DEBUG_PRS_CHEST // To enable PRS Matlab dumps
//#define DEBUG_PRS_PRINTS // To enable PRS channel estimation debug logs
extern short nr_qpsk_mod_table[8];
#define CH_INTERP 0
#define NO_INTERP 1
/* Generic function to find the peak of channel estimation buffer */
void peak_estimator(int32_t *buffer, int32_t buf_len, int32_t *peak_idx, int32_t *peak_val)
{
int32_t max_val = 0, max_idx = 0, abs_val = 0;
for(int k = 0; k < buf_len; k++)
{
abs_val = squaredMod(((c16_t*)buffer)[k]);
if(abs_val > max_val)
{
max_val = abs_val;
max_idx = k;
}
}
*peak_val = max_val;
*peak_idx = max_idx;
}
int nr_prs_channel_estimation(uint8_t gNB_id,
uint8_t rsc_id,
......@@ -545,29 +565,6 @@ int nr_prs_channel_estimation(uint8_t gNB_id,
return(0);
}
#define CH_INTERP 0
#define NO_INTERP 1
/* Generic function to find the peak of channel estimation buffer */
void peak_estimator(int32_t *buffer, int32_t buf_len, int32_t *peak_idx, int32_t *peak_val)
{
int32_t max_val = 0, max_idx = 0, abs_val = 0;
for(int k = 0; k < buf_len; k++)
{
abs_val = squaredMod(((c16_t*)buffer)[k]);
if(abs_val > max_val)
{
max_val = abs_val;
max_idx = k;
}
}
*peak_val = max_val;
*peak_idx = max_idx;
}
#define CH_INTERP 0
#define NO_INTERP 1
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
......@@ -990,7 +987,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
if (dmrss == 2)
UEscopeCopy(ue, pbchDlChEstimateTime, (void*)dl_ch_estimates_time, sizeof(struct complex16), ue->frame_parms.nb_antennas_rx, idftsizeidx);
UEscopeCopy(ue, pbchDlChEstimateTime, (void*)dl_ch_estimates_time, sizeof(struct complex16), ue->frame_parms.nb_antennas_rx, ue->frame_parms.ofdm_symbol_size);
return(0);
}
......@@ -1223,6 +1220,10 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
ch[0] = ch_sum[0] / 3;
ch[1] = ch_sum[1] / 3;
multadd_real_vector_complex_scalar(filt16a_1, ch, dl_ch, 16);
#ifdef DEBUG_PDCCH
for (int m =0; m<12; m++)
printf("data : dl_ch -> (%d,%d)\n",dl_ch[0+2*m],dl_ch[1+2*m]);
#endif
dl_ch += 24;
ch_sum[0] = 0;
ch_sum[1] = 0;
......@@ -2206,7 +2207,7 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
unsigned char symbol,
uint32_t nb_re_pdsch,
uint16_t rnti,
RX_type_t rx_type)
NR_UE_DLSCH_t dlsch[2])
{
//#define DEBUG_DL_PTRS 1
int32_t *ptrs_re_symbol = NULL;
......@@ -2225,30 +2226,30 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
uint16_t *nb_rb = NULL;
if(dlsch0_harq->status == ACTIVE) {
symbInSlot = dlsch0_harq->start_symbol + dlsch0_harq->nb_symbols;
startSymbIndex = &dlsch0_harq->start_symbol;
nbSymb = &dlsch0_harq->nb_symbols;
L_ptrs = &dlsch0_harq->PTRSTimeDensity;
K_ptrs = &dlsch0_harq->PTRSFreqDensity;
dmrsSymbPos = &dlsch0_harq->dlDmrsSymbPos;
ptrsSymbPos = &dlsch0_harq->ptrs_symbols;
ptrsSymbIdx = &dlsch0_harq->ptrs_symbol_index;
ptrsReOffset = &dlsch0_harq->PTRSReOffset;
dmrsConfigType = &dlsch0_harq->dmrsConfigType;
nb_rb = &dlsch0_harq->nb_rb;
symbInSlot = dlsch[0].dlsch_config.start_symbol + dlsch[0].dlsch_config.number_symbols;
startSymbIndex = &dlsch[0].dlsch_config.start_symbol;
nbSymb = &dlsch[0].dlsch_config.number_symbols;
L_ptrs = &dlsch[0].dlsch_config.PTRSTimeDensity;
K_ptrs = &dlsch[0].dlsch_config.PTRSFreqDensity;
dmrsSymbPos = &dlsch[0].dlsch_config.dlDmrsSymbPos;
ptrsReOffset = &dlsch[0].dlsch_config.PTRSReOffset;
dmrsConfigType = &dlsch[0].dlsch_config.dmrsConfigType;
nb_rb = &dlsch[0].dlsch_config.number_rbs;
ptrsSymbPos = &dlsch[0].ptrs_symbols;
ptrsSymbIdx = &dlsch[0].ptrs_symbol_index;
}
if(dlsch1_harq) {
symbInSlot = dlsch1_harq->start_symbol + dlsch0_harq->nb_symbols;
startSymbIndex = &dlsch1_harq->start_symbol;
nbSymb = &dlsch1_harq->nb_symbols;
L_ptrs = &dlsch1_harq->PTRSTimeDensity;
K_ptrs = &dlsch1_harq->PTRSFreqDensity;
dmrsSymbPos = &dlsch1_harq->dlDmrsSymbPos;
ptrsSymbPos = &dlsch1_harq->ptrs_symbols;
ptrsSymbIdx = &dlsch1_harq->ptrs_symbol_index;
ptrsReOffset = &dlsch1_harq->PTRSReOffset;
dmrsConfigType = &dlsch1_harq->dmrsConfigType;
nb_rb = &dlsch1_harq->nb_rb;
symbInSlot = dlsch[1].dlsch_config.start_symbol + dlsch[1].dlsch_config.number_symbols;
startSymbIndex = &dlsch[1].dlsch_config.start_symbol;
nbSymb = &dlsch[1].dlsch_config.number_symbols;
L_ptrs = &dlsch[1].dlsch_config.PTRSTimeDensity;
K_ptrs = &dlsch[1].dlsch_config.PTRSFreqDensity;
dmrsSymbPos = &dlsch[1].dlsch_config.dlDmrsSymbPos;
ptrsReOffset = &dlsch[1].dlsch_config.PTRSReOffset;
dmrsConfigType = &dlsch[1].dlsch_config.dmrsConfigType;
nb_rb = &dlsch[1].dlsch_config.number_rbs;
ptrsSymbPos = &dlsch[1].ptrs_symbols;
ptrsSymbIdx = &dlsch[1].ptrs_symbol_index;
}
/* loop over antennas */
for (int aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
......
......@@ -107,7 +107,8 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot);
uint8_t slot,
NR_UE_DLSCH_t *dlsch);
void nr_ue_ssb_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t gNB_index,
......@@ -134,7 +135,7 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
unsigned char symbol,
uint32_t nb_re_pdsch,
uint16_t rnti,
RX_type_t rx_type);
NR_UE_DLSCH_t dlsch[2]);
float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index);
......
......@@ -112,14 +112,13 @@ float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t slot)
uint8_t slot,
NR_UE_DLSCH_t *dlsch)
{
int aarx, aatx, gNB_id = 0;
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
int ch_offset = frame_parms->ofdm_symbol_size*2;
NR_UE_DLSCH_t *dlsch = ue->dlsch[gNB_id][0];
uint8_t harq_pid = dlsch->current_harq_pid;
int N_RB_DL = dlsch->harq_processes[harq_pid]->nb_rb;
int N_RB_DL = dlsch->dlsch_config.number_rbs;
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
......
......@@ -682,18 +682,22 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
int32_t avgs;
int32_t avgP[4];
int n_rb,rb_offset;
get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset);
// Pointers to extracted PDCCH symbols in frequency-domain.
int32_t rx_size = 4*273*12;
__attribute__ ((aligned(32))) int32_t rxdataF_ext[4*frame_parms->nb_antennas_rx][rx_size];
__attribute__ ((aligned(32))) int32_t rxdataF_comp[4*frame_parms->nb_antennas_rx][rx_size];
__attribute__ ((aligned(32))) int32_t pdcch_dl_ch_estimates_ext[4*frame_parms->nb_antennas_rx][rx_size];
int32_t rx_size = 4*n_rb*12;
__attribute__ ((aligned(32))) int32_t rxdataF_ext[frame_parms->nb_antennas_rx][rx_size];
__attribute__ ((aligned(32))) int32_t rxdataF_comp[frame_parms->nb_antennas_rx][rx_size];
__attribute__ ((aligned(32))) int32_t pdcch_dl_ch_estimates_ext[frame_parms->nb_antennas_rx][rx_size];
memset(rxdataF_comp, 0, sizeof(rxdataF_comp));
// Pointer to llrs, 4-bit resolution.
int32_t llr_size = 2*4*100*12;
int32_t llr_size = 2*4*n_rb*9;
int16_t llr[llr_size];
get_coreset_rballoc(rel15->coreset.frequency_domain_resource,&n_rb,&rb_offset);
memset(llr, 0, sizeof(llr));
LOG_D(PHY,"pdcch coreset: freq %x, n_rb %d, rb_offset %d\n",
rel15->coreset.frequency_domain_resource[0],n_rb,rb_offset);
for (int s=rel15->coreset.StartSymbolIndex; s<(rel15->coreset.StartSymbolIndex+rel15->coreset.duration); s++) {
......@@ -863,8 +867,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
NR_UE_PDCCH_CONFIG *phy_pdcch_config) {
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15) {
//int gNB_id = 0;
int16_t tmp_e[16*108];
......@@ -941,7 +944,6 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
}
e_rx_cand_idx += 9*L*6*2; //e_rx index for next candidate (L CCEs, 6 REGs per CCE and 9 REs per REG and 2 uint16_t per RE)
}
phy_pdcch_config->nb_search_space = 0;
return(dci_ind->number_of_dcis);
}
......
......@@ -57,107 +57,12 @@ notifiedFIFO_t freeBlocks_dl;
notifiedFIFO_elt_t *msgToPush_dl;
int nbDlProcessing =0;
void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr, uint16_t N_RB_DL) {
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS;
NR_UE_DLSCH_t *dlsch=*dlschptr;
if (dlsch) {
if (N_RB_DL != 273) {
a_segments = a_segments*N_RB_DL;
a_segments = a_segments/273 +1;
}
for (int i=0; i<dlsch->Mdlharq; i++) {
if (dlsch->harq_processes[i]) {
if (dlsch->harq_processes[i]->b) {
free16(dlsch->harq_processes[i]->b,a_segments*1056);
dlsch->harq_processes[i]->b = NULL;
}
for (int r=0; r<a_segments; r++) {
free16(dlsch->harq_processes[i]->c[r],1056);
dlsch->harq_processes[i]->c[r] = NULL;
free16(dlsch->harq_processes[i]->d[r],5*8448);
dlsch->harq_processes[i]->d[r] = NULL;
}
free16(dlsch->harq_processes[i]->c,a_segments);
free16(dlsch->harq_processes[i]->d,a_segments);
free16(dlsch->harq_processes[i],sizeof(NR_DL_UE_HARQ_t));
dlsch->harq_processes[i] = NULL;
}
}
free16(dlsch,sizeof(NR_UE_DLSCH_t));
dlsch = NULL;
}
}
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_ldpc_iterations,uint16_t N_RB_DL) {
NR_UE_DLSCH_t *dlsch;
uint8_t exit_flag = 0;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
if (N_RB_DL != 273) {
a_segments = a_segments*N_RB_DL;
a_segments = (a_segments/273)+1;
}
uint32_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
dlsch = (NR_UE_DLSCH_t *)malloc16(sizeof(NR_UE_DLSCH_t));
if (dlsch) {
memset(dlsch,0,sizeof(NR_UE_DLSCH_t));
dlsch->Kmimo = Kmimo;
dlsch->Mdlharq = Mdlharq;
dlsch->number_harq_processes_for_pdsch = Mdlharq;
dlsch->Nsoft = Nsoft;
void nr_ue_dlsch_init(NR_UE_DLSCH_t *dlsch_list, int num_dlsch, uint8_t max_ldpc_iterations) {
for (int i=0; i < num_dlsch; i++) {
NR_UE_DLSCH_t *dlsch = dlsch_list + i;
memset(dlsch, 0, sizeof(NR_UE_DLSCH_t));
dlsch->max_ldpc_iterations = max_ldpc_iterations;
for (int i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (NR_DL_UE_HARQ_t *)malloc16(sizeof(NR_DL_UE_HARQ_t));
if (dlsch->harq_processes[i]) {
memset(dlsch->harq_processes[i],0,sizeof(NR_DL_UE_HARQ_t));
init_downlink_harq_status(dlsch->harq_processes[i]);
dlsch->harq_processes[i]->first_rx=1;
dlsch->harq_processes[i]->b = (uint8_t *)malloc16(dlsch_bytes);
if (dlsch->harq_processes[i]->b)
memset(dlsch->harq_processes[i]->b,0,dlsch_bytes);
else
exit_flag=3;
dlsch->harq_processes[i]->c = (uint8_t **)malloc16(a_segments*sizeof(uint8_t *));
dlsch->harq_processes[i]->d = (int16_t **)malloc16(a_segments*sizeof(int16_t *));
for (int r=0; r<a_segments; r++) {
dlsch->harq_processes[i]->c[r] = (uint8_t *)malloc16(1056);
dlsch->harq_processes[i]->d[r] = (int16_t *)malloc16(5*8448*sizeof(int16_t));
if (dlsch->harq_processes[i]->c[r])
memset(dlsch->harq_processes[i]->c[r],0,1056);
if (dlsch->harq_processes[i]->d[r])
memset(dlsch->harq_processes[i]->d[r],0,5*8448);
else
exit_flag=2;
}
} else {
exit_flag=1;
}
}
if (exit_flag==0)
return(dlsch);
}
LOG_D(PHY,"new_ue_dlsch with size %zu: exit_flag = %u\n",sizeof(NR_DL_UE_HARQ_t), exit_flag);
free_nr_ue_dlsch(&dlsch,N_RB_DL);
return(NULL);
}
void nr_dlsch_unscrambling(int16_t *llr, uint32_t size, uint8_t q, uint32_t Nid, uint32_t n_RNTI)
......@@ -300,7 +205,7 @@ void nr_processDLSegment(void* arg) {
harq_process->d[r],
w,
harq_process->C,
harq_process->rvidx,
dlsch->dlsch_config.rv,
harq_process->first_rx,
E,
harq_process->F,
......@@ -400,8 +305,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti) {
uint8_t harq_pid) {
uint32_t A,E;
uint32_t G;
uint32_t ret,offset;
......@@ -416,20 +320,20 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
// HARQ stats
phy_vars_ue->dl_stats[harq_process->DLround]++;
LOG_D(PHY,"Round %d RV idx %d\n",harq_process->DLround,harq_process->rvidx);
LOG_D(PHY,"Round %d RV idx %d\n",harq_process->DLround,dlsch->dlsch_config.rv);
uint8_t kc;
uint16_t nb_rb;// = 30;
uint8_t dmrs_Type = harq_process->dmrsConfigType;
uint8_t dmrs_Type = dlsch->dlsch_config.dmrsConfigType;
AssertFatal(dmrs_Type == 0 || dmrs_Type == 1, "Illegal dmrs_type %d\n", dmrs_Type);
uint8_t nb_re_dmrs;
if (dmrs_Type==NFAPI_NR_DMRS_TYPE1) {
nb_re_dmrs = 6*harq_process->n_dmrs_cdm_groups;
nb_re_dmrs = 6*dlsch->dlsch_config.n_dmrs_cdm_groups;
} else {
nb_re_dmrs = 4*harq_process->n_dmrs_cdm_groups;
nb_re_dmrs = 4*dlsch->dlsch_config.n_dmrs_cdm_groups;
}
uint16_t dmrs_length = get_num_dmrs(harq_process->dlDmrsSymbPos);
uint16_t dmrs_length = get_num_dmrs(dlsch->dlsch_config.dlDmrsSymbPos);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_IN);
//NR_DL_UE_HARQ_t *harq_process = dlsch->harq_processes[0];
......@@ -466,18 +370,18 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return(max_ldpc_iterations + 1);
}
*/
nb_rb = harq_process->nb_rb;
A = harq_process->TBS;
nb_rb = dlsch->dlsch_config.number_rbs;
A = dlsch->dlsch_config.TBS;
ret = dlsch->max_ldpc_iterations + 1;
dlsch->last_iteration_cnt = ret;
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, dmrs_length, harq_process->Qm,harq_process->Nl);
harq_process->G = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, dmrs_length, dlsch->dlsch_config.qamModOrder,dlsch->Nl);
G = harq_process->G;
// target_code_rate is in 0.1 units
float Coderate = (float) harq_process->R / 10240.0f;
float Coderate = (float) dlsch->dlsch_config.targetCodeRate / 10240.0f;
LOG_D(PHY,"%d.%d DLSCH Decoding, harq_pid %d TBS %d (%d) G %d nb_re_dmrs %d length dmrs %d mcs %d Nl %d nb_symb_sch %d nb_rb %d Qm %d Coderate %f\n",
frame,nr_slot_rx,harq_pid,A,A/8,G, nb_re_dmrs, dmrs_length, harq_process->mcs, harq_process->Nl, nb_symb_sch, nb_rb, harq_process->Qm, Coderate);
frame,nr_slot_rx,harq_pid,A,A/8,G, nb_re_dmrs, dmrs_length, dlsch->dlsch_config.mcs, dlsch->Nl, nb_symb_sch, nb_rb, dlsch->dlsch_config.qamModOrder, Coderate);
if ((A <=292) || ((A <= NR_MAX_PDSCH_TBS) && (Coderate <= 0.6667)) || Coderate <= 0.25) {
p_decParams->BG = 2;
......@@ -503,13 +407,13 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
&harq_process->F,
p_decParams->BG);
if (harq_process->C>MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*harq_process->Nl) {
if (harq_process->C>MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*dlsch->Nl) {
LOG_E(PHY,"nr_segmentation.c: too many segments %d, B %d\n",harq_process->C,harq_process->B);
return(-1);
}
if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD) && (!frame%100))
LOG_I(PHY,"K %d C %d Z %d nl %d \n", harq_process->K, harq_process->C, harq_process->Z, harq_process->Nl);
LOG_I(PHY,"K %d C %d Z %d nl %d \n", harq_process->K, harq_process->C, harq_process->Z, dlsch->Nl);
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_OUT);
......@@ -519,7 +423,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
p_decParams->numMaxIter = dlsch->max_ldpc_iterations;
p_decParams->outMode= 0;
r_offset = 0;
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*harq_process->Nl; //number of segments to be allocated
uint16_t a_segments = MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER*dlsch->Nl; //number of segments to be allocated
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
......@@ -542,7 +446,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
initNotifiedFIFO(&nf);
for (r=0; r<harq_process->C; r++) {
//printf("start rx segment %d\n",r);
E = nr_get_E(G, harq_process->C, harq_process->Qm, harq_process->Nl, r);
E = nr_get_E(G, harq_process->C, dlsch->dlsch_config.qamModOrder, dlsch->Nl, r);
union ldpcReqUnion id = {.s={dlsch->rnti,frame,nr_slot_rx,0,0}};
notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(ldpcDecode_ue_t), id.p, &nf, nr_processDLSegment_ptr);
ldpcDecode_ue_t * rdata=(ldpcDecode_ue_t *) NotifiedFifoData(req);
......@@ -557,11 +461,11 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
rdata->nbSegments = harq_process->C;
rdata->E = E;
rdata->A = A;
rdata->Qm = harq_process->Qm;
rdata->Qm = dlsch->dlsch_config.qamModOrder;
rdata->r_offset = r_offset;
rdata->Kr_bytes = Kr_bytes;
rdata->rv_index = harq_process->rvidx;
rdata->Tbslbrm = harq_process->tbslbrm;
rdata->rv_index = dlsch->dlsch_config.rv;
rdata->Tbslbrm = dlsch->dlsch_config.tbslbrm;
rdata->offset = offset;
rdata->dlsch = dlsch;
rdata->dlsch_id = 0;
......
......@@ -634,8 +634,7 @@ int nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode)
uint16_t nb_rb)
{
c16_t *rxF = (c16_t *)&rxdataF_comp[((int32_t)symbol*nb_rb*12)];
......@@ -677,8 +676,7 @@ void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode)
uint16_t nb_rb)
{
#if defined(__x86_64__) || defined(__i386__)
......@@ -780,8 +778,7 @@ void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode)
uint16_t nb_rb)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxF = (__m128i*)&rxdataF_comp[(symbol*nb_rb*12)];
......@@ -923,8 +920,7 @@ void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode)
uint16_t nb_rb)
{
__m128i *rxF = (__m128i*)&rxdataF_comp[(symbol*nb_rb*12)];
__m128i *ch_mag,*ch_magb,*ch_magr;
......
......@@ -391,7 +391,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
uint8_t gNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
nr_phy_data_t *phy_data,
fapiPbch_t *result) {
NR_UE_COMMON *nr_ue_common_vars = &ue->common_vars;
......@@ -580,7 +580,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
fapi_nr_rx_indication_t *rx_ind=calloc(sizeof(*rx_ind),1);
uint16_t number_pdus = 1;
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, phy_pdcch_config);
nr_fill_dl_indication(&dl_indication, NULL, rx_ind, proc, ue, gNB_id, phy_data);
nr_fill_rx_indication(rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, gNB_id, ue, NULL, NULL, number_pdus, proc,(void *)result);
if (ue->if_inst && ue->if_inst->dl_indication)
......
......@@ -47,22 +47,10 @@
* @{
*/
/** \fn free_ue_dlsch(NR_UE_DLSCH_t *dlsch)
\brief This function frees memory allocated for a particular DLSCH at UE
@param dlsch Pointer to DLSCH to be removed
*/
void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlsch, uint16_t N_RB_DL);
/** \fn new_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft)
\brief This function allocates structures for a particular DLSCH at UE
@returns Pointer to DLSCH to be removed
@param Kmimo Kmimo factor from 36-212/36-213
@param Mdlharq Maximum number of HARQ rounds (36-212/36-213)
@param Nsoft Soft-LLR buffer size from UE-Category
@params N_RB_DL total number of resource blocks (determine the operating BW)
/** \brief This function initialises structures for DLSCH at UE
*/
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint16_t N_RB_DL);
void nr_ue_dlsch_init(NR_UE_DLSCH_t *dlsch_list, int num_dlsch, uint8_t max_ldpc_iterations);
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,
uint16_t N_RB_UL,
......@@ -478,8 +466,7 @@ int32_t nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode);
uint16_t nb_rb);
/**
\brief This function generates log-likelihood ratios (decoder input) for single-stream 16QAM received waveforms
......@@ -502,8 +489,7 @@ void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode);
uint16_t nb_rb);
/**
\brief This function generates log-likelihood ratios (decoder input) for single-stream 16QAM received waveforms
@param frame_parms Frame descriptor structure
......@@ -526,8 +512,7 @@ void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode);
uint16_t nb_rb);
void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t *rxdataF_comp,
......@@ -538,8 +523,7 @@ void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode);
uint16_t nb_rb);
/** \fn dlsch_extract_rbs(int32_t **rxdataF,
......@@ -683,7 +667,6 @@ void nr_dlsch_scale_channel(int32_t **dl_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t n_tx,
uint8_t n_rx,
NR_UE_DLSCH_t **dlsch_ue,
uint8_t symbol,
uint8_t start_symbol,
uint32_t len,
......@@ -718,8 +701,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_slot_rx,
uint8_t harq_pid,
uint8_t is_crnti);
uint8_t harq_pid);
int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
NR_UE_ULSCH_t *ulsch,
......@@ -800,13 +782,13 @@ int nr_rx_pbch(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
uint8_t i_ssb,
MIMO_mode_t mimo_mode,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
nr_phy_data_t *phy_data,
fapiPbch_t* result);
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
NR_UE_PDCCH_CONFIG *phy_pdcch_config);
nr_phy_data_t *phy_data);
#ifndef modOrder
......@@ -865,8 +847,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int16_t *pdcch_e_rx,
fapi_nr_dci_indication_t *dci_ind,
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15,
NR_UE_PDCCH_CONFIG *phy_pdcch_config);
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15);
/** \brief This function is the top-level entry point to PDSCH demodulation, after frequency-domain transformation and channel estimation. It performs
......@@ -884,21 +865,17 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
@param nr_slot_rx Slot number
@param symbol Symbol on which to act (within sub-frame)
@param first_symbol_flag set to 1 on first DLSCH symbol
@param rx_type. rx_type=RX_IC_single_stream will enable interference cancellation of a second stream when decoding the first stream. In case of TM1, 2, 5, and this can cancel interference from a neighbouring cell given by eNB_id_i. In case of TM5, eNB_id_i should be set to n_connected_eNB to perform multi-user interference cancellation. In case of TM3, eNB_id_i should be set to eNB_id to perform co-channel interference cancellation; this option should be used together with an interference cancellation step [...]. In case of TM3, if rx_type=RX_IC_dual_stream, both streams will be decoded by applying the IC single stream receiver twice.
@param i_mod Modulation order of the interfering stream
*/
int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
PDSCH_t type,
unsigned char eNB_id,
unsigned char eNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_slot_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
RX_type_t rx_type,
unsigned char i_mod,
unsigned char harq_pid);
UE_nr_rxtx_proc_t *proc,
NR_UE_DLSCH_t *dlsch,
unsigned char gNB_id,
unsigned char gNB_id_i, //if this == ue->n_connected_eNB, we assume MU interference
uint32_t frame,
uint8_t nr_slot_rx,
unsigned char symbol,
unsigned char first_symbol_flag,
unsigned char harq_pid);
int32_t generate_nr_prach(PHY_VARS_NR_UE *ue, uint8_t gNB_id, int frame, uint8_t slot);
......
......@@ -183,16 +183,6 @@ typedef struct {
int16_t **d;
/// Index of current HARQ round for this DLSCH
uint8_t DLround;
/// MCS table for this DLSCH
uint8_t mcs_table;
/// MCS format for this DLSCH
uint8_t mcs;
/// Qm (modulation order) for this DLSCH
uint8_t Qm;
/// target code rate R x 1024
uint16_t R;
/// Redundancy-version of the current sub-frame
uint8_t rvidx;
/// MIMO mode for this DLSCH
MIMO_nrmode_t mimo_mode;
/// Number of code segments
......@@ -203,32 +193,10 @@ typedef struct {
uint32_t F;
/// LDPC lifting factor
uint32_t Z;
/// Number of MIMO layers (streams)
uint8_t Nl;
/// current delta_pucch
int8_t delta_PUCCH;
/// Number of soft channel bits
uint32_t G;
/// Start PRB of BWP
uint16_t BWPStart;
/// Number of PRBs in BWP
uint16_t BWPSize;
/// Current Number of RBs
uint16_t nb_rb;
/// Starting RB number
uint16_t start_rb;
/// Number of Symbols
uint16_t nb_symbols;
/// DMRS symbol positions
uint16_t dlDmrsSymbPos;
/// DMRS Configuration Type
uint8_t dmrsConfigType;
// Number of DMRS CDM groups with no data
uint8_t n_dmrs_cdm_groups;
/// DMRS ports bitmap
uint16_t dmrs_ports;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
uint16_t pmi_alloc;
/// Current RB allocation (even slots)
......@@ -243,22 +211,6 @@ typedef struct {
uint8_t codeword;
/// HARQ-ACKs
uint8_t ack;
/// PTRS Frequency Density
uint8_t PTRSFreqDensity;
/// PTRS Time Density
uint8_t PTRSTimeDensity;
uint8_t PTRSPortIndex ;
uint8_t nEpreRatioOfPDSCHToPTRS;
uint8_t PTRSReOffset;
/// bit mask of PT-RS ofdm symbol indicies
uint16_t ptrs_symbols;
// PTRS symbol index, to be updated every PTRS symbol within a slot.
uint8_t ptrs_symbol_index;
uint32_t tbslbrm;
uint8_t nscid;
uint16_t dlDmrsScramblingId;
/// PDU BITMAP
uint16_t pduBitmap;
/// Last index of LLR buffer that contains information.
/// Used for computing LDPC decoder R
int llrLen;
......@@ -270,17 +222,13 @@ typedef struct {
/// RNTI type
uint8_t rnti_type;
/// Active flag for DLSCH demodulation
uint8_t active;
/// accumulated tx power adjustment for PUCCH
int8_t g_pucch;
bool active;
/// Transmission mode
uint8_t mode1_flag;
/// amplitude of PDSCH (compared to RS) in symbols without pilots
int16_t sqrt_rho_a;
/// amplitude of PDSCH (compared to RS) in symbols containing pilots
int16_t sqrt_rho_b;
/// Current HARQ process id threadRx Odd and threadRx Even
uint8_t current_harq_pid;
/// Current subband antenna selection
uint32_t antenna_alloc;
/// Current subband RI allocation
......@@ -291,24 +239,22 @@ typedef struct {
uint32_t cqi_alloc2;
/// saved subband PMI allocation from last PUSCH/PUCCH report
uint16_t pmi_alloc;
/// Pointers to up to HARQ processes
NR_DL_UE_HARQ_t *harq_processes[NR_MAX_DLSCH_HARQ_PROCESSES];
// DL number of harq processes
uint8_t number_harq_processes_for_pdsch;
/// Structure to hold dlsch config from MAC
fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config;
/* higher layer parameter for reception of two transport blocks TS 38.213 9.1.3.1 Type-2 HARQ-ACK codebook dtermination */
uint8_t Number_MCS_HARQ_DL_DCI;
/* spatial bundling of PUCCH */
uint8_t HARQ_ACK_spatial_bundling_PUCCH;
/// Maximum number of HARQ processes(for definition see 36-212 V8.6 2009-03, p.17
uint8_t Mdlharq;
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
uint8_t Kmimo;
/// Nsoft parameter related to UE Category
uint32_t Nsoft;
/// Number of MIMO layers (streams)
uint8_t Nl;
/// Maximum number of LDPC iterations
uint8_t max_ldpc_iterations;
/// number of iterations used in last turbo decoding
uint8_t last_iteration_cnt;
/// bit mask of PT-RS ofdm symbol indicies
uint16_t ptrs_symbols;
// PTRS symbol index, to be updated every PTRS symbol within a slot.
uint8_t ptrs_symbol_index;
} NR_UE_DLSCH_t;
typedef enum {format0_0,
......
......@@ -239,7 +239,6 @@ typedef struct {
uint32_t slot;
/// Index of current HARQ round for this DLSCH
uint8_t round;
uint8_t ndi;
bool new_rx;
/// Last TPC command
uint8_t TPC;
......
......@@ -538,14 +538,10 @@ typedef struct {
NR_UE_CSI_IM *csiim_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_CSI_RS *csirs_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_SRS *srs_vars[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch[NUMBER_OF_CONNECTED_gNB_MAX][NR_MAX_NB_LAYERS>4 ? 2:1];
NR_UE_ULSCH_t *ulsch[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch_SI[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch_ra[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch_p[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_DLSCH_t *dlsch_MCH[NUMBER_OF_CONNECTED_gNB_MAX];
NR_UE_PRS *prs_vars[NR_MAX_PRS_COMB_SIZE];
uint8_t prs_active_gNBs;
NR_DL_UE_HARQ_t dl_harq_processes[NR_MAX_NB_LAYERS>4 ? 2:1][NR_MAX_DLSCH_HARQ_PROCESSES];
//Paging parameters
uint32_t IMSImod1024;
......@@ -760,6 +756,8 @@ typedef struct {
typedef struct nr_phy_data_s {
NR_UE_PUCCH pucch_vars;
NR_UE_PDCCH_CONFIG phy_pdcch_config;
NR_UE_DLSCH_t dlsch[NR_MAX_NB_LAYERS>4 ? 2:1];
} nr_phy_data_t;
/* this structure is used to pass both UE phy vars and
* proc to the function UE_thread_rxn_txnp4
......
......@@ -96,7 +96,7 @@ typedef struct {
@param proc Pointer to RXn-TXnp4 proc information
@param eNB_id Local id of eNB on which to act
*/
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id);
void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id);
/*! \brief Scheduling for UE RX procedures in normal subframes.
@param ue Pointer to UE variables on which to act
......@@ -109,10 +109,10 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t gNB_id,
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
nr_phy_data_t *phy_data,
notifiedFIFO_t *txFifo);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t eNB_id, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
int phy_procedures_slot_parallelization_nrUE_RX(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id, uint8_t abstraction_flag, uint8_t do_pdcch_flag, relaying_type_t r_type);
void processSlotTX(void *arg);
......@@ -176,22 +176,20 @@ void nr_fill_rx_indication(fapi_nr_rx_indication_t *rx_ind,
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int gNB_id,
PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int *dlsch_errors);
NR_UE_DLSCH_t *dlsch1);
int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id, PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1);
int gNB_id,
NR_UE_DLSCH_t *dlsch);
int nr_ue_pdcch_procedures(uint8_t gNB_id,
PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
nr_phy_data_t *phy_data,
int n_ss);
int nr_ue_csi_im_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, uint8_t gNB_id);
......
......@@ -289,61 +289,32 @@ int8_t nr_ue_scheduled_response_stub(nr_scheduled_response_t *scheduled_response
void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
NR_DL_UE_HARQ_t *harq_list,
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu,
module_id_t module_id,
int rnti) {
const uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->current_harq_pid = current_harq_pid;
dlsch0->active = 1;
dlsch0->active = true;
dlsch0->rnti = rnti;
LOG_D(PHY,"current_harq_pid = %d\n", current_harq_pid);
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
AssertFatal(dlsch0_harq, "no harq_process for HARQ PID %d\n", current_harq_pid);
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
dlsch0_harq->BWPSize = dlsch_config_pdu->BWPSize;
dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq->start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq->nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq->dlDmrsSymbPos = dlsch_config_pdu->dlDmrsSymbPos;
dlsch0_harq->dmrsConfigType = dlsch_config_pdu->dmrsConfigType;
dlsch0_harq->n_dmrs_cdm_groups = dlsch_config_pdu->n_dmrs_cdm_groups;
dlsch0_harq->dmrs_ports = dlsch_config_pdu->dmrs_ports;
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->R = dlsch_config_pdu->targetCodeRate;
dlsch0_harq->Qm = dlsch_config_pdu->qamModOrder;
dlsch0_harq->TBS = dlsch_config_pdu->TBS;
dlsch0_harq->tbslbrm = dlsch_config_pdu->tbslbrm;
dlsch0_harq->nscid = dlsch_config_pdu->nscid;
dlsch0_harq->dlDmrsScramblingId = dlsch_config_pdu->dlDmrsScramblingId;
NR_DL_UE_HARQ_t *dlsch0_harq = &harq_list[current_harq_pid];
//get nrOfLayers from DCI info
uint8_t Nl = 0;
for (int i = 0; i < 12; i++) { // max 12 ports
if ((dlsch_config_pdu->dmrs_ports>>i)&0x01) Nl += 1;
}
dlsch0_harq->Nl = Nl;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch_config_pdu->rv, dlsch0->rnti_type);
dlsch0->Nl = Nl;
downlink_harq_process(dlsch0_harq, current_harq_pid, dlsch_config_pdu->ndi, dlsch_config_pdu->rv, dlsch0->rnti_type);
if (dlsch0_harq->status != ACTIVE) {
// dlsch0_harq->status not ACTIVE due to false retransmission
// Reset the following flag to skip PDSCH procedures in that case and retrasmit harq status
dlsch0->active = 0;
update_harq_status(module_id,dlsch0->current_harq_pid,dlsch0_harq->ack);
dlsch0->active = false;
update_harq_status(module_id, current_harq_pid, dlsch0_harq->ack);
}
/* PTRS */
dlsch0_harq->PTRSFreqDensity = dlsch_config_pdu->PTRSFreqDensity;
dlsch0_harq->PTRSTimeDensity = dlsch_config_pdu->PTRSTimeDensity;
dlsch0_harq->PTRSPortIndex = dlsch_config_pdu->PTRSPortIndex;
dlsch0_harq->nEpreRatioOfPDSCHToPTRS = dlsch_config_pdu->nEpreRatioOfPDSCHToPTRS;
dlsch0_harq->PTRSReOffset = dlsch_config_pdu->PTRSReOffset;
dlsch0_harq->pduBitmap = dlsch_config_pdu->pduBitmap;
LOG_D(MAC, ">>>> \tdlsch0->g_pucch = %d\tdlsch0_harq.mcs = %d\n", dlsch0->g_pucch, dlsch0_harq->mcs);
}
......@@ -357,7 +328,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely.
NR_UE_DLSCH_t *dlsch0 = NULL;
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
NR_UE_ULSCH_t *ulsch = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
NR_UE_PUCCH *pucch_vars = &((nr_phy_data_t *)scheduled_response->phy_data)->pucch_vars;
NR_UE_CSI_IM *csiim_vars = PHY_vars_UE_g[module_id][cc_id]->csiim_vars[0];
......@@ -380,7 +351,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
switch(dl_config->dl_config_list[i].pdu_type) {
case FAPI_NR_DL_CONFIG_TYPE_DCI:
if (NULL == phy_pdcch_config) {
phy_pdcch_config = (NR_UE_PDCCH_CONFIG *)scheduled_response->phy_data;
phy_pdcch_config = &((nr_phy_data_t *)scheduled_response->phy_data)->phy_pdcch_config;
phy_pdcch_config->nb_search_space = 0;
}
pdcch_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
......@@ -402,24 +373,23 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
break;
case FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH:
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_ra[0];
dlsch0->rnti_type = _RA_RNTI_;
dlsch0->harq_processes[dlsch_config_pdu->harq_process_nbr]->status = ACTIVE;
configure_dlsch(dlsch0, dlsch_config_pdu, module_id,
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
break;
case FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH:
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0];
dlsch0->rnti_type = _SI_RNTI_;
dlsch0->harq_processes[dlsch_config_pdu->harq_process_nbr]->status = ACTIVE;
configure_dlsch(dlsch0, dlsch_config_pdu, module_id,
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
break;
case FAPI_NR_DL_CONFIG_TYPE_DLSCH:
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[0][0];
configure_dlsch(dlsch0, dlsch_config_pdu, module_id,
dlsch0->rnti_type = _C_RNTI_;
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
break;
}
......
This diff is collapsed.
......@@ -106,8 +106,6 @@ int main(int argc, char **argv)
int frame_length_complex_samples;
//int frame_length_complex_samples_no_prefix;
NR_DL_FRAME_PARMS *frame_parms;
uint8_t Kmimo = 0;
uint32_t Nsoft = 0;
double sigma;
unsigned char qbits = 8;
int ret;
......@@ -403,24 +401,19 @@ int main(int argc, char **argv)
//nr_init_frame_parms_ue(&UE->frame_parms);
//init_nr_ue_transport(UE, 0);
int num_codeword = NR_MAX_NB_LAYERS > 4? 2:1;
for (i = 0; i < num_codeword; i++) {
UE->dlsch[0][i] = new_nr_ue_dlsch(Kmimo, 8, Nsoft, 5, N_RB_DL);
if (!UE->dlsch[0][i]) {
printf("Can't get ue dlsch structures\n");
exit(-1);
}
UE->dlsch[0][i]->rnti = n_rnti;
}
NR_UE_DLSCH_t dlsch_ue[NR_MAX_NB_LAYERS > 4? 2:1] = {0};
int num_codeword = NR_MAX_NB_LAYERS > 4? 2:1;
nr_ue_dlsch_init(dlsch_ue, num_codeword, 5);
for (int i=0; i < num_codeword; i++)
dlsch_ue[0].rnti = n_rnti;
nr_init_harq_processes(UE->dl_harq_processes[0], 8, nb_rb);
unsigned char harq_pid = 0; //dlsch->harq_ids[subframe];
processingData_L1tx_t msgDataTx;
init_DLSCH_struct(gNB, &msgDataTx);
processingData_L1tx_t msgDataTx;
init_DLSCH_struct(gNB, &msgDataTx);
NR_gNB_DLSCH_t *dlsch = msgDataTx.dlsch[0][0];
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_process.pdsch_pdu.pdsch_pdu_rel15;
//time_stats_t *rm_stats, *te_stats, *i_stats;
uint8_t is_crnti = 0;
unsigned int TBS = 8424;
uint8_t nb_re_dmrs = 6; // No data in dmrs symbol
uint16_t length_dmrs = 1;
......@@ -432,7 +425,7 @@ int main(int argc, char **argv)
//printf("dlschsim harqid %d nb_rb %d, mscs %d\n",dlsch->harq_ids[subframe],
// dlsch->harq_processes[0]->nb_rb,dlsch->harq_processes[0]->mcs,dlsch->harq_processes[0]->Nl);
unsigned char mod_order = nr_get_Qm_dl(Imcs, mcs_table);
uint16_t rate = nr_get_code_rate_dl(Imcs, mcs_table);
uint16_t rate = nr_get_code_rate_dl(Imcs, mcs_table);
unsigned int available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
TBS = nr_compute_tbs(mod_order,rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, Nl);
printf("available bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order);
......@@ -442,14 +435,14 @@ int main(int argc, char **argv)
rel15->qamModOrder[0] = mod_order;
rel15->nrOfLayers = Nl;
rel15->TBSize[0] = TBS>>3;
rel15->targetCodeRate[0] = rate;
rel15->NrOfCodewords = 1;
rel15->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
rel15->targetCodeRate[0] = rate;
rel15->NrOfCodewords = 1;
rel15->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
rel15->dlDmrsSymbPos = 4;
rel15->mcsIndex[0] = Imcs;
rel15->numDmrsCdmGrpsNoData = 1;
rel15->maintenance_parms_v3.tbSizeLbrmBytes = Tbslbrm;
rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS, rate);
rel15->numDmrsCdmGrpsNoData = 1;
rel15->maintenance_parms_v3.tbSizeLbrmBytes = Tbslbrm;
rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS, rate);
double modulated_input[16 * 68 * 384]; // [hna] 16 segments, 68*Zc
short channel_output_fixed[16 * 68 * 384];
//unsigned char *estimated_output;
......@@ -457,21 +450,22 @@ int main(int argc, char **argv)
unsigned char test_input_bit[16 * 68 * 384];
//estimated_output = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
unsigned char estimated_output_bit[16 * 68 * 384];
NR_UE_DLSCH_t *dlsch0_ue = UE->dlsch[0][0];
NR_DL_UE_HARQ_t *harq_process = dlsch0_ue->harq_processes[harq_pid];
harq_process->mcs = Imcs;
harq_process->mcs_table = mcs_table;
harq_process->Nl = Nl;
harq_process->nb_rb = nb_rb;
harq_process->Qm = mod_order;
harq_process->rvidx = rvidx;
harq_process->R = rate;
harq_process->TBS = TBS;
harq_process->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
harq_process->dlDmrsSymbPos = 4;
harq_process->n_dmrs_cdm_groups = 1;
harq_process->tbslbrm = Tbslbrm;
printf("harq process ue mcs = %d Qm = %d, symb %d\n", harq_process->mcs, harq_process->Qm, nb_symb_sch);
NR_UE_DLSCH_t *dlsch0_ue = &dlsch_ue[0];
NR_DL_UE_HARQ_t *harq_process = &UE->dl_harq_processes[0][harq_pid];
harq_process->first_rx = 1;
dlsch0_ue->dlsch_config.mcs = Imcs;
dlsch0_ue->dlsch_config.mcs_table = mcs_table;
dlsch0_ue->Nl = Nl;
dlsch0_ue->dlsch_config.number_rbs = nb_rb;
dlsch0_ue->dlsch_config.qamModOrder = mod_order;
dlsch0_ue->dlsch_config.rv = rvidx;
dlsch0_ue->dlsch_config.targetCodeRate = rate;
dlsch0_ue->dlsch_config.TBS = TBS;
dlsch0_ue->dlsch_config.dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
dlsch0_ue->dlsch_config.dlDmrsSymbPos = 4;
dlsch0_ue->dlsch_config.n_dmrs_cdm_groups = 1;
dlsch0_ue->dlsch_config.tbslbrm = Tbslbrm;
printf("harq process ue mcs = %d Qm = %d, symb %d\n", dlsch0_ue->dlsch_config.mcs, dlsch0_ue->dlsch_config.qamModOrder, nb_symb_sch);
unsigned char *test_input=dlsch->harq_process.pdu;
//unsigned char test_input[TBS / 8] __attribute__ ((aligned(16)));
......@@ -539,8 +533,8 @@ int main(int argc, char **argv)
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_IN);
ret = nr_dlsch_decoding(UE, &proc, 0, channel_output_fixed, &UE->frame_parms,
dlsch0_ue, dlsch0_ue->harq_processes[0], frame, nb_symb_sch,
slot,harq_pid, is_crnti);
dlsch0_ue, harq_process, frame, nb_symb_sch,
slot,harq_pid);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_DECODING0, VCD_FUNCTION_OUT);
......@@ -551,7 +545,7 @@ int main(int argc, char **argv)
errors_bit = 0;
for (i = 0; i < TBS; i++) {
estimated_output_bit[i] = (dlsch0_ue->harq_processes[0]->b[i / 8] & (1 << (i & 7))) >> (i & 7);
estimated_output_bit[i] = (harq_process->b[i / 8] & (1 << (i & 7))) >> (i & 7);
test_input_bit[i] = (test_input[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
if (estimated_output_bit[i] != test_input_bit[i]) {
......@@ -620,7 +614,7 @@ int main(int argc, char **argv)
int num_cw = NR_MAX_NB_LAYERS > 4? 2:1;
for (int i = 0; i < num_cw; i++)
free_nr_ue_dlsch(&UE->dlsch[0][i], N_RB_DL);
free_nr_ue_dl_harq(UE->dl_harq_processes[i], 8, nb_rb);
term_nr_ue_signal(UE, 1);
free(UE);
......
This diff is collapsed.
......@@ -86,25 +86,23 @@ int nr_ue_pdcch_procedures(uint8_t gNB_id,
UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size,
int32_t pdcch_dl_ch_estimates[][pdcch_est_size],
NR_UE_PDCCH_CONFIG *phy_pdcch_config,
nr_phy_data_t *phy_data,
int n_ss) {
return 0;
}
int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int eNB_id, PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0, NR_UE_DLSCH_t *dlsch1) {
int eNB_id,
NR_UE_DLSCH_t *dlsch) {
return 0;
}
bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int gNB_id,
PDSCH_t pdsch,
NR_UE_DLSCH_t *dlsch0,
NR_UE_DLSCH_t *dlsch1,
int *dlsch_errors) {
NR_UE_DLSCH_t *dlsch1) {
return false;
}
......@@ -746,7 +744,7 @@ int main(int argc, char **argv)
}
else {
UE_nr_rxtx_proc_t proc={0};
NR_UE_PDCCH_CONFIG phy_pdcch_config={0};
nr_phy_data_t phy_data={0};
UE->rx_offset=0;
uint8_t ssb_index = 0;
......@@ -776,7 +774,7 @@ int main(int argc, char **argv)
0,
ssb_index%8,
SISO,
&phy_pdcch_config,
&phy_data,
&result);
if (ret==0) {
......
This diff is collapsed.
......@@ -833,6 +833,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
NULL,
ra->Msg3_tda_id,
ra->msg3_TPC,
1, // Not toggling NDI in msg3 retransmissions
&ra->UL_BWP);
fill_dci_pdu_rel15(scc,
......@@ -1036,7 +1037,7 @@ void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
//Optional Data only included if indicated in pduBitmap
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[round%4];
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = 1;
pusch_pdu->pusch_data.new_data_indicator = (round == 0) ? 1 : 0;;
pusch_pdu->pusch_data.num_cb = 0;
int num_dmrs_symb = 0;
for(int i = start_symbol_index; i < start_symbol_index+nr_of_symbols; i++)
......@@ -1787,8 +1788,16 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
harq->round = 0;
harq->ndi ^= 1;
sched_ctrl->rrc_processing_timer = 1; // No need to wait at this point in time, setting it to 1 just to enter in function nr_mac_update_timers
LOG_I(NR_MAC, "(%d.%d) Activating RRC processing timer for UE %04x with %d ms\n", frameP, slotP, UE->rnti, 1);
if(!UE->CellGroup)
// In the specific scenario where UE correctly received MSG4 (assuming it decoded RRCsetup with CellGroup) and gNB didn't correctly received an ACK,
// the UE would already have CG but the UE-dedicated gNB structure wouldn't (because RA didn't complete on gNB side).
uper_decode(NULL,
&asn_DEF_NR_CellGroupConfig, //might be added prefix later
(void **)&UE->CellGroup,
(uint8_t *)UE->cg_buf,
(UE->enc_rval.encoded+7)/8, 0, 0);
process_CellGroup(UE->CellGroup, sched_ctrl);
configure_UE_BWP(nr_mac, scc, sched_ctrl, NULL, UE);
// Reset uplink failure flags/counters/timers at MAC so gNB will resume again scheduling resources for this UE
UE->UE_sched_ctrl.pusch_consecutive_dtx_cnt = 0;
......
......@@ -885,6 +885,7 @@ void config_uldci(const NR_SIB1_t *sib1,
nr_srs_feedback_t *srs_feedback,
int time_domain_assignment,
uint8_t tpc,
uint8_t ndi,
NR_UE_UL_BWP_t *ul_bwp) {
int bwp_id = ul_bwp->bwp_id;
......@@ -895,7 +896,7 @@ void config_uldci(const NR_SIB1_t *sib1,
dci_pdu_rel15->time_domain_assignment.val = time_domain_assignment;
dci_pdu_rel15->frequency_hopping_flag.val = pusch_pdu->frequency_hopping;
dci_pdu_rel15->mcs = pusch_pdu->mcs_index;
dci_pdu_rel15->ndi = pusch_pdu->pusch_data.new_data_indicator;
dci_pdu_rel15->ndi = ndi;
dci_pdu_rel15->rv = pusch_pdu->pusch_data.rv_index;
dci_pdu_rel15->harq_pid = pusch_pdu->pusch_data.harq_process_id;
dci_pdu_rel15->tpc = tpc;
......@@ -2245,6 +2246,8 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
else {
DL_BWP = &UE->current_DL_BWP;
UL_BWP = &UE->current_UL_BWP;
sched_ctrl->next_dl_bwp_id = -1;
sched_ctrl->next_ul_bwp_id = -1;
CellGroup = UE->CellGroup;
}
NR_BWP_Downlink_t *dl_bwp = NULL;
......@@ -2273,6 +2276,14 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
DL_BWP->bwp_id = 0;
UL_BWP->bwp_id = 0;
UE->Msg3_dcch_dtch = false;
// Schedule BWP switching to the first active BWP (previous active BWP before RA with Msg3 carrying DCCH or DTCH message)
if (servingCellConfig->firstActiveDownlinkBWP_Id) {
sched_ctrl->next_dl_bwp_id = *servingCellConfig->firstActiveDownlinkBWP_Id;
}
if (servingCellConfig->uplinkConfig->firstActiveUplinkBWP_Id) {
sched_ctrl->next_ul_bwp_id = *servingCellConfig->uplinkConfig->firstActiveUplinkBWP_Id;
}
}
else {
// (re)configuring BWP
......@@ -2326,7 +2337,7 @@ void configure_UE_BWP(gNB_MAC_INST *nr_mac,
}
else {
DL_BWP->bwp_id = 0;
DL_BWP->bwp_id = 0;
UL_BWP->bwp_id = 0;
target_ss = NR_SearchSpace__searchSpaceType_PR_common;
DL_BWP->pdsch_Config = NULL;
UL_BWP->pusch_Config = NULL;
......
......@@ -66,8 +66,8 @@ int compute_ph_factor(int mu,
int delta_tf = 0;
if(deltaMCS != NULL && n_layers == 1) {
const int n_re = (NR_NB_SC_PER_RB * n_symbols - n_dmrs) * rb;
const int BPRE = tbs_bits/n_re; //TODO change for PUSCH with CSI
const float f = pow(2, (float) BPRE * 1.25);
const float BPRE = (float) tbs_bits/n_re; //TODO change for PUSCH with CSI
const float f = pow(2, BPRE * 1.25);
const float beta = 1.0f; //TODO change for PUSCH with CSI
delta_tf = (10 * log10((f - 1) * beta));
}
......@@ -2171,7 +2171,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing nr_rv_round_map[%d] is out of bounds\n", cur_harq->round%4);
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round%4];
pusch_pdu->pusch_data.harq_process_id = harq_id;
pusch_pdu->pusch_data.new_data_indicator = cur_harq->ndi;
pusch_pdu->pusch_data.new_data_indicator = (cur_harq->round == 0) ? 1 : 0; // not NDI but indicator for new transmission
pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size;
pusch_pdu->pusch_data.num_cb = 0; //CBG not supported
......@@ -2275,6 +2275,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
&sched_ctrl->srs_feedback,
sched_pusch->time_domain_allocation,
UE->UE_sched_ctrl.tpc0,
cur_harq->ndi,
current_BWP);
fill_dci_pdu_rel15(scc,
......
......@@ -192,6 +192,7 @@ void config_uldci(const NR_SIB1_t *sib1,
nr_srs_feedback_t *srs_feedback,
int time_domain_assignment,
uint8_t tpc,
uint8_t ndi,
NR_UE_UL_BWP_t *ul_bwp);
void nr_schedule_pucch(gNB_MAC_INST *nrmac,
......
......@@ -1131,21 +1131,19 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_ConfigurationCommon = mac->scc != NULL ? mac->scc->tdd_UL_DL_ConfigurationCommon : mac->scc_SIB->tdd_UL_DL_ConfigurationCommon;
LOG_T(NR_MAC, "In %s():%d not calling scheduler. sched mode = %d and mac->ra.ra_state = %d\n",
__FUNCTION__, __LINE__, ul_info->ue_sched_mode, mac->ra.ra_state);
switch (ul_info->ue_sched_mode) {
case SCHED_PUSCH:
ret = nr_ue_scheduler(NULL, ul_info);
if (is_nr_UL_slot(tdd_UL_DL_ConfigurationCommon, ul_info->slot_tx, mac->frame_type) && !get_softmodem_params()->phy_test)
nr_ue_prach_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx);
LOG_T(NR_MAC, "In %s():%d not calling scheduler. sched mode = %d and mac->ra.ra_state = %d\n",
__FUNCTION__, __LINE__, ul_info->ue_sched_mode, mac->ra.ra_state);
break;
case SCHED_PUCCH:
if (is_nr_UL_slot(tdd_UL_DL_ConfigurationCommon, ul_info->slot_tx, mac->frame_type))
nr_ue_pucch_scheduler(module_id, ul_info->frame_tx, ul_info->slot_tx, ul_info->phy_data);
LOG_T(NR_MAC, "In %s():%d not calling scheduler. sched mode = %d and mac->ra.ra_state = %d\n",
__FUNCTION__, __LINE__, ul_info->ue_sched_mode, mac->ra.ra_state);
break;
}
......@@ -1241,7 +1239,6 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.ack_nack,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_SIB;
free((dl_info->rx_ind->rx_indication_body+i)->pdsch_pdu.pdu);
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
ret_mask |= (handle_dlsch(dl_info, ul_time_alignment, i)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
......
This diff is collapsed.
......@@ -69,21 +69,6 @@ uint16_t do_SIB1_NR(rrc_gNB_carrier_data_t *carrier, gNB_RrcConfigurationReq *co
uint8_t do_SIB23_NR(rrc_gNB_carrier_data_t *carrier,
gNB_RrcConfigurationReq *configuration);
void do_RLC_BEARER(uint8_t Mod_id,
int CC_id,
struct NR_CellGroupConfig__rlc_BearerToAddModList *rlc_BearerToAddModList,
rlc_bearer_config_t *rlc_config);
void do_MAC_CELLGROUP(uint8_t Mod_id,
int CC_id,
NR_MAC_CellGroupConfig_t *mac_CellGroupConfig,
mac_cellgroup_t *mac_cellgroup_config);
void do_PHYSICALCELLGROUP(uint8_t Mod_id,
int CC_id,
NR_PhysicalCellGroupConfig_t *physicalCellGroupConfig,
physicalcellgroup_t *physicalcellgroup_config);
void do_SpCellConfig(gNB_RRC_INST *rrc,
struct NR_SpCellConfig *spconfig);
......@@ -207,4 +192,6 @@ do_RRCReestablishmentComplete(
uint8_t *buffer, size_t buffer_size,
int64_t rrc_TransactionIdentifier);
NR_MeasConfig_t *get_defaultMeasConfig(const gNB_RrcConfigurationReq *conf);
#endif /* __RRC_NR_MESSAGES_ASN1_MSG__H__ */
......@@ -941,6 +941,51 @@ struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Confi
return setup_puschconfig;
}
struct NR_SetupRelease_PDSCH_Config *config_pdsch(uint64_t ssb_bitmap, int bwp_Id, int dl_antenna_ports)
{
struct NR_SetupRelease_PDSCH_Config *setup_pdsch_Config = calloc(1,sizeof(*setup_pdsch_Config));
setup_pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup;
NR_PDSCH_Config_t *pdsch_Config = calloc(1, sizeof(*pdsch_Config));
setup_pdsch_Config->choice.setup = pdsch_Config;
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1, sizeof(*pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA));
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present = NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1, sizeof(*pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
NR_DMRS_DownlinkConfig_t *dmrs_DownlinkForPDSCH_MappingTypeA = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
if ((get_softmodem_params()->do_ra || get_softmodem_params()->phy_test) && dl_antenna_ports > 1) // for MIMO, we use DMRS Config Type 2 but only with OAI UE
dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_Type = calloc(1, sizeof(*dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_Type));
else
dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_Type = NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->maxLength = NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->scramblingID0 = NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->scramblingID1 = NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_AdditionalPosition = calloc(1, sizeof(*dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_AdditionalPosition));
// TODO possible improvement is to select based on some input additional position
*dmrs_DownlinkForPDSCH_MappingTypeA->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1;
pdsch_Config->dataScramblingIdentityPDSCH = NULL;
pdsch_Config->resourceAllocation = NR_PDSCH_Config__resourceAllocation_resourceAllocationType1;
pdsch_Config->prb_BundlingType.present = NR_PDSCH_Config__prb_BundlingType_PR_staticBundling;
pdsch_Config->prb_BundlingType.choice.staticBundling = calloc(1, sizeof(*pdsch_Config->prb_BundlingType.choice.staticBundling));
pdsch_Config->prb_BundlingType.choice.staticBundling->bundleSize = calloc(1, sizeof(*pdsch_Config->prb_BundlingType.choice.staticBundling->bundleSize));
*pdsch_Config->prb_BundlingType.choice.staticBundling->bundleSize = NR_PDSCH_Config__prb_BundlingType__staticBundling__bundleSize_wideband;
int n_ssb = 0;
for (int i = 0; i < 64; i++) {
if (((ssb_bitmap >> (63 - i)) & 0x01) == 0)
continue;
NR_TCI_State_t *tcid = calloc(1, sizeof(*tcid));
tcid->tci_StateId = n_ssb++;
tcid->qcl_Type1.cell = NULL;
asn1cCallocOne(tcid->qcl_Type1.bwp_Id, bwp_Id);
tcid->qcl_Type1.referenceSignal.present = NR_QCL_Info__referenceSignal_PR_ssb;
tcid->qcl_Type1.referenceSignal.choice.ssb = i;
tcid->qcl_Type1.qcl_Type = NR_QCL_Info__qcl_Type_typeC;
ASN_SEQUENCE_ADD(&pdsch_Config->tci_StatesToAddModList->list, tcid);
}
return setup_pdsch_Config;
}
void config_downlinkBWP(NR_BWP_Downlink_t *bwp,
const NR_ServingCellConfigCommon_t *scc,
const NR_ServingCellConfig_t *servingcellconfigdedicated,
......@@ -1066,55 +1111,12 @@ void config_downlinkBWP(NR_BWP_Downlink_t *bwp,
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list, ss2);
bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToReleaseList = NULL;
bwp->bwp_Dedicated->pdsch_Config = config_pdsch(ssb_bitmap, bwp->bwp_Id, dl_antenna_ports);
struct NR_SetupRelease_PDSCH_Config *pdsch_Config = NULL;
pdsch_Config = calloc(1,sizeof(*pdsch_Config));
pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup;
pdsch_Config->choice.setup = calloc(1,sizeof(*pdsch_Config->choice.setup));
pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
struct NR_SetupRelease_DMRS_DownlinkConfig *dmrs_DownlinkForPDSCH_MappingTypeA = pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA;
if ((get_softmodem_params()->do_ra || get_softmodem_params()->phy_test) && dl_antenna_ports > 1) // for MIMO, we use DMRS Config Type 2 but only with OAI UE
dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=calloc(1,sizeof(*dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
else
dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL;
dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = calloc(1,sizeof(*dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition));
*dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1;
pdsch_Config->choice.setup->resourceAllocation = NR_PDSCH_Config__resourceAllocation_resourceAllocationType1;
pdsch_Config->choice.setup->prb_BundlingType.present = NR_PDSCH_Config__prb_BundlingType_PR_staticBundling;
pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling = calloc(1,sizeof(*pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling));
pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling->bundleSize = calloc(1,sizeof(*pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling->bundleSize));
*pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling->bundleSize = NR_PDSCH_Config__prb_BundlingType__staticBundling__bundleSize_wideband;
bwp->bwp_Dedicated->pdsch_Config = pdsch_Config;
set_dl_mcs_table(bwp->bwp_Common->genericParameters.subcarrierSpacing,
force_256qam_off ? NULL : uecap,
bwp->bwp_Dedicated,
scc);
int n_ssb = 0;
NR_TCI_State_t *tcid[64];
for (int i=0;i<64;i++) {
if ((ssb_bitmap>>(63-i))&0x01){
tcid[i]=calloc(1,sizeof(*tcid[i]));
tcid[i]->tci_StateId=n_ssb;
tcid[i]->qcl_Type1.cell=NULL;
tcid[i]->qcl_Type1.bwp_Id=calloc(1,sizeof(*tcid[i]->qcl_Type1.bwp_Id));
*tcid[i]->qcl_Type1.bwp_Id=bwp->bwp_Id;
tcid[i]->qcl_Type1.referenceSignal.present = NR_QCL_Info__referenceSignal_PR_ssb;
tcid[i]->qcl_Type1.referenceSignal.choice.ssb = i;
tcid[i]->qcl_Type1.qcl_Type=NR_QCL_Info__qcl_Type_typeC;
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdsch_Config->choice.setup->tci_StatesToAddModList->list,tcid[i]);
n_ssb++;
}
}
}
void config_uplinkBWP(NR_BWP_Uplink_t *ubwp,
......
......@@ -41,84 +41,6 @@
TyPe *lOcPtr= calloc(1,sizeof(TyPe)); \
ASN_SEQUENCE_ADD(&VaR,lOcPtr);
typedef struct rlc_bearer_config_s{
long LogicalChannelIdentity[MAX_NUM_CCs];
long servedRadioBearer_present[MAX_NUM_CCs];
long srb_Identity[MAX_NUM_CCs];
long drb_Identity[MAX_NUM_CCs];
long reestablishRLC[MAX_NUM_CCs];
long rlc_Config_present[MAX_NUM_CCs];
long ul_AM_sn_FieldLength[MAX_NUM_CCs];
long t_PollRetransmit[MAX_NUM_CCs];
long pollPDU[MAX_NUM_CCs];
long pollByte[MAX_NUM_CCs];
long maxRetxThreshold[MAX_NUM_CCs];
long dl_AM_sn_FieldLength[MAX_NUM_CCs];
long dl_AM_t_Reassembly[MAX_NUM_CCs];
long t_StatusProhibit[MAX_NUM_CCs];
long ul_UM_sn_FieldLength[MAX_NUM_CCs];
long dl_UM_sn_FieldLength[MAX_NUM_CCs];
long dl_UM_t_Reassembly[MAX_NUM_CCs];
long priority[MAX_NUM_CCs];
long prioritisedBitRate[MAX_NUM_CCs];
long bucketSizeDuration[MAX_NUM_CCs];
long allowedServingCells[MAX_NUM_CCs];
long subcarrierspacing[MAX_NUM_CCs];
long maxPUSCH_Duration[MAX_NUM_CCs];
long configuredGrantType1Allowed[MAX_NUM_CCs];
long logicalChannelGroup[MAX_NUM_CCs];
long schedulingRequestID[MAX_NUM_CCs]; /* OPTIONAL */
int logicalChannelSR_Mask[MAX_NUM_CCs];
int logicalChannelSR_DelayTimerApplied[MAX_NUM_CCs];
}rlc_bearer_config_t;
typedef struct mac_cellgroup_s{
long DRX_Config_PR[MAX_NUM_CCs];
long drx_onDurationTimer_PR[MAX_NUM_CCs];
long subMilliSeconds[MAX_NUM_CCs];
long milliSeconds[MAX_NUM_CCs];
long drx_InactivityTimer[MAX_NUM_CCs];
long drx_HARQ_RTT_TimerDL[MAX_NUM_CCs];
long drx_HARQ_RTT_TimerUL[MAX_NUM_CCs];
long drx_RetransmissionTimerDL[MAX_NUM_CCs];
long drx_RetransmissionTimerUL[MAX_NUM_CCs];
long drx_LongCycleStartOffset_PR[MAX_NUM_CCs];
long drx_LongCycleStartOffset[MAX_NUM_CCs];
long drx_ShortCycle[MAX_NUM_CCs];
long drx_ShortCycleTimer[MAX_NUM_CCs];
long drx_SlotOffset[MAX_NUM_CCs];
long schedulingRequestId[MAX_NUM_CCs];
long sr_ProhibitTimer[MAX_NUM_CCs];
long sr_TransMax[MAX_NUM_CCs];
long periodicBSR_Timer[MAX_NUM_CCs];
long retxBSR_Timer[MAX_NUM_CCs];
long logicalChannelSR_DelayTimer[MAX_NUM_CCs];
long tag_Id[MAX_NUM_CCs];
long timeAlignmentTimer[MAX_NUM_CCs];
long PHR_Config_PR[MAX_NUM_CCs];
long phr_PeriodicTimer[MAX_NUM_CCs];
long phr_ProhibitTimer[MAX_NUM_CCs];
long phr_Tx_PowerFactorChange[MAX_NUM_CCs];
int multiplePHR[MAX_NUM_CCs];
int phr_Type2SpCell[MAX_NUM_CCs];
int phr_Type2OtherCell[MAX_NUM_CCs];
long phr_ModeOtherCG[MAX_NUM_CCs];
int skipUplinkTxDynamic[MAX_NUM_CCs];
}mac_cellgroup_t;
typedef struct physicalcellgroup_s{
long harq_ACK_SpatialBundlingPUCCH[MAX_NUM_CCs];
long harq_ACK_SpatialBundlingPUSCH[MAX_NUM_CCs];
long p_NR[MAX_NUM_CCs];
long pdsch_HARQ_ACK_Codebook[MAX_NUM_CCs];
long tpc_SRS_RNTI[MAX_NUM_CCs];
long tpc_PUCCH_RNTI[MAX_NUM_CCs];
long tpc_PUSCH_RNTI[MAX_NUM_CCs];
long sp_CSI_RNTI[MAX_NUM_CCs];
long RNTI_Value_PR[MAX_NUM_CCs];
long RNTI_Value[MAX_NUM_CCs];
}physicalcellgroup_t;
void set_phr_config(NR_MAC_CellGroupConfig_t *mac_CellGroupConfig);
uint64_t get_ssb_bitmap(const NR_ServingCellConfigCommon_t *scc);
void rrc_coreset_config(NR_ControlResourceSet_t *coreset,
......@@ -152,6 +74,7 @@ void config_srs(NR_SetupRelease_SRS_Config_t *setup_release_srs_Config,
const int res_id,
const long maxMIMO_Layers,
const int do_srs);
struct NR_SetupRelease_PDSCH_Config *config_pdsch(uint64_t ssb_bitmap, int bwp_Id, int dl_antenna_ports);
void set_dl_mcs_table(int scs,
NR_UE_NR_Capability_t *cap,
NR_BWP_DownlinkDedicated_t *bwp_Dedicated,
......
This diff is collapsed.
This diff is collapsed.
......@@ -547,7 +547,8 @@ sin_port:
sin_addr:
{ s_addr: INADDR_ANY }
};
bind(t->listen_sock, (struct sockaddr *)&addr, sizeof(addr));
int rc = bind(t->listen_sock, (struct sockaddr *)&addr, sizeof(addr));
AssertFatal(rc == 0, "bind failed: errno %d, %s", errno, strerror(errno));
AssertFatal(listen(t->listen_sock, 5) == 0, "");
struct epoll_event ev= {0};
ev.events = EPOLLIN;
......
......@@ -181,7 +181,6 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
thread_pool_size = 8;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
......
......@@ -179,7 +179,6 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
thread_pool_size = 8;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
......
......@@ -235,7 +235,6 @@ L1s = (
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120;
thread_pool_size = 4;
# pucch0_dtx_threshold = 150;
}
);
......
......@@ -239,7 +239,6 @@ L1s = (
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120;
thread_pool_size = 8;
# pucch0_dtx_threshold = 150;
}
);
......
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