Commit 117824e2 authored by wujing's avatar wujing

support arm and YUNSDR in nrUE, tested in OAI RFSIM OK,and YUNSDR OK by using oai-gnb

parent c01f8cc5
......@@ -50,7 +50,7 @@ include_directories(${CRYPTO_INCLUDE_DIRS})
#uhd 4.0 and iris installs by default in /usr/local
include_directories("/usr/local/include/")
#use native cmake method as this package is not in pkg-config
add_list2_option(RF_BOARD "None" "RF head type" "None" "OAI_USRP" "OAI_BLADERF" "OAI_LMSSDR" "OAI_SIMU" "EXMIMO")
add_list2_option(RF_BOARD "None" "RF head type" "None" "OAI_USRP" "OAI_BLADERF" "OAI_LMSSDR" "OAI_SIMU" "EXMIMO" "OAI_YUNSDR")
if (${RF_BOARD} STREQUAL "OAI_USRP")
find_package(Boost REQUIRED)
include_directories(${LIBBOOST_INCLUDE_DIR})
......@@ -138,7 +138,15 @@ elseif(EXISTS "/usr/include/x86_64-linux-gnu/cblas.h")
list(APPEND ATLAS_LIBRARIES cblas)
list(APPEND ATLAS_LIBRARIES atlas)
list(APPEND ATLAS_LIBRARIES lapack)
elseif(EXISTS "/usr/include/aarch64-linux-gnu/cblas.h")
include_directories("/usr/include/aarch64-linux-gnu")
LINK_DIRECTORIES("/usr/lib/aarch64-linux-gnu")
list(APPEND ATLAS_LIBRARIES cblas)
list(APPEND ATLAS_LIBRARIES atlas)
list(APPEND ATLAS_LIBRARIES lapack)
else()
message("No Blas/Atlas libs found, some targets will fail")
endif()
......@@ -199,9 +207,9 @@ message("CMAKE_BUILD_TYPE is ${CMAKE_BUILD_TYPE}")
add_list_string_option(CMAKE_BUILD_TYPE "RelWithDebInfo" "Choose the type of build, options are: None(CMAKE_CXX_FLAGS or CMAKE_C_FLAGS used) Debug Release RelWithDebInfo MinSizeRel." Debug Release RelWithDebInfo MinSizeRel)
Message("Architecture is ${CMAKE_SYSTEM_PROCESSOR}")
if (CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7l")
set(C_FLAGS_PROCESSOR "-gdwarf-2 -mfloat-abi=hard -mfpu=neon -lgcc -lrt")
else (CMAKE_SYSTEM_PROCESSOR STREQUAL "armv7l")
if (CMAKE_SYSTEM_PROCESSOR STREQUAL "aarch64")
set(C_FLAGS_PROCESSOR "-gdwarf-2 -lgcc -lrt -fsigned-char ")
else (CMAKE_SYSTEM_PROCESSOR STREQUAL "aarch64")
if(EXISTS "/proc/cpuinfo")
file(STRINGS "/proc/cpuinfo" CPUINFO REGEX flags LIMIT_COUNT 1)
if (CPUINFO MATCHES "avx2")
......@@ -259,7 +267,7 @@ set(CMAKE_EXE_LINKER_FLAGS "${CMAKE_EXE_LINKER_FLAGS} -ggdb2 -Wl,-rpath -Wl,${C
# these changes are related to hardcoded path to include .h files
set(debugOpt "-ggdb2 -DMALLOC_CHECK_=3 -fno-delete-null-pointer-checks")
set(CMAKE_C_FLAGS_DEBUG "${debugOpt} -O0")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "${debugOpt} -O2")
set(CMAKE_C_FLAGS_RELWITHDEBINFO "${debugOpt} -O3")
set(CMAKE_C_FLAGS_RELEASE "-O3")
# Enable assert() for RelWithDebInfo builds
......@@ -719,6 +727,13 @@ set(HWLIB_BLADERF_SOURCE
add_library(oai_bladerfdevif MODULE ${HWLIB_BLADERF_SOURCE} )
target_link_libraries(oai_bladerfdevif bladeRF)
include_directories("${OPENAIR_TARGETS}/ARCH/YUNSDR/USERSPACE/LIB/")
set(HWLIB_YUNSDR_SOURCE
${OPENAIR_TARGETS}/ARCH/YUNSDR/USERSPACE/LIB/yunsdr_lib.c
)
add_library(oai_yunsdrdevif MODULE ${HWLIB_YUNSDR_SOURCE} )
target_link_libraries(oai_yunsdrdevif yunsdr_ss)
include_directories("${OPENAIR_TARGETS}/ARCH/LMSSDR/USERSPACE/LIB/")
set(HWLIB_LMSSDR_SOURCE
......@@ -1671,14 +1686,14 @@ if (${SMBV})
set(PHY_SRC "${PHY_SRC} ${OPENAIR1_DIR}/PHY/TOOLS/smbv.c")
endif (${SMBV})
if (${COMPILATION_AVX2} STREQUAL "True")
if ("${COMPILATION_AVX2}" STREQUAL "True")
#set(PHY_SRC ${PHY_SRC} ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dlsch_llr_computation_avx2.c)
set(PHY_SRC_UE ${PHY_SRC_UE} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
endif ("${COMPILATION_AVX2}" STREQUAL "True")
if (${COMPILATION_AVX2} STREQUAL "True")
if ("${COMPILATION_AVX2}" STREQUAL "True")
set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
endif ("${COMPILATION_AVX2}" STREQUAL "True")
add_library(PHY_COMMON ${PHY_SRC_COMMON})
add_dependencies(PHY_COMMON rrc_flag)
......@@ -3007,7 +3022,8 @@ if (${T_TRACER})
nr_ulschsim ldpctest polartest smallblocktest cu_test du_test
#all "add_library" definitions
ITTI RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB X2AP_LIB X2AP_ENB M2AP_LIB M2AP_ENB M3AP_LIB M3AP_ENB F1AP_LIB F1AP
params_libconfig oai_exmimodevif oai_usrpdevif oai_bladerfdevif oai_lmssdrdevif oai_iqplayer
params_libconfig oai_exmimodevif oai_usrpdevif oai_bladerfdevif
oai_yunsdrdevif oai_lmssdrdevif oai_iqplayer
oai_eth_transpro oai_mobipass tcp_bridge tcp_bridge_oai
coding FLPT_MSG FLEXRAN_AGENT HASHTABLE UTIL OMG_SUMO
SECU_OSA SECU_CN SCHED_LIB SCHED_NR_LIB SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB default_sched remote_sched RAL
......
......@@ -104,7 +104,7 @@ Options
--UE-gen-nvram [output path]
Specify gen_nvram_path (default \"$gen_nvram_path\")
-w | --hardware
EXMIMO, USRP, BLADERF, LMSSDR, IRIS, ADRV9371_ZC706, SIMU, AW2SORI, None (Default)
EXMIMO, USRP, BLADERF, LMSSDR, IRIS, YUNSDR, ADRV9371_ZC706, SIMU, AW2SORI, None (Default)
Adds this RF board support (in external packages installation and in compilation)
-t | --transport
Selects the transport protocol type, options: None, Ethernet, benetel4g, benetel5g
......@@ -285,7 +285,7 @@ function main() {
"EXMIMO")
HW="EXMIMO"
;;
"USRP" | "BLADERF" | "LMSSDR" | "IRIS" | "ADRV9371_ZC706" | "SIMU" | "AW2SORI")
"USRP" | "BLADERF" | "LMSSDR" | "IRIS" | "ADRV9371_ZC706" | "SIMU" | "AW2SORI" | "YUNSDR")
HW="OAI_"$2
;;
"None")
......@@ -557,6 +557,9 @@ function main() {
flash_firmware_bladerf
fi
fi
if [ "$HW" == "OAI_YUNSDR" ] ; then
echo_info "installing packages for YUNSDR support"
fi
if [ "$HW" == "OAI_IRIS" ] ; then
echo_info "installing packages for IRIS support"
check_install_soapy
......@@ -845,6 +848,17 @@ function main() {
ln -sf liboai_bladerfdevif.so liboai_device.so
ln -sf $dbin/liboai_bladerfdevif.so.$REL $dbin/liboai_device.so
echo_info "liboai_device.so is linked to BLADERF device library"
elif [ "$HW" == "OAI_YUNSDR" ] ; then
if [ -f "/usr/local/include/yunsdr_api_ss.h" ] ; then
compilations \
$BUILD_DIR oai_yunsdrdevif \
liboai_yunsdrdevif.so $dbin/liboai_yunsdrdevif.so.$REL
fi
ln -sf liboai_yunsdrdevif.so liboai_device.so
ln -sf $dbin/liboai_yunsdrdevif.so.$REL $dbin/liboai_device.so
echo_info "liboai_device.so is linked to YUNSDR device library"
elif [ "$HW" == "OAI_LMSSDR" ] ; then
# if [ -f "/usr/include/libbladeRF.h" ] ; then
compilations \
......
......@@ -715,8 +715,11 @@ check_install_oai_software() {
;;
"ubuntu18.04")
specific_packages="libtasn1-6-dev libgnutls28-dev iproute2 libconfig-dev"
LAPACK_LIBNAME="liblapack.so-x86_64-linux-gnu"
LAPACK_TARGET="/usr/lib/x86_64-linux-gnu/atlas/liblapack.so"
#LAPACK_LIBNAME="liblapack.so-x86_64-linux-gnu"
#LAPACK_TARGET="/usr/lib/x86_64-linux-gnu/atlas/liblapack.so"
#if it is aarch64
LAPACK_LIBNAME="liblapack.so-aarch64-linux-gnu"
LAPACK_TARGET="/usr/lib/aarch64-linux-gnu/atlas/liblapack.so"
;;
esac
$SUDO apt-get install -y \
......
......@@ -37,7 +37,7 @@ extern double cpu_freq_GHz __attribute__ ((aligned(32)));;
// structure to store data to compute cpu measurment
#if defined(__x86_64__) || defined(__i386__)
typedef long long oai_cputime_t;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
typedef uint32_t oai_cputime_t;
#else
#error "building on unsupported CPU architecture"
......@@ -102,12 +102,15 @@ static inline unsigned long long rdtsc_oai(void) {
return (d<<32) | a;
}
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
static inline uint32_t rdtsc_oai(void) __attribute__((always_inline));
static inline uint32_t rdtsc_oai(void) {
uint32_t r = 0;
asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r"(r) );
return r;
uint32_t Current_Speed = 2300;
uint32_t External_Clock = 48;
asm volatile("mrs %0, cntvct_el0" : "=r" (r));
return r * (Current_Speed/External_Clock);
}
#endif
......
......@@ -121,7 +121,7 @@ char *itoa(int i) {
void *memcpy1(void *dst,const void *src,size_t n) {
void *ret=dst;
asm volatile("rep movsb" : "+D" (dst) : "c"(n), "S"(src) : "cc","memory");
// asm volatile("rep movsb" : "+D" (dst) : "c"(n), "S"(src) : "cc","memory");
return(ret);
}
......
......@@ -99,7 +99,7 @@
#define CONFIG_HLP_DISABLNBIOT "disable nb-iot, even if defined in config\n"
#define CONFIG_HLP_USRP_ARGS "set the arguments to identify USRP (same syntax as in UHD)\n"
#define CONFIG_HLP_YUNSDR_ARGS "set the arguments to identify YUNSDR\n"
#define CONFIG_HLP_FLOG "Enable online log \n"
#define CONFIG_HLP_LOGL "Set the global log level, valid options: (4:trace, 3:debug, 2:info, 1:warn, (0:error))\n"
#define CONFIG_HLP_LOGV "Set the global log verbosity \n"
......
......@@ -102,6 +102,20 @@ typedef enum {
si = 2
} sync_mode_t;
#if defined(__arm__) || defined(__aarch64__)
uint8_t symbol_thread_id[14];
pthread_cond_t sym_cond;
pthread_mutex_t sym_mutex;
UE_nr_rxtx_proc_t sym_proc;
volatile int8_t symbol_end_flag[14] = {-1};
uint8_t ofdm_thread_id[14];
pthread_cond_t ofdm_cond;
pthread_mutex_t ofdm_mutex;
UE_nr_rxtx_proc_t ofdm_proc;
volatile int8_t ofdm_end_flag[14] = {-1};
#endif
queue_t nr_rach_ind_queue;
static void *NRUE_phy_stub_standalone_pnf_task(void *arg);
......@@ -736,9 +750,31 @@ void processSlotTX(void *arg) {
}
void processSlotRX(void *arg) {
#if defined(__arm__) || defined(__aarch64__)
int i = 0, policy = 0;
struct sched_param sparam;
cpu_set_t cpuset;
for (i = 30; i < 50; i++)
CPU_SET(i, &cpuset);
pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
memset(&sparam, 0, sizeof(sparam));
sparam.sched_priority = sched_get_priority_max(SCHED_FIFO);
policy = SCHED_FIFO;
pthread_setschedparam(pthread_self(), policy, &sparam);
#endif
nr_rxtx_thread_data_t *rxtxD = (nr_rxtx_thread_data_t *) arg;
UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
struct timespec time_now;
clock_gettime( CLOCK_REALTIME, &time_now );
LOG_E(PHY,"processSlotRX frame %d slot %d : time %ld %ld\n",proc->frame_rx, proc->nr_slot_rx,time_now.tv_sec, time_now.tv_nsec);
#if defined(__arm__) || defined(__aarch64__)
sym_proc = rxtxD->proc;
ofdm_proc = rxtxD->proc;
#endif
PHY_VARS_NR_UE *UE = rxtxD->UE;
fapi_nr_config_request_t *cfg = &UE->nrUE_config;
int rx_slot_type = nr_ue_slot_select(cfg, proc->frame_rx, proc->nr_slot_rx);
......@@ -913,6 +949,227 @@ static inline int get_readBlockSize(uint16_t slot, NR_DL_FRAME_PARMS *fp) {
return rem_samples + next_slot_first_symbol;
}
#if defined(__arm__) || defined(__aarch64__)
void *ue_symbol_fep(void *arg) {
uint8_t symbol_id = *(uint8_t *)arg;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[0][0];
int policy = 0;
struct sched_param sparam;
cpu_set_t cpuset;
CPU_SET(50+symbol_id, &cpuset);
pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
LOG_D(NR_PHY, "ue_symbol_fep_%d start\n", symbol_id);
memset(&sparam, 0, sizeof(sparam));
sparam.sched_priority = sched_get_priority_max(SCHED_FIFO);
policy = SCHED_FIFO;
pthread_setschedparam(pthread_self(), policy, &sparam);
while (!oai_exit) {
int rc;
rc = pthread_mutex_lock( &sym_mutex );
if(rc !=0){
printf("sym mutex lock error");
}
while (symbol_end_flag[symbol_id] <0){
pthread_cond_wait( &sym_cond, &sym_mutex );
}
rc = pthread_mutex_unlock( &sym_mutex );
if(rc !=0){
printf("sym mutex unlock error");
}
nr_slot_fep(ue,
&sym_proc,
symbol_id,
sym_proc.nr_slot_rx);
LOG_D(NR_PHY, "ue_symbol_fep_%d nr_slot_fep end\n", symbol_id);
symbol_end_flag[symbol_id] = -1;
}
return NULL;
}
void *ue_symbol_ofdm(void *arg) {
uint8_t symbol_id = *(uint8_t *)arg;
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[0][0];
int policy = 0;
struct sched_param sparam;
cpu_set_t cpuset;
CPU_SET(50+symbol_id, &cpuset);
pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
memset(&sparam, 0, sizeof(sparam));
sparam.sched_priority = sched_get_priority_max(SCHED_FIFO);
policy = SCHED_FIFO;
pthread_setschedparam(pthread_self(), policy, &sparam);
LOG_D(NR_PHY, "ue_symbol_ofdm_%d start\n", symbol_id);
while (!oai_exit) {
int rc;
rc = pthread_mutex_lock( &ofdm_mutex );
if(rc !=0){
printf("ofdm mutex lock error");
}
while (ofdm_end_flag[symbol_id] <0){
pthread_cond_wait( &ofdm_cond, &ofdm_mutex );
}
rc = pthread_mutex_unlock( &ofdm_mutex );
if(rc !=0){
printf("ofdm mutex unlock error");
}
NR_DL_FRAME_PARMS *frame_parms = &(ue->frame_parms);
int32_t **txdata = ue->common_vars.txdata;
int32_t **txdataF = ue->common_vars.txdataF;
int slot = ofdm_proc.nr_slot_tx;
int tx_offset = frame_parms->get_samples_slot_timestamp(slot, frame_parms, 0);
int fftsize = frame_parms->ofdm_symbol_size;
unsigned short nb_prefix_samples = frame_parms->nb_prefix_samples;
Extension_t etype = CYCLIC_PREFIX;
uint8_t i = symbol_id;
uint32_t j = 0;
int16_t temp[2*2*6144*4] __attribute__((aligned(32)));
volatile int *output_ptr=(int*)0;
int *input;
int *output;
input = &txdataF[0][frame_parms->ofdm_symbol_size];
output = &txdata[0][tx_offset+frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples0];
int *temp_ptr=(int*)0;
idft_size_idx_t idftsize;
LOG_D(NR_PHY, "ue_symbol_ofdm_%d slot %d, tx_offset %d, fftsize %d, nb_prefix_samples %d nr_slot_ofdm end\n", symbol_id, slot,tx_offset, fftsize, nb_prefix_samples );
switch (fftsize) {
case 128:
idftsize = IDFT_128;
break;
case 256:
idftsize = IDFT_256;
break;
case 512:
idftsize = IDFT_512;
break;
case 1024:
idftsize = IDFT_1024;
break;
case 1536:
idftsize = IDFT_1536;
break;
case 2048:
idftsize = IDFT_2048;
break;
case 3072:
idftsize = IDFT_3072;
break;
case 4096:
idftsize = IDFT_4096;
break;
case 6144:
idftsize= IDFT_6144;
break;
case 12288:
idftsize= IDFT_12288;
break;
case 24576:
idftsize= IDFT_24576;
break;
default:
idftsize = IDFT_512;
break;
}
// for (i=symbol_id; i<13; i=i+7) {
#ifndef __AVX2__
// handle 128-bit alignment for 128-bit SIMD (SSE4,NEON,AltiVEC)
idft(idftsize,(int16_t *)&input[i*fftsize],
(fftsize==128) ? (int16_t *)temp : (int16_t *)&output[(i*fftsize) + ((1+i)*nb_prefix_samples)],
1);
#else
// on AVX2 need 256-bit alignment
idft(idftsize,(int16_t *)&input[i*fftsize],
(int16_t *)temp,
1);
#endif
switch (etype) {
case CYCLIC_PREFIX:
output_ptr = &output[(i*fftsize) + ((1+i)*nb_prefix_samples)];
temp_ptr = (int *)temp;
// msg("Doing cyclic prefix method\n");
#ifndef __AVX2__
if (fftsize==128)
#endif
{
memcpy((void*)output_ptr,(void*)temp_ptr,fftsize<<2);
}
memcpy((void*)&output_ptr[-nb_prefix_samples],(void*)&output_ptr[fftsize-nb_prefix_samples],nb_prefix_samples<<2);
break;
case CYCLIC_SUFFIX:
output_ptr = &output[(i*fftsize)+ (i*nb_prefix_samples)];
temp_ptr = (int *)temp;
// msg("Doing cyclic suffix method\n");
for (j=0; j<fftsize ; j++) {
output_ptr[j] = temp_ptr[2*j];
}
for (j=0; j<nb_prefix_samples; j++)
output_ptr[fftsize+j] = output_ptr[j];
break;
case ZEROS:
break;
case NONE:
// msg("NO EXTENSION!\n");
output_ptr = &output[fftsize];
temp_ptr = (int *)temp;
for (j=0; j<fftsize ; j++) {
output_ptr[j] = temp_ptr[2*j];
}
break;
default:
break;
}
// }
ofdm_end_flag[symbol_id] = -1;
LOG_D(NR_PHY, "ue_symbol_ofdm_%d nr_slot_ofdm end ofdm_end_flag[%d] %d\n", symbol_id, symbol_id, ofdm_end_flag[symbol_id]);
// ofdm_end_flag[symbol_id] = -1;
}
return NULL;
}
#endif
void *UE_thread(void *arg) {
//this thread should be over the processing thread to keep in real time
PHY_VARS_NR_UE *UE = (PHY_VARS_NR_UE *) arg;
......@@ -1036,7 +1293,23 @@ void *UE_thread(void *arg) {
curMsg->proc.frame_tx = ((absolute_slot+DURATION_RX_TO_TX)/nb_slot_frame) % MAX_FRAME_NUMBER;
curMsg->proc.decoded_frame_rx=-1;
//LOG_I(PHY,"Process slot %d thread Idx %d total gain %d\n", slot_nr, thread_idx, UE->rx_total_gain_dB);
#if defined(__arm__) || defined(__aarch64__)
sym_proc.thread_id = curMsg->proc.thread_id;
sym_proc.CC_id = curMsg->proc.CC_id;
sym_proc.nr_slot_rx = curMsg->proc.nr_slot_rx;
sym_proc.nr_slot_tx = curMsg->proc.nr_slot_tx;
sym_proc.frame_rx = curMsg->proc.frame_rx;
sym_proc.frame_tx = curMsg->proc.frame_tx;
sym_proc.decoded_frame_rx = curMsg->proc.decoded_frame_rx;
ofdm_proc.thread_id = curMsg->proc.thread_id;
ofdm_proc.CC_id = curMsg->proc.CC_id;
ofdm_proc.nr_slot_rx = curMsg->proc.nr_slot_rx;
ofdm_proc.nr_slot_tx = curMsg->proc.nr_slot_tx;
ofdm_proc.frame_rx = curMsg->proc.frame_rx;
ofdm_proc.frame_tx = curMsg->proc.frame_tx;
ofdm_proc.decoded_frame_rx = curMsg->proc.decoded_frame_rx;
#endif
#ifdef OAI_ADRV9371_ZC706
/*uint32_t total_gain_dB_prev = 0;
if (total_gain_dB_prev != UE->rx_total_gain_dB) {
......@@ -1202,6 +1475,31 @@ void init_NR_UE_threads(int nb_inst) {
pthread_t stat_pthread;
threadCreate(&stat_pthread, nrL1_UE_stats_thread, UE, "L1_UE_stats", -1, OAI_PRIORITY_RT_LOW);
}
#if defined(__arm__) || defined(__aarch64__)
pthread_t symbol_threads[14];
pthread_cond_init(&sym_cond,NULL);
pthread_mutex_init(&sym_mutex, NULL);
char thread_name[100];
pthread_t ofdm_threads[14];
pthread_cond_init(&ofdm_cond,NULL);
pthread_mutex_init(&ofdm_mutex, NULL);
char ofdm_thread_name[100];
for (inst=1; inst < 14; inst++) {
symbol_thread_id[inst] = inst;
sprintf(thread_name,"ue_symbol_fep_%d\n", inst);
threadCreate(&symbol_threads[inst], ue_symbol_fep, (void *)&symbol_thread_id[inst], thread_name, -1, OAI_PRIORITY_RT_MAX);
}
for (inst=1; inst < 13; inst++) {
ofdm_thread_id[inst] = inst;
sprintf(ofdm_thread_name,"ue_symbol_ofdm_%d\n", inst);
threadCreate(&ofdm_threads[inst], ue_symbol_ofdm, (void *)&ofdm_thread_id[inst], ofdm_thread_name, -1, OAI_PRIORITY_RT_MAX);
}
sleep(1);
#endif
}
/* HACK: this function is needed to compile the UE
......
......@@ -119,7 +119,7 @@ char *usrp_args = NULL;
char *rrc_config_path = NULL;
char *uecap_file = NULL;
int dumpframe = 0;
char *yunsdr_args = NULL;
uint64_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
int rx_input_level_dBm;
......@@ -213,9 +213,8 @@ void exit_function(const char *file, const char *function, const int line, const
if (s != NULL) {
printf("%s:%d %s() Exiting OAI softmodem: %s\n",file,line, function, s);
}
close_log_mem();
oai_exit = 1;
if (PHY_vars_UE_g && PHY_vars_UE_g[0]) {
for(CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if (PHY_vars_UE_g[0][CC_id] && PHY_vars_UE_g[0][CC_id]->rfdevice.trx_end_func)
......@@ -366,7 +365,7 @@ void init_openair0(void) {
openair0_cfg[card].configFilename = get_softmodem_params()->rf_config_file;
if (usrp_args) openair0_cfg[card].sdr_addrs = usrp_args;
else if (yunsdr_args) openair0_cfg[card].sdr_addrs = yunsdr_args;
}
}
......
......@@ -29,6 +29,7 @@
/*------------------------------------------------------------------------------------------------------------------------------------------*/
#define CMDLINE_NRUEPARAMS_DESC { \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \
{"yunsdr-args", CONFIG_HLP_YUNSDR_ARGS, 0, strptr:(char **)&yunsdr_args, defstrval:"dev=pciex:0", TYPE_STRING, 0}, \
{"single-thread-disable", CONFIG_HLP_NOSNGLT, PARAMFLAG_BOOL, iptr:&single_thread_flag, defintval:1, TYPE_INT, 0}, \
{"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, iptr:(int32_t *)&nrUE_params.nr_dlsch_parallel, defintval:0, TYPE_UINT8, 0}, \
{"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, uptr:(uint32_t *)&nrUE_params.ofdm_offset_divisor, defuintval:UINT_MAX, TYPE_UINT32, 0}, \
......
......@@ -211,7 +211,7 @@ void set_softmodem_sighandler(void) {
act.sa_handler=signal_handler;
sigaction(SOFTMODEM_RTSIGNAL,&act,&oldact);
// Disabled in order generate a core dump for analysis with gdb
# if 0
# if 1
printf("Send signal %d to display resource usage...\n",SIGRTMIN+1);
signal(SIGSEGV, signal_handler);
signal(SIGINT, signal_handler);
......
......@@ -58,7 +58,7 @@ struct treillis {
int exit_state;
} __attribute__ ((aligned(64)));
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
struct treillis {
union {
......@@ -182,12 +182,12 @@ char interleave_compact_byte(short *base_interleaver,unsigned char *input, unsig
0b01000000,
0b10000000);
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
uint8x16_t *i_128=(uint8x16_t *)input, *o_128=(uint8x16_t *)expandInput;
uint8x16_t tmp1,tmp2;
uint16x8_t tmp3;
uint32x4_t tmp4;
uint8x16_t and_tmp;
//uint8x16_t and_tmp;
uint8x16_t BIT_MASK = { 0b10000000,
0b01000000,
0b00100000,
......@@ -315,7 +315,7 @@ char interleave_compact_byte(short *base_interleaver,unsigned char *input, unsig
//print_bytes2("out",(uint8_t*)(o_256+7));
o_256+=8;
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
tmp1=vld1q_u8((uint8_t *)i_128);
//print_bytes("tmp1:",(uint8_t*)&tmp1);
uint8x16x2_t temp1 = vzipq_u8(tmp1,tmp1);
......@@ -379,7 +379,7 @@ char interleave_compact_byte(short *base_interleaver,unsigned char *input, unsig
__m256i tmp={0};
uint32_t *systematic2_ptr=(uint32_t *) output;
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
uint8x16_t tmp;
const uint8_t __attribute__ ((aligned (16))) _Powers[16]=
{ 1, 2, 4, 8, 16, 32, 64, 128, 1, 2, 4, 8, 16, 32, 64, 128 };
......@@ -448,7 +448,7 @@ char interleave_compact_byte(short *base_interleaver,unsigned char *input, unsig
tmp=_mm256_insert_epi8(tmp,expandInput[*ptr_intl++],24+0);
*systematic2_ptr++=(unsigned int)_mm256_movemask_epi8(tmp);
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
tmp=vsetq_lane_u8(expandInput[*ptr_intl++],tmp,7);
tmp=vsetq_lane_u8(expandInput[*ptr_intl++],tmp,6);
tmp=vsetq_lane_u8(expandInput[*ptr_intl++],tmp,5);
......@@ -514,7 +514,7 @@ void threegpplte_turbo_encoder_sse(unsigned char *input,
interleave_compact_byte(base_interleaver,input,systematic2,input_length_bytes);
#if defined(__x86_64__) || defined(__i386__)
__m64 *ptr_output=(__m64 *) output;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
uint8x8_t *ptr_output=(uint8x8_t *)output;
#endif
unsigned char cur_s1, cur_s2;
......@@ -533,7 +533,7 @@ void threegpplte_turbo_encoder_sse(unsigned char *input,
*/
*ptr_output++ = _mm_add_pi8(all_treillis[state0][cur_s1].systematic_andp1_64[code_rate],
all_treillis[state1][cur_s2].parity2_64[code_rate]);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
*ptr_output++ = vadd_u8(all_treillis[state0][cur_s1].systematic_andp1_64[code_rate],
all_treillis[state0][cur_s1].parity2_64[code_rate]);
#endif
......
......@@ -153,7 +153,7 @@ void compute_gamma8(llr_t *m11,llr_t *m10,llr_t *systematic,channel_t *y_parity,
__m128i *y_parity128 = (__m128i *)y_parity;
__m128i *m10_128 = (__m128i *)m10;
__m128i *m11_128 = (__m128i *)m11;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int8x16_t *systematic128 = (int8x16_t *)systematic;
int8x16_t *y_parity128 = (int8x16_t *)y_parity;
int8x16_t *m10_128 = (int8x16_t *)m10;
......@@ -177,7 +177,7 @@ void compute_gamma8(llr_t *m11,llr_t *m10,llr_t *systematic,channel_t *y_parity,
_mm_srai_epi16(_mm_adds_epi16(sh,yph),1));
m10_128[k] = _mm_packs_epi16(_mm_srai_epi16(_mm_subs_epi16(sl,ypl),1),
_mm_srai_epi16(_mm_subs_epi16(sh,yph),1));
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
m11_128[k] = vhaddq_s8(systematic128[k],y_parity128[k]);
m10_128[k] = vhsubq_s8(systematic128[k],y_parity128[k]);
#endif
......@@ -193,7 +193,7 @@ void compute_gamma8(llr_t *m11,llr_t *m10,llr_t *systematic,channel_t *y_parity,
_mm_srai_epi16(_mm_adds_epi16(sh,yph),1));
m10_128[k] = _mm_packs_epi16(_mm_srai_epi16(_mm_subs_epi16(sl,ypl),1),
_mm_srai_epi16(_mm_subs_epi16(sh,yph),1));
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
m11_128[k] = vhaddq_s8(systematic128[k+term_flag],y_parity128[k]);
m10_128[k] = vhsubq_s8(systematic128[k+term_flag],y_parity128[k]);
#endif
......@@ -209,7 +209,7 @@ void compute_alpha8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sh
__m128i m_b0,m_b1,m_b2,m_b3,m_b4,m_b5,m_b6,m_b7;
__m128i new0,new1,new2,new3,new4,new5,new6,new7;
__m128i alpha_max;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int8x16_t *alpha128=(int8x16_t *)alpha,*alpha_ptr;
int8x16_t *m11p,*m10p;
int8x16_t m_b0,m_b1,m_b2,m_b3,m_b4,m_b5,m_b6,m_b7;
......@@ -299,7 +299,7 @@ void compute_alpha8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sh
alpha[112] = -MAX8/2;
}
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
alpha128[0] = vdupq_n_s8(-MAX8/2);
alpha128[0] = vsetq_lane_s8(0,alpha128[0],0);
alpha128[1] = vdupq_n_s8(-MAX8/2);
......@@ -401,7 +401,7 @@ void compute_beta8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sho
__m128i new0,new1,new2,new3,new4,new5,new6,new7;
__m128i *beta128,*alpha128,*beta_ptr;
__m128i beta_max;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int8x16_t m11_128,m10_128;
int8x16_t m_b0,m_b1,m_b2,m_b3,m_b4,m_b5,m_b6,m_b7;
int8x16_t new0,new1,new2,new3,new4,new5,new6,new7;
......@@ -421,7 +421,7 @@ void compute_beta8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sho
#if defined(__x86_64__) || defined(__i386__)
beta_ptr = (__m128i *)&beta[frame_length<<3];
alpha128 = (__m128i *)&alpha[0];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
beta_ptr = (int8x16_t *)&beta[frame_length<<3];
alpha128 = (int8x16_t *)&alpha[0];
#endif
......@@ -451,7 +451,7 @@ void compute_beta8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sho
beta_ptr[5] = _mm_insert_epi8(beta_ptr[5],beta5,15);
beta_ptr[6] = _mm_insert_epi8(beta_ptr[6],beta6,15);
beta_ptr[7] = _mm_insert_epi8(beta_ptr[7],beta7,15);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
beta_ptr[0] = vsetq_lane_s8(beta0,beta_ptr[0],15);
beta_ptr[1] = vsetq_lane_s8(beta1,beta_ptr[1],15);
beta_ptr[2] = vsetq_lane_s8(beta2,beta_ptr[2],15);
......@@ -465,7 +465,7 @@ void compute_beta8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sho
#if defined(__x86_64__) || defined(__i386__)
beta_ptr = (__m128i *)&beta[frame_length<<3];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
beta_ptr = (int8x16_t *)&beta[frame_length<<3];
#endif
......@@ -515,7 +515,7 @@ void compute_beta8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sho
beta_ptr[5] = _mm_subs_epi8(beta_ptr[5],beta_max);
beta_ptr[6] = _mm_subs_epi8(beta_ptr[6],beta_max);
beta_ptr[7] = _mm_subs_epi8(beta_ptr[7],beta_max);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
m11_128=((int8x16_t *)m_11)[k];
m10_128=((int8x16_t *)m_10)[k];
m_b0 = vqaddq_s8(beta_ptr[4],m11_128); //m11
......@@ -575,7 +575,7 @@ void compute_beta8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,unsigned sho
beta_ptr[5] = _mm_srli_si128(beta128[5],1);
beta_ptr[6] = _mm_srli_si128(beta128[6],1);
beta_ptr[7] = _mm_srli_si128(beta128[7],1);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
beta128 = (int8x16_t *)&beta[0];
beta_ptr = (int8x16_t *)&beta[frame_length<<3];
beta_ptr[0] = (int8x16_t)vshrq_n_s64((int64x2_t)beta128[0],8);
......@@ -608,7 +608,7 @@ void compute_ext8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,llr_t *ext, l
__m128i m01_1,m01_2,m01_3,m01_4;
__m128i m10_1,m10_2,m10_3,m10_4;
__m128i m11_1,m11_2,m11_3,m11_4;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int8x16_t *alpha128=(int8x16_t *)alpha;
int8x16_t *beta128=(int8x16_t *)beta;
int8x16_t *m11_128,*m10_128,*ext_128;
......@@ -670,7 +670,7 @@ void compute_ext8(llr_t *alpha,llr_t *beta,llr_t *m_11,llr_t *m_10,llr_t *ext, l
*ext_128 = _mm_subs_epi8(m10_1,m01_1);
alpha_ptr+=8;
beta_ptr+=8;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
m11_128 = (int8x16_t *)&m_11[k<<4];
m10_128 = (int8x16_t *)&m_10[k<<4];
ext_128 = (int8x16_t *)&ext[k<<4];
......@@ -820,7 +820,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
__m128i *yp128;
__m128i tmp128[(n+8)>>3];
__m128i tmp={0}, zeros=_mm_setzero_si128();
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int8x16_t *yp128;
int8x16_t tmp128[(n+8)>>3];
int8x16_t tmp, zeros=vdupq_n_s8(0);
......@@ -900,7 +900,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
((__m128i *)y8)[i] = _mm_packs_epi16(_mm_srai_epi16(((__m128i *)y)[j],3),_mm_srai_epi16(((__m128i *)y)[j+1],4));
yp128 = (__m128i *)y8;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int32x4_t avg=vdupq_n_s32(0);
for (i=0; i<(3*(n>>4))+1; i++) {
......@@ -1019,7 +1019,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
tmp=_mm_insert_epi8(tmp,((llr_t *)ext)[*pi4_p++],13);
tmp=_mm_insert_epi8(tmp,((llr_t *)ext)[*pi4_p++],14);
((__m128i *)systematic2)[i]=_mm_insert_epi8(tmp,((llr_t *)ext)[*pi4_p++],15);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
tmp=vsetq_lane_s8(((llr_t *)ext)[*pi4_p++],tmp,0);
tmp=vsetq_lane_s8(((llr_t *)ext)[*pi4_p++],tmp,1);
tmp=vsetq_lane_s8(((llr_t *)ext)[*pi4_p++],tmp,2);
......@@ -1067,7 +1067,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
tmp=_mm_insert_epi8(tmp,ext2[*pi5_p++],15);
decoded_bytes_interl[i]=(uint16_t) _mm_movemask_epi8(_mm_cmpgt_epi8(tmp,zeros));
((__m128i *)systematic1)[i] = _mm_adds_epi8(_mm_subs_epi8(tmp,((__m128i *)ext)[i]),((__m128i *)systematic0)[i]);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
tmp=vsetq_lane_s8(ext2[*pi5_p++],tmp,0);
tmp=vsetq_lane_s8(ext2[*pi5_p++],tmp,1);
tmp=vsetq_lane_s8(ext2[*pi5_p++],tmp,2);
......@@ -1111,7 +1111,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
tmp=_mm_insert_epi8(tmp,ext2[*pi5_p++],15);
tmp128[i] = _mm_adds_epi8(((__m128i *)ext2)[i],((__m128i *)systematic2)[i]);
((__m128i *)systematic1)[i] = _mm_adds_epi8(_mm_subs_epi8(tmp,((__m128i *)ext)[i]),((__m128i *)systematic0)[i]);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
tmp=vsetq_lane_s8(ext2[*pi5_p++],tmp,0);
tmp=vsetq_lane_s8(ext2[*pi5_p++],tmp,1);
tmp=vsetq_lane_s8(ext2[*pi5_p++],tmp,2);
......@@ -1166,7 +1166,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
}
}
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
uint8x16_t *dbytes=(uint8x16_t *)decoded_bytes_interl;
uint16x8_t mask __attribute__((aligned(16)));
int n_128=n2>>7;
......@@ -1208,7 +1208,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
tmp=_mm_insert_epi8(tmp, ((llr_t *)tmp128)[*pi6_p++],8);
tmp=_mm_cmpgt_epi8(tmp,zeros);
((uint16_t *)decoded_bytes)[i]=(uint16_t)_mm_movemask_epi8(tmp);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
tmp=vsetq_lane_s8(((llr_t *)tmp128)[*pi6_p++],tmp,7);
tmp=vsetq_lane_s8(((llr_t *)tmp128)[*pi6_p++],tmp,6);
tmp=vsetq_lane_s8(((llr_t *)tmp128)[*pi6_p++],tmp,5);
......@@ -1286,7 +1286,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
__m128i *ext_128=(__m128i *) ext;
__m128i *s1_128=(__m128i *) systematic1;
__m128i *s0_128=(__m128i *) systematic0;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int8x16_t *ext_128=(int8x16_t *) ext;
int8x16_t *s1_128=(int8x16_t *) systematic1;
int8x16_t *s0_128=(int8x16_t *) systematic0;
......@@ -1296,7 +1296,7 @@ uint8_t phy_threegpplte_turbo_decoder8(int16_t *y,
for (i=0; i<myloop; i++) {
#if defined(__x86_64__) || defined(__i386__)
*ext_128=_mm_adds_epi8(_mm_subs_epi8(*ext_128,*s1_128++),*s0_128++);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
*ext_128=vqaddq_s8(vqsubq_s8(*ext_128,*s1_128++),*s0_128++);
#endif
ext_128++;
......
......@@ -30,7 +30,9 @@
#include <stdint.h>
#ifdef __AVX2__
#include <immintrin.h>
#endif
#include "nrLDPCdecoder_defs.h"
#include "nrLDPC_types.h"
#include "nrLDPC_init.h"
......
#if defined(__x86_64__) || defined(__i386__)
#include "PHY/sse_intrin.h"
#elif defined(__arm__) || defined(__aarch64__)
#include <arm_neon.h>
#endif
#define scalar_xor(a,b) ((a)^(b))
// generated code for Zc=2, byte encoding
static inline void ldpc_BG2_Zc2_byte(uint8_t *c,uint8_t *d) {
......
#if defined(__x86_64__) || defined(__i386__)
#include "PHY/sse_intrin.h"
#elif defined(__arm__) || defined(__aarch64__)
#include <arm_neon.h>
#endif
#define scalar_xor(a,b) ((a)^(b))
// generated code for Zc=4, byte encoding
static inline void ldpc_BG2_Zc4_byte(uint8_t *c,uint8_t *d) {
......
......@@ -3,7 +3,9 @@
#include <math.h>
#include <stdint.h>
#ifdef __AVX2__
#include <immintrin.h>
#endif
void nr_polar_kernal_operation(uint8_t *u, uint8_t *d, uint16_t N)
{
......
......@@ -42,6 +42,7 @@
uint16_t decodeSmallBlock(int8_t *in, uint8_t len){
uint16_t out = 0;
#if defined(__x86_64__) || defined(__i386__)
AssertFatal(len >= 3 && len <= 11, "[decodeSmallBlock] Message Length = %d (Small Block Coding is only defined for input lengths 3 to 11)", len);
if(len<7) {
......@@ -151,6 +152,8 @@ uint16_t decodeSmallBlock(int8_t *in, uint8_t len){
#endif
}
#elif defined(__arm__) || defined(__aarch64__)
#endif
return out;
}
......@@ -193,7 +193,7 @@ void phy_viterbi_dot11_sse2(char *y,unsigned char *decoded_bytes,unsigned short
__m128i *m0_ptr,*m1_ptr,*TB_ptr = &TB[offset<<2];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
uint8x16x2_t TB[2*4095*8]; // 2 int8x16_t per input bit, 8 bits / byte, 4095 is largest packet size in bytes
uint8x16_t even0_30a,even0_30b,even32_62a,even32_62b,odd1_31a,odd1_31b,odd33_63a,odd33_63b,TBeven0_30,TBeven32_62,TBodd1_31,TBodd33_63;
......@@ -224,7 +224,7 @@ void phy_viterbi_dot11_sse2(char *y,unsigned char *decoded_bytes,unsigned short
metrics48_63 = _mm_setzero_si128();
}
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
if (offset == 0) {
// set initial metrics
......@@ -318,7 +318,7 @@ void phy_viterbi_dot11_sse2(char *y,unsigned char *decoded_bytes,unsigned short
metrics16_31 = _mm_subs_epu8(metrics16_31,min_state);
metrics32_47 = _mm_subs_epu8(metrics32_47,min_state);
metrics48_63 = _mm_subs_epu8(metrics48_63,min_state);
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
m0_ptr = (uint8x16_t *)&m0_table[table_offset];
m1_ptr = (uint8x16_t *)&m1_table[table_offset];
......
This diff is collapsed.
......@@ -283,7 +283,11 @@ __m128i inv_ch[4096];/* = {512,512,512,512,512,512,512,512,
};*/
void init_fde() {
#if defined(__x86_64__) || defined(__i386__)
for (int i=1;i<4096;i++) inv_ch[i] = _mm_set1_epi16(4096/i);
#elif defined(__arm__) || defined(__aarch64__)
#endif
}
void freq_equalization(LTE_DL_FRAME_PARMS *frame_parms,
......@@ -301,7 +305,7 @@ void freq_equalization(LTE_DL_FRAME_PARMS *frame_parms,
rxdataF_comp128 = (__m128i *)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
ul_ch_mag128 = (__m128i *)&ul_ch_mag[0][symbol*frame_parms->N_RB_DL*12];
ul_ch_magb128 = (__m128i *)&ul_ch_magb[0][symbol*frame_parms->N_RB_DL*12];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t *ul_ch_mag128,*ul_ch_magb128,*rxdataF_comp128;
rxdataF_comp128 = (int16x8_t*)&rxdataF_comp[0][symbol*frame_parms->N_RB_DL*12];
ul_ch_mag128 = (int16x8_t*)&ul_ch_mag[0][symbol*frame_parms->N_RB_DL*12];
......@@ -330,7 +334,7 @@ void freq_equalization(LTE_DL_FRAME_PARMS *frame_parms,
ul_ch_mag128[re] = _mm_set1_epi16(316); // this is 512*4/sqrt(42)
ul_ch_magb128[re] = _mm_set1_epi16(158); // this is 512*2/sqrt(42)
}
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
rxdataF_comp128[re] = vmulq_s16(rxdataF_comp128[re],inv_ch[amp]);
if (Qm==4)
......
......@@ -636,7 +636,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,
((__m256i *)cseq)[i2++] = ((__m256i *)unscrambling_lut)[s&65535];
((__m256i *)cseq)[i2++] = ((__m256i *)unscrambling_lut)[(s>>16)&65535];
#endif
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
((int16x8_t *)cseq)[i2++] = ((int16x8_t *)unscrambling_lut)[(s&65535)<<1];
((int16x8_t *)cseq)[i2++] = ((int16x8_t *)unscrambling_lut)[1+((s&65535)<<1)];
s>>=16;
......
......@@ -55,7 +55,7 @@ void lte_idft(LTE_DL_FRAME_PARMS *frame_parms,uint32_t *z, uint16_t Msc_PUSCH) {
#if defined(__x86_64__) || defined(__i386__)
__m128i idft_in128[3][1200],idft_out128[3][1200];
__m128i norm128;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t idft_in128[3][1200],idft_out128[3][1200];
int16x8_t norm128;
#endif
......@@ -470,7 +470,7 @@ int32_t ulsch_qpsk_llr(LTE_DL_FRAME_PARMS *frame_parms,
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxF=(__m128i *)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
__m128i **llrp128 = (__m128i **)llrp;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t *rxF= (int16x8_t *)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
int16x8_t **llrp128 = (int16x8_t **)llrp;
#endif
......@@ -565,7 +565,7 @@ void ulsch_64qam_llr(LTE_DL_FRAME_PARMS *frame_parms,
__m128i mmtmpU1,mmtmpU2;
ch_mag =(__m128i *)&ul_ch_mag[0][(symbol*frame_parms->N_RB_DL*12)];
ch_magb =(__m128i *)&ul_ch_magb[0][(symbol*frame_parms->N_RB_DL*12)];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t *rxF=(int16x8_t *)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
int16x8_t *ch_mag,*ch_magb;
int16x8_t mmtmpU1,mmtmpU2;
......@@ -786,7 +786,7 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
uint8_t aarx;//,symbol_mod;
__m128i mmtmpU0,mmtmpU1,mmtmpU2,mmtmpU3;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x4_t *ul_ch128,*rxdataF128;
int16x8_t *ul_ch_mag128,*ul_ch_mag128b,*rxdataF_comp128;
uint8_t aarx;//,symbol_mod;
......@@ -986,7 +986,7 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
#if defined(__x86_64__) || defined(__i386__)
__m128i *ul_ch128;
__m128 avg128U;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int32x4_t avg128U;
int16x4_t *ul_ch128;
#endif
......
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......@@ -1021,6 +1021,7 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms,
len>>=2; // length in quad words (4 REs)
len+=(len_mod4==0 ? 0 : 1);
#if defined(__x86_64__) || defined(__i386__)
for (i=0; i<len; i++) {
......@@ -1048,6 +1049,9 @@ void dlsch_16qam_llr_SIC (LTE_DL_FRAME_PARMS *frame_parms,
}
_mm_empty();
_m_empty();
#elif defined(__arm__) || defined(__aarch64__)
#endif
}
}
......@@ -1139,7 +1143,7 @@ void qam64_llr(int16_t *stream0_in,
__m128i *rxF_128 = (__m128i*)stream0_in;
__m128i *ch_mag_128 = (__m128i*)chan_magn;
__m128i *ch_magb_128 = (__m128i*)chan_magn_b;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t *rxF_128 = (int16x8_t*)stream0_in;
int16x8_t *ch_mag_128 = (int16x8_t*)chan_magn;
int16x8_t *ch_magb_128 = (int16x8_t*)chan_magn_b;
......@@ -1325,7 +1329,7 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
len2+=(len_mod4?0:1);
#if defined(__x86_64__) || defined(__i386__)
for (i=0; i<len2; i++) {
__m128i *x1 = (__m128i*)rxF;
......@@ -1390,6 +1394,9 @@ void dlsch_64qam_llr_SIC(LTE_DL_FRAME_PARMS *frame_parms,
_mm_empty();
_m_empty();
#elif defined(__arm__) || defined(__aarch64__)
#endif
}
}
......
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......@@ -47,7 +47,7 @@ void dft_lte(int32_t *z,int32_t *d, int32_t Msc_PUSCH, uint8_t Nsymb)
#if defined(__x86_64__) || defined(__i386__)
__m128i dft_in128[4][1200],dft_out128[4][1200];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t dft_in128[4][1200],dft_out128[4][1200];
#endif
uint32_t *dft_in0=(uint32_t*)dft_in128[0],*dft_out0=(uint32_t*)dft_out128[0];
......
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......@@ -92,6 +92,18 @@ void nr_codeword_unscrambling(int16_t* llr, uint32_t size, uint8_t q, uint32_t N
llr128[j+3] = _mm_mullo_epi16(llr128[j+3],byte2m128i[s8[3]]);
s = lte_gold_generic(&x1, &x2, 0);
}
#elif defined(__arm__)|| defined(__aarch64__)
uint8_t *s8=(uint8_t *)&s;
int16x8_t *llr128 = (__m128i*)llr;
s = lte_gold_generic(&x1, &x2, 1);
for (int i = 0, j = 0; i < ((size >> 5) + ((size & 0x1f) > 0 ? 1 : 0)); i++, j += 4) {
llr128[j] = vmulq_s16(llr128[j],byte2m128i[s8[0]]);
llr128[j+1] = vmulq_s16(llr128[j+1],byte2m128i[s8[1]]);
llr128[j+2] = vmulq_s16(llr128[j+2],byte2m128i[s8[2]]);
llr128[j+3] = vmulq_s16(llr128[j+3],byte2m128i[s8[3]]);
s = lte_gold_generic(&x1, &x2, 0);
}
#else
uint8_t reset = 1;
......
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......@@ -288,9 +288,13 @@ void nr_processDLSegment(void* arg) {
int16_t z [68*384 + 16] __attribute__ ((aligned(16)));
int8_t l [68*384 + 16] __attribute__ ((aligned(16)));
#if defined(__x86_64__)||defined(__i386__)
__m128i *pv = (__m128i*)&z;
__m128i *pl = (__m128i*)&l;
#elif defined(__arm__)|| defined(__aarch64__)
int16x8_t *pv = (int16x8_t *)&z;
int8x16_t *pl = (int8x16_t *)&l;
#endif
uint8_t Ilbrm = 1;
......@@ -385,10 +389,16 @@ void nr_processDLSegment(void* arg) {
//skip filler bits
memcpy((&z[0]+Kr),harq_process->d[r]+(Kr-2*harq_process->Z),(kc*harq_process->Z-Kr)*sizeof(int16_t));
#if defined(__x86_64__)||defined(__i386__)
//Saturate coded bits before decoding into 8 bits values
for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++) {
pl[j] = _mm_packs_epi16(pv[i],pv[i+1]);
}
#elif defined(__arm__)|| defined(__aarch64__)
for (i=0, j=0; j < ((kc*harq_process->Z)>>4)+1; i+=2, j++) {
pl[j] = vcombine_s8(vqmovn_s16(pv[i]),vqmovn_s16(pv[i+1]));
}
#endif
//VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_LDPC, VCD_FUNCTION_IN);
p_decoderParms->block_length=length_dec;
......
......@@ -452,7 +452,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
phich_string[fp->phich_config_common.phich_resource],
fp->nb_antenna_ports_gNB);*/
#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
#if defined(OAI_USRP) || defined(EXMIMO) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706) || defined(OAI_YUNSDR)
LOG_I(PHY, "[UE %d] Measured Carrier Frequency %.0f Hz (offset %d Hz)\n",
ue->Mod_id,
openair0_cfg[0].rx_freq[0]+ue->common_vars.freq_offset,
......@@ -502,12 +502,13 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
#ifndef OAI_ADRV9371_ZC706
#ifndef OAI_YUNSDR
//phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0);
#endif
#endif
#endif
#endif
#endif
}
else {
......@@ -515,12 +516,13 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
#ifndef OAI_ADRV9371_ZC706
#ifndef OAI_YUNSDR
//phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0);
#endif
#endif
#endif
#endif
#endif
}
// if stand alone and sync on ssb do sib1 detection as part of initial sync
......
......@@ -197,9 +197,10 @@ int nr_pbch_channel_level(struct complex16 dl_ch_estimates_ext[][PBCH_MAX_RE_PER
#if defined(__x86_64__) || defined(__i386__)
__m128i avg128;
__m128i *dl_ch128;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int32x4_t avg128;
int16x8_t *dl_ch128;
int32x4_t mmtmp0,mmtmp1;
#endif
int avg1=0,avg2=0;
......@@ -208,7 +209,7 @@ int nr_pbch_channel_level(struct complex16 dl_ch_estimates_ext[][PBCH_MAX_RE_PER
#if defined(__x86_64__) || defined(__i386__)
avg128 = _mm_setzero_si128();
dl_ch128=(__m128i *)dl_ch_estimates_ext[aarx];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
avg128 = vdupq_n_s32(0);
dl_ch128=(int16x8_t *)dl_ch_estimates_ext[aarx];
#endif
......@@ -218,9 +219,17 @@ int nr_pbch_channel_level(struct complex16 dl_ch_estimates_ext[][PBCH_MAX_RE_PER
avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[1],dl_ch128[1]));
avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[2],dl_ch128[2]));
#elif defined(__arm__)
abort();
#elif defined(__arm__) || defined(__aarch64__)
// to be filled in
mmtmp0 = vmull_s16(((int16x4_t*)dl_ch128)[0],((int16x4_t*)dl_ch128)[0]);
mmtmp1 = vmull_s16(((int16x4_t*)dl_ch128)[1],((int16x4_t*)dl_ch128)[1]);
avg128 = vaddq_s32(avg128,vcombine_s32(vpadd_s32(vget_low_s32(mmtmp0),vget_high_s32(mmtmp0)),vpadd_s32(vget_low_s32(mmtmp1),vget_high_s32(mmtmp1))));
mmtmp0 = vmull_s16(((int16x4_t*)dl_ch128)[2],((int16x4_t*)dl_ch128)[2]);
mmtmp1 = vmull_s16(((int16x4_t*)dl_ch128)[3],((int16x4_t*)dl_ch128)[3]);
avg128 = vaddq_s32(avg128,vcombine_s32(vpadd_s32(vget_low_s32(mmtmp0),vget_high_s32(mmtmp0)),vpadd_s32(vget_low_s32(mmtmp1),vget_high_s32(mmtmp1))));
mmtmp0 = vmull_s16(((int16x4_t*)dl_ch128)[4],((int16x4_t*)dl_ch128)[4]);
mmtmp1 = vmull_s16(((int16x4_t*)dl_ch128)[5],((int16x4_t*)dl_ch128)[5]);
avg128 = vaddq_s32(avg128,vcombine_s32(vpadd_s32(vget_low_s32(mmtmp0),vget_high_s32(mmtmp0)),vpadd_s32(vget_low_s32(mmtmp1),vget_high_s32(mmtmp1))));
#endif
dl_ch128+=3;
/*
......@@ -271,7 +280,7 @@ void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int i, nb_rb=6;
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxdataF_comp128_0,*rxdataF_comp128_1;
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t *rxdataF_comp128_0,*rxdataF_comp128_1;
#endif
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
......@@ -280,7 +289,7 @@ void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
#if defined(__x86_64__) || defined(__i386__)
rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[0][symbol_mod*6*12];
rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[1][symbol_mod*6*12];
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
rxdataF_comp128_0 = (int16x8_t *)&rxdataF_comp[0][symbol_mod*6*12];
rxdataF_comp128_1 = (int16x8_t *)&rxdataF_comp[1][symbol_mod*6*12];
#endif
......@@ -289,8 +298,8 @@ void nr_pbch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
for (i=0; i<nb_rb*3; i++) {
#if defined(__x86_64__) || defined(__i386__)
rxdataF_comp128_0[i] = _mm_adds_epi16(_mm_srai_epi16(rxdataF_comp128_0[i],1),_mm_srai_epi16(rxdataF_comp128_1[i],1));
#elif defined(__arm__)
rxdataF_comp128_0[i] = vhaddq_s16(rxdataF_comp128_0[i],rxdataF_comp128_1[i]);
#elif defined(__arm__) || defined(__aarch64__)
rxdataF_comp128_0[i] = vqaddq_s16(vqshlq_s16(rxdataF_comp128_0[i], vmovq_n_s16(-1)),vqshlq_s16(rxdataF_comp128_1[i], vmovq_n_s16(-1)));
#endif
}
}
......
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......@@ -174,49 +174,60 @@ int32_t signal_energy_nodc(int32_t *input,uint32_t length)
return temp;
}
#elif defined(__arm__)
#elif defined(__arm__) || defined(__aarch64__)
int32_t signal_energy(int32_t *input,uint32_t length)
{
int32_t i;
int32_t temp,temp2;
register int32x4_t tmpE,tmpDC;
int32x2_t tmpE2,tmpDC2;
int16x4_t *in = (int16x4_t *)input;
tmpE = vdupq_n_s32(0);
tmpDC = vdupq_n_s32(0);
for (i=0; i<length>>1; i++) {
tmpE = vqaddq_s32(tmpE,vshrq_n_s32(vmull_s16(*in,*in),shift));
//tmpDC = vaddw_s16(tmpDC,vshr_n_s16(*in++,shift_DC));
int32_t temp;
int16x8_t in;
int16x8_t i16_min, in_clp, coe1;
int32x4_t mmtmpP0,mmtmpP1;
float32x4_t recp1;
float32x4_t num0 =vmovq_n_f32(0);
float32x4_t num1 =vmovq_n_f32(0);
float32x4_t num2, num3;
float32x2_t num2_1, num3_1;
coe1 = vmovq_n_s16(1);
i16_min = vdupq_n_s16(SHRT_MIN);
recp1 = vdupq_n_f32(1.0/length);
for (i=0; i<length>>2; i++) {
in = vld1q_s16((int16_t*)input);
in_clp = vqsubq_s16(in,vreinterpretq_s16_u16(vceqq_s16(in,i16_min)));
mmtmpP0 = vmull_s16(((int16x4_t*)&in_clp)[0], ((int16x4_t*)&in_clp)[0]);
mmtmpP1 = vmull_s16(((int16x4_t*)&in_clp)[1], ((int16x4_t*)&in_clp)[1]);
mmtmpP0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpP0),vget_high_s32(mmtmpP0)),
vpadd_s32(vget_low_s32(mmtmpP1),vget_high_s32(mmtmpP1)));
num0 = vaddq_f32(num0, vcvtq_f32_s32(mmtmpP0));
in_clp = vld1q_s16((int16_t*)input);
mmtmpP0 = vmull_s16(((int16x4_t*)&in_clp)[0], ((int16x4_t*)&coe1)[0]);
mmtmpP1 = vmull_s16(((int16x4_t*)&in_clp)[1], ((int16x4_t*)&coe1)[1]);
mmtmpP0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpP0),vget_high_s32(mmtmpP0)),
vpadd_s32(vget_low_s32(mmtmpP1),vget_high_s32(mmtmpP1)));
num1 = vaddq_f32(num1, vcvtq_f32_s32(mmtmpP0));
input += 4;
}
tmpE2 = vpadd_s32(vget_low_s32(tmpE),vget_high_s32(tmpE));
num2 = vmulq_f32(num0, recp1);
num2_1 = vpadd_f32(vget_low_f32(num2),vget_high_f32(num2));
num2_1 = vpadd_f32(num2_1,num2_1);
num2 = vcombine_f32(num2_1,num2_1); //AC power
temp=(vget_lane_s32(tmpE2,0)+vget_lane_s32(tmpE2,1))/length;
temp<<=shift; // this is the average of x^2
// now remove the DC component
num3 = vmulq_f32(num1, recp1);
num3_1 = vpadd_f32(vget_low_f32(num3),vget_high_f32(num3));
num3_1 = vpadd_f32(num3_1,num3_1);
num3 = vcombine_f32(num3_1,num3_1); // DC
num3 = vmulq_f32(num3, num3);
tmpDC2 = vpadd_s32(vget_low_s32(tmpDC),vget_high_s32(tmpDC));
temp2=(vget_lane_s32(tmpDC2,0)+vget_lane_s32(tmpDC2,1))/(length*length);
// temp2<<=(2*shift_DC);
#ifdef MAIN
printf("E x^2 = %d\n",temp);
#endif
temp -= temp2;
#ifdef MAIN
printf("(E x)^2=%d\n",temp2);
#endif
temp = vgetq_lane_s32(vcvtq_s32_f32(vsubq_f32(num2, num3)), 0);
return((temp>0)?temp:1);
return temp;
}
int32_t signal_energy_nodc(int32_t *input,uint32_t length)
......@@ -224,28 +235,30 @@ int32_t signal_energy_nodc(int32_t *input,uint32_t length)
int32_t i;
int32_t temp;
register int32x4_t tmpE;
int32x2_t tmpE2;
int16x4_t *in = (int16x4_t *)input;
tmpE = vdupq_n_s32(0);
for (i=0; i<length>>1; i++) {
tmpE = vqaddq_s32(tmpE,vshrq_n_s32(vmull_s16(*in,*in),shift));
float32x2_t tmpE2;
int16x8_t in;
int32x4_t mmtmpP0,mmtmpP1;
float32x4_t num0 =vmovq_n_f32(0);
for (i=0; i<length>>2; i++) {
in = vld1q_s16((int16_t*)input);
mmtmpP0 = vmull_s16(((int16x4_t*)&in)[0], ((int16x4_t*)&in)[0]);
mmtmpP1 = vmull_s16(((int16x4_t*)&in)[1], ((int16x4_t*)&in)[1]);
mmtmpP0 = vcombine_s32(vpadd_s32(vget_low_s32(mmtmpP0),vget_high_s32(mmtmpP0)),
vpadd_s32(vget_low_s32(mmtmpP1),vget_high_s32(mmtmpP1)));
num0 = vaddq_f32(num0, vcvtq_f32_s32(mmtmpP0));
input += 4;
}
tmpE2 = vpadd_s32(vget_low_s32(tmpE),vget_high_s32(tmpE));
tmpE2 = vpadd_f32(vget_low_f32(num0),vget_high_f32(num0));
temp=(vget_lane_s32(tmpE2,0)+vget_lane_s32(tmpE2,1))/length;
temp<<=shift; // this is the average of x^2
temp=(int)((vget_lane_f32(tmpE2,0)+vget_lane_f32(tmpE2,1))/length);
#ifdef MAIN
printf("E x^2 = %d\n",temp);
#endif
return((temp>0)?temp:1);
return temp;
}
#endif
......@@ -322,9 +335,9 @@ main(int argc,char **argv)
int32_t signal_power(int32_t *input, uint32_t length)
{
int32_t temp = 0;
#if 0
uint32_t i;
int32_t temp;
__m128i in, in_clp, i16_min;
__m128 num0, num1;
__m128 recp1;
......@@ -343,16 +356,19 @@ int32_t signal_power(int32_t *input, uint32_t length)
//Ave
num1 = _mm_dp_ps(num0, recp1, 0xFF);
temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num1));
#else
#endif
return temp;
}
int32_t interference_power(int32_t *input, uint32_t length)
{
uint32_t i;
int32_t temp;
int32_t temp = 0;
#if 0
uint32_t i;
__m128i in, in_clp, i16_min;
__m128i num0, num1, num2, num3;
__m128 num4, num5, num6;
......@@ -377,7 +393,9 @@ int32_t interference_power(int32_t *input, uint32_t length)
//Interference ve
num6 = _mm_mul_ps(num5, recp1); //Cn / n
temp = _mm_cvtsi128_si32(_mm_cvttps_epi32(num6));
#else
#endif
return temp;
}
......@@ -41,6 +41,7 @@
* @{
* @defgroup _GENERIC_PHY_RF_INTERFACE_ Generic PHY - RF Interface
* @defgroup _USRP_PHY_RF_INTERFACE_ PHY - USRP RF Interface
* @defgroup _YUNSDR_PHY_RF_INTERFACE_ PHY - YUNSDR RF Interface
* @defgroup _BLADERF_PHY_RF_INTERFACE_ PHY - BLADERF RF Interface
* @defgroup _LMSSDR_PHY_RF_INTERFACE_ PHY - LMSSDR RF Interface
* @}
......
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......@@ -3820,7 +3820,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
NR_MAC_RAR *rar = (NR_MAC_RAR *) (dlsch_buffer + 1); // RAR subPDU pointer
uint8_t preamble_index = ra->ra_PreambleIndex;
LOG_D(NR_MAC, "In %s:[%d.%d]: [UE %d][RAPROC] invoking MAC for received RAR (current preamble %d)\n", __FUNCTION__, frame, slot, mod_id, preamble_index);
LOG_E(NR_MAC, "In %s:[%d.%d]: [UE %d][RAPROC] invoking MAC for received RAR (current preamble %d)\n", __FUNCTION__, frame, slot, mod_id, preamble_index);
while (1) {
n_subheaders++;
......@@ -3839,7 +3839,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
}
}
if (rarh->RAPID == preamble_index) {
LOG_A(NR_MAC, "[UE %d][RAPROC][%d.%d] Found RAR with the intended RAPID %d\n", mod_id, frame, slot, rarh->RAPID);
LOG_E(NR_MAC, "[UE %d][RAPROC][%d.%d] Found RAR with the intended RAPID %d\n", mod_id, frame, slot, rarh->RAPID);
rar = (NR_MAC_RAR *) (dlsch_buffer + n_subheaders + (n_subPDUs - 1) * sizeof(NR_MAC_RAR));
ra->RA_RAPID_found = 1;
if (get_softmodem_params()->emulate_l1) {
......
......@@ -1412,7 +1412,7 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB
&asn_DEF_NR_DL_CCCH_Message,
(void **)&dl_ccch_msg,
(uint8_t *)Srb_info->Rx_buffer.Payload,
Srb_info->Rx_buffer.payload_size,0,0);
1024,0,0);
// if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout,&asn_DEF_NR_DL_CCCH_Message,(void *)dl_ccch_msg);
......
......@@ -165,7 +165,7 @@
*/
#ifdef LFDS700_PAL_PORTING_ABSTRACTION_LAYER_PROCESSOR
#error More than one porting abstraction layer matches the current platform in lfds700_porting_abstraction_layer_processor.h
// #error More than one porting abstraction layer matches the current platform in lfds700_porting_abstraction_layer_processor.h
#endif
#define LFDS700_PAL_PORTING_ABSTRACTION_LAYER_PROCESSOR
......
......@@ -131,13 +131,13 @@ int encode_fgs_uplink_nas_transport(fgs_uplink_nas_transport_msg *fgs_up_nas_tra
// set request type
*(buffer + encoded) = (0x8<<4)|(fgs_up_nas_transport->requesttype &0x7);
encoded++;
#if 0
if ((encode_result = encode_nssai(&fgs_up_nas_transport->snssai, 0x22, buffer +encoded)) < 0) {
return encode_result;
} else {
encoded += encode_result;
}
#endif
if ((encode_result = encode_dnn(&fgs_up_nas_transport->dnn, 0x25, buffer +encoded)) < 0) {
return encode_result;
} else {
......
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