Commit 8f354ec3 authored by rmagueta's avatar rmagueta

Fix calculate_preferred_dl_tda and remove duplicated code

parent e1cc60d3
......@@ -543,6 +543,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
const NR_BWP_Downlink_t *bwp = bwpList->list.array[i];
calculate_preferred_dl_tda(Mod_idP, bwp);
}
} else {
calculate_preferred_dl_tda(Mod_idP, NULL);
}
const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList;
......
......@@ -81,11 +81,12 @@ void calculate_preferred_dl_tda(module_id_t module_id, const NR_BWP_Downlink_t *
const NR_ControlResourceSet_t *coreset = get_coreset(scc, bwp ? bwp->bwp_Dedicated : NULL, search_space, target_ss);
// get coreset symbol "map"
const uint16_t symb_coreset = (1 << coreset->duration) - 1;
const uint16_t symb_coreset = coreset ? (1 << coreset->duration) - 1 : 1;
/* check that TDA index 0 fits into DL and does not overlap CORESET */
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList = bwp ?
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList :
scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
AssertFatal(tdaList->list.count >= 1, "need to have at least one TDA for DL slots\n");
const NR_PDSCH_TimeDomainResourceAllocation_t *tdaP_DL = tdaList->list.array[0];
AssertFatal(!tdaP_DL->k0 || *tdaP_DL->k0 == 0,
......@@ -490,7 +491,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
const long f = (sched_ctrl->active_bwp ||bwpd) ? sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
int rbSize = 0;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : nr_find_default_tda(module_id, slot);
const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
if (tda == retInfo->time_domain_allocation) {
/* Check that there are enough resources for retransmission */
......@@ -715,7 +716,7 @@ void pf_dl(module_id_t module_id,
/* MCS has been set above */
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : nr_find_default_tda(module_id, slot);
const int tda = RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0][slot];
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
......
......@@ -371,8 +371,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
sched_pdsch->pucch_allocation = alloc;
sched_pdsch->rbStart = rbStart;
sched_pdsch->rbSize = rbSize;
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : nr_find_default_tda(module_id, slot);
AssertFatal(tda>=0,"Unable to find PDSCH time domain allocation in list\n");
const int tda = sched_ctrl->active_bwp ? RC.nrmac[module_id]->preferred_dl_tda[sched_ctrl->active_bwp->bwp_Id][slot] : 1;
const uint8_t num_dmrs_cdm_grps_no_data = 1;
const long f = 1;
ps->nrOfLayers = target_dl_Nl;
......
......@@ -295,39 +295,6 @@ bool nr_find_nb_rb(uint16_t Qm,
return *tbs >= bytes && *nb_rb <= nb_rb_max;
}
int nr_find_default_tda(module_id_t module_id, sub_frame_t slot) {
int tda = -1;
const NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels->ServingCellConfigCommon;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList =
scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
bool is_mixed_slot = is_xlsch_in_slot(RC.nrmac[module_id]->dlsch_slot_bitmap[slot / 64], slot) &&
is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[slot / 64], slot);
int startSymbolAndLength = 0;
int StartSymbolIndex = 0;
int NrOfSymbols = 0;
int NrOfSymbols_sel = -1;
for (int i=0; i<pdsch_TimeDomainAllocationList->list.count; i++) {
startSymbolAndLength = pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
if (is_mixed_slot) {
if(StartSymbolIndex + NrOfSymbols <= scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols && NrOfSymbols>NrOfSymbols_sel) {
NrOfSymbols_sel = NrOfSymbols;
tda = i;
}
} else {
if(NrOfSymbols>NrOfSymbols_sel) {
NrOfSymbols_sel = NrOfSymbols;
tda = i;
}
}
}
return tda;
}
void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *secondaryCellGroup,
const NR_BWP_Downlink_t *bwp,
......
......@@ -284,8 +284,6 @@ NR_SearchSpace_t *get_searchspace(NR_ServingCellConfigCommon_t *scc,
long get_K2(NR_ServingCellConfigCommon_t *scc, NR_BWP_Uplink_t *ubwp, int time_domain_assignment, int mu);
int nr_find_default_tda(module_id_t module_id, sub_frame_t slot);
void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const NR_CellGroupConfig_t *secondaryCellGroup,
const NR_BWP_Downlink_t *bwp,
......
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