dlsim.c 53.6 KB
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/*
 * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
 * contributor license agreements.  See the NOTICE file distributed with
 * this work for additional information regarding copyright ownership.
 * The OpenAirInterface Software Alliance licenses this file to You under
 * the OAI Public License, Version 1.1  (the "License"); you may not use this file
 * except in compliance with the License.
 * You may obtain a copy of the License at
 *
 *      http://www.openairinterface.org/?page_id=698
 *
 * Unless required by applicable law or agreed to in writing, software
 * distributed under the License is distributed on an "AS IS" BASIS,
 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
 * See the License for the specific language governing permissions and
 * limitations under the License.
 *-------------------------------------------------------------------------------
 * For more information about the OpenAirInterface (OAI) Software Alliance:
 *      contact@openairinterface.org
 */

#include <fcntl.h>
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#include <math.h>
#include <string.h>
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#include <sys/ioctl.h>
#include <sys/mman.h>
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#include <unistd.h>
#include "common/ran_context.h"
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#include "common/config/config_userapi.h"
#include "common/utils/LOG/log.h"
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#include "LAYER2/NR_MAC_gNB/nr_mac_gNB.h"
#include "LAYER2/NR_MAC_UE/mac_defs.h"
#include "LAYER2/NR_MAC_UE/mac_extern.h"
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#include "PHY/defs_gNB.h"
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#include "PHY/defs_nr_common.h"
#include "PHY/defs_nr_UE.h"
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#include "PHY/phy_vars_nr_ue.h"
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#include "PHY/types.h"
#include "PHY/INIT/phy_init.h"
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#include "PHY/MODULATION/modulation_eNB.h"
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#include "PHY/MODULATION/nr_modulation.h"
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#include "PHY/MODULATION/modulation_UE.h"
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#include "PHY/NR_REFSIG/refsig_defs_ue.h"
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#include "PHY/NR_TRANSPORT/nr_dlsch.h"
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#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
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#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
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#include "SCHED_NR/fapi_nr_l1.h"
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#include "SCHED_NR/sched_nr.h"
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#include "SCHED_NR_UE/defs.h"
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#include "SCHED_NR_UE/fapi_nr_ue_l1.h"
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
#include "NR_UE_PHY_INTERFACE/NR_IF_Module.h"

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#include "LAYER2/NR_MAC_UE/mac_proto.h"
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//#include "LAYER2/NR_MAC_gNB/mac_proto.h"
//#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
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#include "LAYER2/NR_MAC_gNB/mac_proto.h"
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#include "NR_asn_constant.h"
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#include "RRC/NR/MESSAGES/asn1_msg.h"
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#include "openair1/SIMULATION/RF/rf.h"
#include "openair1/SIMULATION/TOOLS/sim.h"
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
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//#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
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#include "PHY/NR_REFSIG/ptrs_nr.h"
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#include "NR_RRCReconfiguration.h"
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#define inMicroS(a) (((double)(a))/(get_cpu_freq_GHz()*1000.0))
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#include "SIMULATION/LTE_PHY/common_sim.h"

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#include <openair2/LAYER2/MAC/mac_vars.h>
#include <openair2/RRC/LTE/rrc_vars.h>
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LCHAN_DESC DCCH_LCHAN_DESC,DTCH_DL_LCHAN_DESC,DTCH_UL_LCHAN_DESC;
rlc_info_t Rlc_info_um,Rlc_info_am_config;
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PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
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int32_t uplink_frequency_offset[MAX_NUM_CCs][4];

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double cpuf;
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uint16_t sf_ahead=4 ;
uint16_t sl_ahead=0;
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//uint8_t nfapi_mode = 0;
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uint64_t downlink_frequency[MAX_NUM_CCs][4];
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THREAD_STRUCT thread_struct;
nfapi_ue_release_request_body_t release_rntis;
msc_interface_t msc_interface;

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// dummy functions
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int dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info)              { return(0);  }

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int8_t nr_mac_rrc_data_ind_ue(const module_id_t module_id,
                              const int CC_id,
                              const uint8_t gNB_index,
                              const frame_t frame,
                              const sub_frame_t sub_frame,
                              const rnti_t rnti,
                              const channel_t channel,
                              const uint8_t* pduP,
                              const sdu_size_t pdu_len)
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{
  return 0;
}

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void nr_rrc_ue_generate_RRCSetupRequest(module_id_t module_id, const uint8_t gNB_index)
{
  return;
}

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int8_t nr_mac_rrc_data_req_ue(const module_id_t Mod_idP,
                              const int         CC_id,
                              const uint8_t     gNB_id,
                              const frame_t     frameP,
                              const rb_id_t     Srb_id,
                              uint8_t           *buffer_pP)
{
  return 0;
}

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void
rrc_data_ind(
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  const protocol_ctxt_t *const ctxt_pP,
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  const rb_id_t                Srb_id,
  const sdu_size_t             sdu_sizeP,
  const uint8_t   *const       buffer_pP
)
{
}

int
gtpv1u_create_s1u_tunnel(
  const instance_t                              instanceP,
  const gtpv1u_enb_create_tunnel_req_t *const  create_tunnel_req_pP,
  gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP
) {
  return 0;
}
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int
rrc_gNB_process_GTPV1U_CREATE_TUNNEL_RESP(
  const protocol_ctxt_t *const ctxt_pP,
  const gtpv1u_enb_create_tunnel_resp_t *const create_tunnel_resp_pP,
  uint8_t                         *inde_list
) {
  return 0;
}
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int
gtpv1u_create_ngu_tunnel(
  const instance_t instanceP,
  const gtpv1u_gnb_create_tunnel_req_t *  const create_tunnel_req_pP,
        gtpv1u_gnb_create_tunnel_resp_t * const create_tunnel_resp_pP){
  return 0;
}

int
gtpv1u_update_ngu_tunnel(
  const instance_t                              instanceP,
  const gtpv1u_gnb_create_tunnel_req_t *const  create_tunnel_req_pP,
  const rnti_t                                  prior_rnti
){
  return 0;
}

int
nr_rrc_gNB_process_GTPV1U_CREATE_TUNNEL_RESP(
  const protocol_ctxt_t *const ctxt_pP,
  const gtpv1u_gnb_create_tunnel_resp_t *const create_tunnel_resp_pP,
  uint8_t                         *inde_list
){
  return 0;
}

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int nr_derive_key(int alg_type, uint8_t alg_id,
               const uint8_t key[32], uint8_t **out)
{
  return 0;
}

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void config_common(int Mod_idP,
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                   int ssb_SubcarrierOffset,
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                   int pdsch_AntennaPorts,
                   int pusch_AntennaPorts,
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		   NR_ServingCellConfigCommon_t *scc
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		   );
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int generate_dlsch_header(unsigned char *mac_header,
                          unsigned char num_sdus,
                          unsigned short *sdu_lengths,
                          unsigned char *sdu_lcids,
                          unsigned char drx_cmd,
                          unsigned short timing_advance_cmd,
                          unsigned char *ue_cont_res_id,
                          unsigned char short_padding,
                          unsigned short post_padding){return 0;}
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// Dummy function to avoid linking error at compilation of nr-dlsim
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int is_x2ap_enabled(void)
{
  return 0;
}

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void processSlotTX(void *arg) {}

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//nFAPI P7 dummy functions

int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req) { return(0);  }
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t *tx_data_req){ return(0);  }
int oai_nfapi_ul_dci_req(nfapi_nr_ul_dci_request_t *ul_dci_req){ return(0);  }
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req){ return(0);  }

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// needed for some functions
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openair0_config_t openair0_cfg[MAX_CARDS];
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void update_ptrs_config(NR_CellGroupConfig_t *secondaryCellGroup, uint16_t *rbSize, uint8_t *mcsIndex,int8_t *ptrs_arg);
void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dmrs_arg);
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extern void fix_scd(NR_ServingCellConfig_t *scd);// forward declaration 
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/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs from command line of
   dlsim, does not search for CCE/PUCCH occasion but simply sets to 0 */
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int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1;
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void nr_dlsim_preprocessor(module_id_t module_id,
                           frame_t frame,
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                           sub_frame_t slot) {
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  NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
  AssertFatal(UE_info->num_UEs == 1, "can have only a single UE\n");
  NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[0];

  /* manually set free CCE to 0 */
  const int target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
  sched_ctrl->search_space = get_searchspace(sched_ctrl->active_bwp, target_ss);
  uint8_t nr_of_candidates;
  find_aggregation_candidates(&sched_ctrl->aggregation_level,
                              &nr_of_candidates,
                              sched_ctrl->search_space);
  sched_ctrl->coreset = get_coreset(
      sched_ctrl->active_bwp, sched_ctrl->search_space, 1 /* dedicated */);
  sched_ctrl->cce_index = 0;

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  NR_pdsch_semi_static_t *ps = &sched_ctrl->pdsch_semi_static;
  const NR_ServingCellConfigCommon_t *scc = RC.nrmac[0]->common_channels[0].ServingCellConfigCommon;
  nr_set_pdsch_semi_static(scc,
                           UE_info->secondaryCellGroup[0],
                           sched_ctrl->active_bwp,
                           /* tda = */ 2,
                           /* num_dmrs_cdm_grps_no_data = */ 1,
                           ps);

  NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
  sched_pdsch->rbStart = g_rbStart;
  sched_pdsch->rbSize = g_rbSize;
  sched_pdsch->mcs = g_mcsIndex;
  /* the following might override the table that is mandated by RRC
   * configuration */
  ps->mcsTableIdx = g_mcsTableIdx;

  sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
  sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
  sched_pdsch->tb_size = nr_compute_tbs(sched_pdsch->Qm,
                                        sched_pdsch->R,
                                        sched_pdsch->rbSize,
                                        ps->nrOfSymbols,
                                        ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
                                        0 /* N_PRB_oh, 0 for initialBWP */,
                                        0 /* tb_scaling */,
                                        1 /* nrOfLayers */)
                         >> 3;

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  /* the simulator assumes the HARQ PID is equal to the slot number */
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  sched_pdsch->dl_harq_pid = slot;

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  /* The scheduler uses lists to track whether a HARQ process is
   * free/busy/awaiting retransmission, and updates the HARQ process states.
   * However, in the simulation, we never get ack or nack for any HARQ process,
   * thus the list and HARQ states don't match what the scheduler expects.
   * Therefore, below lines just "repair" everything so that the scheduler
   * won't remark that there is no HARQ feedback */
  sched_ctrl->feedback_dl_harq.head = -1; // always overwrite feedback HARQ process
  if (sched_ctrl->harq_processes[slot].round == 0) // depending on round set in simulation ...
    add_front_nr_list(&sched_ctrl->available_dl_harq, slot); // ... make PID available
  else
    add_front_nr_list(&sched_ctrl->retrans_dl_harq, slot);   // ... make PID retransmission
  sched_ctrl->harq_processes[slot].is_waiting = false;
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  AssertFatal(sched_pdsch->rbStart >= 0, "invalid rbStart %d\n", sched_pdsch->rbStart);
  AssertFatal(sched_pdsch->rbSize > 0, "invalid rbSize %d\n", sched_pdsch->rbSize);
  AssertFatal(sched_pdsch->mcs >= 0, "invalid mcs %d\n", sched_pdsch->mcs);
  AssertFatal(ps->mcsTableIdx >= 0 && ps->mcsTableIdx <= 2, "invalid mcsTableIdx %d\n", ps->mcsTableIdx);
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}
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typedef struct {
  uint64_t       optmask;   //mask to store boolean config options
  uint8_t        nr_dlsch_parallel; // number of threads for dlsch decoding, 0 means no parallelization
  tpool_t        Tpool;             // thread pool 
} nrUE_params_t;

nrUE_params_t nrUE_params;

nrUE_params_t *get_nrUE_params(void) {
  return &nrUE_params;
}
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void do_nothing(void *args) {
}
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int main(int argc, char **argv)
{
  char c;
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  int i,aa;//,l;
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  double sigma2, sigma2_dB=10, SNR, snr0=-2.0, snr1=2.0;
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  uint8_t snr1set=0;
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  double roundStats[500] = {0};
  double blerStats[500] = {0};
  double berStats[500] = {0};
  double snrStats[500] = {0};
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  float effRate;
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  //float psnr;
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  float eff_tp_check = 0.7;
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  uint8_t snrRun;
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  uint32_t TBS = 0;
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  int **txdata;
  double **s_re,**s_im,**r_re,**r_im;
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  //double iqim = 0.0;
  //unsigned char pbch_pdu[6];
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  //  int sync_pos, sync_pos_slot;
  //  FILE *rx_frame_file;
  FILE *output_fd = NULL;
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  //uint8_t write_output_file=0;
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  //int result;
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  //int freq_offset;
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  //  int subframe_offset;
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  //  char fname[40], vname[40];
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  int trial, n_trials = 1, n_errors = 0, n_false_positive = 0;
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  //int n_errors2, n_alamouti;
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  uint8_t transmission_mode = 1,n_tx=1,n_rx=1;
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  uint8_t round;
  uint8_t num_rounds = 4;
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  channel_desc_t *gNB2UE;
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  //uint32_t nsymb,tx_lev,tx_lev1 = 0,tx_lev2 = 0;
  //uint8_t extended_prefix_flag=0;
  //int8_t interf1=-21,interf2=-21;
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  FILE *input_fd=NULL,*pbch_file_fd=NULL;
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  //char input_val_str[50],input_val_str2[50];
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  //uint8_t frame_mod4,num_pdcch_symbols = 0;
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  SCM_t channel_model = AWGN; // AWGN Rayleigh1 Rayleigh1_anticorr;
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  NB_UE_INST = 1;
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  //double pbch_sinr;
  //int pbch_tx_ant;
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  int N_RB_DL=106,mu=1;
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  //unsigned char frame_type = 0;
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  int frame=1,slot=1;
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  int frame_length_complex_samples;
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  //int frame_length_complex_samples_no_prefix;
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  NR_DL_FRAME_PARMS *frame_parms;
  UE_nr_rxtx_proc_t UE_proc;
  NR_Sched_Rsp_t Sched_INFO;
  gNB_MAC_INST *gNB_mac;
  NR_UE_MAC_INST_t *UE_mac;
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  int cyclic_prefix_type = NFAPI_CP_NORMAL;
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  int run_initial_sync=0;
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  int pusch_tgt_snrx10 = 200;
  int pucch_tgt_snrx10 = 200;
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  int loglvl=OAILOG_INFO;
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  //float target_error_rate = 0.01;
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  int css_flag=0;
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  cpuf = get_cpu_freq_GHz();
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  int8_t enable_ptrs = 0;
  int8_t modify_dmrs = 0;

  int8_t dmrs_arg[2] = {-1,-1};// Invalid values
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  /* L_PTRS = ptrs_arg[0], K_PTRS = ptrs_arg[1] */
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  int8_t ptrs_arg[2] = {-1,-1};// Invalid values

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  uint16_t ptrsRePerSymb = 0;
  uint16_t pdu_bit_map = 0x0;
  uint16_t dlPtrsSymPos = 0;
  uint16_t ptrsSymbPerSlot = 0;
  uint16_t rbSize = 106;
  uint8_t  mcsIndex = 9;
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  uint8_t  dlsch_threads = 0;
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  if ( load_configmodule(argc,argv,CONFIG_ENABLECMDLINEONLY) == 0) {
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    exit_fun("[NR_DLSIM] Error, configuration module init failed\n");
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  }

  randominit(0);

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  int print_perf             = 0;
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  FILE *scg_fd=NULL;
  
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  while ((c = getopt (argc, argv, "f:hA:pf:g:i:j:n:s:S:t:x:y:z:M:N:F:GR:dPIL:Ea:b:d:e:m:w:T:U:q")) != -1) {
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    switch (c) {
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    case 'f':
      scg_fd = fopen(optarg,"r");
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      if (scg_fd==NULL) {
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        printf("Error opening %s\n",optarg);
        exit(-1);
      }
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      break;
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    /*case 'd':
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      frame_type = 1;
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      break;*/
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    case 'g':
      switch((char)*optarg) {
      case 'A':
        channel_model=SCM_A;
        break;

      case 'B':
        channel_model=SCM_B;
        break;

      case 'C':
        channel_model=SCM_C;
        break;

      case 'D':
        channel_model=SCM_D;
        break;

      case 'E':
        channel_model=EPA;
        break;

      case 'F':
        channel_model=EVA;
        break;

      case 'G':
        channel_model=ETU;
        break;

      default:
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        printf("Unsupported channel model!\n");
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        exit(-1);
      }

      break;

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    /*case 'i':
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      interf1=atoi(optarg);
      break;

    case 'j':
      interf2=atoi(optarg);
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      break;*/
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    case 'n':
      n_trials = atoi(optarg);
      break;

    case 's':
      snr0 = atof(optarg);
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      printf("Setting SNR0 to %f\n",snr0);
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      break;

    case 'S':
      snr1 = atof(optarg);
      snr1set=1;
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      printf("Setting SNR1 to %f\n",snr1);
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      break;

      /*
      case 't':
      Td= atof(optarg);
      break;
      */
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    /*case 'p':
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      extended_prefix_flag=1;
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      break;*/
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      /*
      case 'r':
      ricean_factor = pow(10,-.1*atof(optarg));
      if (ricean_factor>1) {
        printf("Ricean factor must be between 0 and 1\n");
        exit(-1);
      }
      break;
      */
    case 'x':
      transmission_mode=atoi(optarg);

      if ((transmission_mode!=1) &&
          (transmission_mode!=2) &&
          (transmission_mode!=6)) {
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        printf("Unsupported transmission mode %d\n",transmission_mode);
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        exit(-1);
      }

      break;

    case 'y':
      n_tx=atoi(optarg);

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      if ((n_tx==0) || (n_tx>4)) {//extend gNB to support n_tx = 4
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        printf("Unsupported number of tx antennas %d\n",n_tx);
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        exit(-1);
      }

      break;

    case 'z':
      n_rx=atoi(optarg);

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      if ((n_rx==0) || (n_rx>4)) {//extend UE to support n_tx = 4
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        printf("Unsupported number of rx antennas %d\n",n_rx);
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        exit(-1);
      }

      break;

    case 'R':
      N_RB_DL = atoi(optarg);
      break;

    case 'F':
      input_fd = fopen(optarg,"r");

      if (input_fd==NULL) {
        printf("Problem with filename %s\n",optarg);
        exit(-1);
      }

      break;

    case 'P':
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      print_perf=1;
      opp_enabled=1;
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      break;
      
    case 'I':
      run_initial_sync=1;
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      //target_error_rate=0.1;
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      slot = 0;
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      break;

    case 'L':
      loglvl = atoi(optarg);
      break;

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    case 'E':
	css_flag=1;
	break;
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    case 'a':
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      g_rbStart = atoi(optarg);
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      break;

    case 'b':
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      g_rbSize = atoi(optarg);
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      break;
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    case 'd':
      dlsch_threads = atoi(optarg);
      break;    
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    case 'e':
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      g_mcsIndex = atoi(optarg);
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      break;

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    case 'q':
      g_mcsTableIdx = 1;
      get_softmodem_params()->use_256qam_table = 1;
      break;

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    case 'm':
      mu = atoi(optarg);
      break;
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    case 't':
      eff_tp_check = (float)atoi(optarg)/100;
      break;

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    case 'w':
      output_fd = fopen("txdata.dat", "w+");
      break;
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    case 'T':
      enable_ptrs=1;
      for(i=0; i < atoi(optarg); i++) {
        ptrs_arg[i] = atoi(argv[optind++]);
      }
      break;

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    case 'U':
      modify_dmrs = 1;
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      for(i=0; i < atoi(optarg); i++) {
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        dmrs_arg[i] = atoi(argv[optind++]);
      }
      break;
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    default:
    case 'h':
      printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n",
             argv[0]);
      printf("-h This message\n");
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      //printf("-p Use extended prefix mode\n");
      //printf("-d Use TDD\n");
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      printf("-n Number of frames to simulate\n");
      printf("-s Starting SNR, runs from SNR0 to SNR0 + 5 dB.  If n_frames is 1 then just SNR is simulated\n");
      printf("-S Ending SNR, runs from SNR0 to SNR1\n");
      printf("-t Delay spread for multipath channel\n");
      printf("-g [A,B,C,D,E,F,G] Use 3GPP SCM (A,B,C,D) or 36-101 (E-EPA,F-EVA,G-ETU) models (ignores delay spread and Ricean factor)\n");
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      printf("-y Number of TX antennas used in gNB\n");
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      printf("-z Number of RX antennas used in UE\n");
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      //printf("-i Relative strength of first intefering gNB (in dB) - cell_id mod 3 = 1\n");
      //printf("-j Relative strength of second intefering gNB (in dB) - cell_id mod 3 = 2\n");
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      printf("-R N_RB_DL\n");
      printf("-O oversampling factor (1,2,4,8,16)\n");
      printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
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      //printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
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      printf("-f raw file containing RRC configuration (generated by gNB)\n");
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      printf("-F Input filename (.txt format) for RX conformance testing\n");
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      printf("-E used CSS scheduler\n");
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      printf("-o CORESET offset\n");
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      printf("-a Start PRB for PDSCH\n");
      printf("-b Number of PRB for PDSCH\n");
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      printf("-c Start symbol for PDSCH (fixed for now)\n");
      printf("-j Number of symbols for PDSCH (fixed for now)\n");
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      printf("-e MSC index\n");
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      printf("-q Use 2nd MCS table (256 QAM table) for PDSCH\n");
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      printf("-t Acceptable effective throughput (in percentage)\n");
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      printf("-T Enable PTRS, arguments list L_PTRS{0,1,2} K_PTRS{2,4}, e.g. -T 2 0 2 \n");
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      printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:2}, e.g. -U 2 0 2 \n");
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      printf("-P Print DLSCH performances\n");
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      printf("-w Write txdata to binary file (one frame)\n");
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      printf("-d number of dlsch threads, 0: no dlsch parallelization\n");
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      exit (-1);
      break;
    }
  }
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  logInit();
  set_glog(loglvl);
  T_stdout = 1;
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  /* initialize the sin table */
  InitSinLUT();
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  get_softmodem_params()->phy_test = 1;
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  get_softmodem_params()->do_ra = 0;

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  if (snr1set==0)
    snr1 = snr0+10;
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  init_dlsch_tpool(dlsch_threads);
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  RC.gNB = (PHY_VARS_gNB**) malloc(sizeof(PHY_VARS_gNB *));
  RC.gNB[0] = (PHY_VARS_gNB*) malloc(sizeof(PHY_VARS_gNB ));
  memset(RC.gNB[0],0,sizeof(PHY_VARS_gNB));
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  gNB = RC.gNB[0];
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  frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
  frame_parms->nb_antennas_tx = n_tx;
  frame_parms->nb_antennas_rx = n_rx;
  frame_parms->N_RB_DL = N_RB_DL;
  frame_parms->N_RB_UL = N_RB_DL;

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  RC.nb_nr_macrlc_inst = 1;
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  RC.nb_nr_mac_CC = (int*)malloc(RC.nb_nr_macrlc_inst*sizeof(int));
  for (i = 0; i < RC.nb_nr_macrlc_inst; i++)
    RC.nb_nr_mac_CC[i] = 1;
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  mac_top_init_gNB();
  gNB_mac = RC.nrmac[0];
  gNB_RRC_INST rrc;
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  memset((void*)&rrc,0,sizeof(rrc));
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  /*
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  // read in SCGroupConfig
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  AssertFatal(scg_fd != NULL,"no reconfig.raw file\n");
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  char buffer[1024];
  int msg_len=fread(buffer,1,1024,scg_fd);
  NR_RRCReconfiguration_t *NR_RRCReconfiguration;

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  printf("Decoding NR_RRCReconfiguration (%d bytes)\n",msg_len);
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  asn_dec_rval_t dec_rval = uper_decode_complete( NULL,
						  &asn_DEF_NR_RRCReconfiguration,
						  (void **)&NR_RRCReconfiguration,
						  (uint8_t *)buffer,
						  msg_len); 
  
  if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
    AssertFatal(1==0,"NR_RRCReConfiguration decode error\n");
    // free the memory
    SEQUENCE_free( &asn_DEF_NR_RRCReconfiguration, NR_RRCReconfiguration, 1 );
    exit(-1);
  }      
  fclose(scg_fd);

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  AssertFatal(NR_RRCReconfiguration->criticalExtensions.present == NR_RRCReconfiguration__criticalExtensions_PR_rrcReconfiguration,"wrong NR_RRCReconfiguration->criticalExstions.present type\n");

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  NR_RRCReconfiguration_IEs_t *reconfig_ies = NR_RRCReconfiguration->criticalExtensions.choice.rrcReconfiguration;
  NR_CellGroupConfig_t *secondaryCellGroup;
  dec_rval = uper_decode_complete( NULL,
				   &asn_DEF_NR_CellGroupConfig,
				   (void **)&secondaryCellGroup,
				   (uint8_t *)reconfig_ies->secondaryCellGroup->buf,
				   reconfig_ies->secondaryCellGroup->size); 
  
  if ((dec_rval.code != RC_OK) && (dec_rval.consumed == 0)) {
    AssertFatal(1==0,"NR_CellGroupConfig decode error\n");
    // free the memory
    SEQUENCE_free( &asn_DEF_NR_CellGroupConfig, secondaryCellGroup, 1 );
    exit(-1);
  }      
  
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  NR_ServingCellConfigCommon_t *scc = secondaryCellGroup->spCellConfig->reconfigurationWithSync->spCellConfigCommon;
  */
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  rrc.carrier.servingcellconfigcommon = calloc(1,sizeof(*rrc.carrier.servingcellconfigcommon));

  NR_ServingCellConfigCommon_t *scc = rrc.carrier.servingcellconfigcommon;
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  NR_ServingCellConfig_t *scd = calloc(1,sizeof(NR_ServingCellConfig_t));
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  NR_CellGroupConfig_t *secondaryCellGroup=calloc(1,sizeof(*secondaryCellGroup));
  prepare_scc(rrc.carrier.servingcellconfigcommon);
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  uint64_t ssb_bitmap = 1;
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  fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
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  ssb_bitmap = 1;// Enable only first SSB with index ssb_indx=0
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  fix_scc(scc,ssb_bitmap);

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  prepare_scd(scd);
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  fill_default_secondaryCellGroup(scc, scd, secondaryCellGroup, 0, 1, n_tx, 0, 0);
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  /* RRC parameter validation for secondaryCellGroup */
  fix_scd(scd);
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  /* -U option modify DMRS */
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  if(modify_dmrs) {
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    update_dmrs_config(secondaryCellGroup, NULL,dmrs_arg);
  }
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  /* -T option enable PTRS */
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  if(enable_ptrs) {
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    update_ptrs_config(secondaryCellGroup, &rbSize, &mcsIndex, ptrs_arg);
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  }

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  //xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
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  AssertFatal((gNB->if_inst         = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
  gNB->if_inst->NR_PHY_config_req      = nr_phy_config_request;
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  // common configuration
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  rrc_mac_config_req_gNB(0,0,n_tx,1,pusch_tgt_snrx10,pucch_tgt_snrx10,scc,0,0,NULL);
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  // UE dedicated configuration
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  rrc_mac_config_req_gNB(0,0,n_tx,1,pusch_tgt_snrx10,pucch_tgt_snrx10,NULL,1,secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup);
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  // reset preprocessor to the one of DLSIM after it has been set during
  // rrc_mac_config_req_gNB
  gNB_mac->pre_processor_dl = nr_dlsim_preprocessor;
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  phy_init_nr_gNB(gNB,0,0);
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  N_RB_DL = gNB->frame_parms.N_RB_DL;
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  NR_UE_info_t *UE_info = &RC.nrmac[0]->UE_info;
  UE_info->num_UEs=1;

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  // stub to configure frame_parms
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  //  nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,Nid_cell,SSB_positions);
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  // call MAC to configure common parameters

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  /* rrc_mac_config_req_gNB() has created one user, so set the scheduling
   * parameters from command line in global variables that will be picked up by
   * scheduling preprocessor */
  if (g_mcsIndex < 0) g_mcsIndex = 9;
  if (g_rbStart < 0) g_rbStart=0;
  if (g_rbSize < 0) g_rbSize = N_RB_DL - g_rbStart;
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  double fs,bw;

  if (mu == 1 && N_RB_DL == 217) { 
    fs = 122.88e6;
    bw = 80e6;
  }					       
  else if (mu == 1 && N_RB_DL == 245) {
    fs = 122.88e6;
    bw = 90e6;
  }
  else if (mu == 1 && N_RB_DL == 273) {
    fs = 122.88e6;
    bw = 100e6;
  }
  else if (mu == 1 && N_RB_DL == 106) { 
    fs = 61.44e6;
    bw = 40e6;
  }
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  else if (mu == 3 && N_RB_DL == 66) {
    fs = 122.88e6;
    bw = 100e6;
  }
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  else if (mu == 3 && N_RB_DL == 32) {
    fs = 61.44e6;
    bw = 50e6;
  }
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  else AssertFatal(1==0,"Unsupported numerology for mu %d, N_RB %d\n",mu, N_RB_DL);

  gNB2UE = new_channel_desc_scm(n_tx,
                                n_rx,
                                channel_model,
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                                fs/1e6,//sampling frequency in MHz
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				bw,
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				30e-9,
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                                0,
                                0,
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                                0, 0);
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  if (gNB2UE==NULL) {
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    printf("Problem generating channel model. Exiting.\n");
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    exit(-1);
  }

  frame_length_complex_samples = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
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  //frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
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  s_re = malloc(n_tx*sizeof(double*));
  s_im = malloc(n_tx*sizeof(double*));
  r_re = malloc(n_rx*sizeof(double*));
  r_im = malloc(n_rx*sizeof(double*));
  txdata = malloc(n_tx*sizeof(int*));
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  for (i=0; i<n_tx; i++) {
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    s_re[i] = malloc(frame_length_complex_samples*sizeof(double));
    bzero(s_re[i],frame_length_complex_samples*sizeof(double));
    s_im[i] = malloc(frame_length_complex_samples*sizeof(double));
    bzero(s_im[i],frame_length_complex_samples*sizeof(double));

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    printf("Allocating %d samples for txdata\n",frame_length_complex_samples);
    txdata[i] = malloc(frame_length_complex_samples*sizeof(int));
    bzero(txdata[i],frame_length_complex_samples*sizeof(int));
  }

  for (i=0; i<n_rx; i++) {
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    r_re[i] = malloc(frame_length_complex_samples*sizeof(double));
    bzero(r_re[i],frame_length_complex_samples*sizeof(double));
    r_im[i] = malloc(frame_length_complex_samples*sizeof(double));
    bzero(r_im[i],frame_length_complex_samples*sizeof(double));
  }

  if (pbch_file_fd!=NULL) {
    load_pbch_desc(pbch_file_fd);
  }


  //configure UE
  UE = malloc(sizeof(PHY_VARS_NR_UE));
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  memset((void*)UE,0,sizeof(PHY_VARS_NR_UE));
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  PHY_vars_UE_g = malloc(sizeof(PHY_VARS_NR_UE**));
  PHY_vars_UE_g[0] = malloc(sizeof(PHY_VARS_NR_UE*));
  PHY_vars_UE_g[0][0] = UE;
  memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
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  UE->frame_parms.nb_antennas_rx = n_rx;
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  if (run_initial_sync==1)  UE->is_synchronized = 0;
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  else                      {UE->is_synchronized = 1; UE->UE_mode[0]=PUSCH;}
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  UE->perfect_ce = 0;

  if (init_nr_ue_signal(UE, 1, 0) != 0)
  {
    printf("Error at UE NR initialisation\n");
    exit(-1);
  }

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  if(modify_dmrs) {
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    update_dmrs_config( NULL,UE,dmrs_arg);
  }
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  init_nr_ue_transport(UE,0);

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  nr_gold_pbch(UE);
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  nr_gold_pdcch(UE,0);
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  nr_l2_init_ue(NULL);
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  UE_mac = get_mac_inst(0);
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  UE->if_inst = nr_ue_if_module_init(0);
  UE->if_inst->scheduled_response = nr_ue_scheduled_response;
  UE->if_inst->phy_config_request = nr_ue_phy_config_request;
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  UE->if_inst->dl_indication = nr_ue_dl_indication;
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  UE->if_inst->ul_indication = dummy_nr_ue_ul_indication;
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  UE_mac->if_module = nr_ue_if_module_init(0);
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  unsigned int available_bits=0;
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  unsigned char *estimated_output_bit;
  unsigned char *test_input_bit;
  unsigned int errors_bit    = 0;
  uint32_t errors_scrambling = 0;

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  initTpool("N", &(nrUE_params.Tpool), false);
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  test_input_bit       = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
  estimated_output_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
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  // generate signal
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  AssertFatal(input_fd==NULL,"Not ready for input signal file\n");
  gNB->pbch_configured = 1;
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  gNB->ssb[0].ssb_pdu.ssb_pdu_rel15.bchPayload=0x001234;
  gNB->ssb[0].ssb_pdu.ssb_pdu_rel15.SsbBlockIndex = 0;
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  //Configure UE
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  rrc.carrier.MIB = (uint8_t*) malloc(4);
  rrc.carrier.sizeof_MIB = do_MIB_NR(&rrc,0);
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  nr_rrc_mac_config_req_ue(0,0,0,rrc.carrier.mib.message.choice.mib,secondaryCellGroup);
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  nr_dcireq_t dcireq;
  nr_scheduled_response_t scheduled_response;
  memset((void*)&dcireq,0,sizeof(dcireq));
  memset((void*)&scheduled_response,0,sizeof(scheduled_response));
  dcireq.module_id = 0;
  dcireq.gNB_index = 0;
  dcireq.cc_id     = 0;
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  scheduled_response.dl_config = &dcireq.dl_config_req;
  scheduled_response.ul_config = &dcireq.ul_config_req;
  scheduled_response.tx_request = NULL;
  scheduled_response.module_id = 0;
  scheduled_response.CC_id     = 0;
  scheduled_response.frame = frame;
  scheduled_response.slot  = slot;
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  scheduled_response.thread_id = 0;
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933
  nr_ue_phy_config_request(&UE_mac->phy_config);
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  //NR_COMMON_channels_t *cc = RC.nrmac[0]->common_channels;
935
  snrRun = 0;
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  for (SNR = snr0; SNR < snr1; SNR += .2) {
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    varArray_t *table_tx=initVarArray(1000,sizeof(double));
    reset_meas(&gNB->phy_proc_tx); // total gNB tx
    reset_meas(&gNB->dlsch_scrambling_stats);
    reset_meas(&gNB->dlsch_interleaving_stats);
    reset_meas(&gNB->dlsch_rate_matching_stats);
    reset_meas(&gNB->dlsch_segmentation_stats);
    reset_meas(&gNB->dlsch_modulation_stats);
    reset_meas(&gNB->dlsch_encoding_stats);
    reset_meas(&gNB->tinput);
    reset_meas(&gNB->tprep);
    reset_meas(&gNB->tparity);
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    reset_meas(&gNB->toutput);
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    clear_pdsch_stats(gNB);

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    n_errors = 0;
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    effRate = 0;
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    //n_errors2 = 0;
    //n_alamouti = 0;
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    errors_scrambling=0;
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    n_false_positive = 0;
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    if (n_trials== 1) num_rounds = 1;

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    for (trial = 0; trial < n_trials; trial++) {
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      errors_bit = 0;
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      //multipath channel
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      //multipath_channel(gNB2UE,s_re,s_im,r_re,r_im,frame_length_complex_samples,0);
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      UE->rx_offset=0;
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      UE_proc.thread_id  = 0;
      UE_proc.frame_rx   = frame;
      UE_proc.nr_slot_rx = slot;
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      dcireq.frame     = frame;
      dcireq.slot      = slot;
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      NR_UE_DLSCH_t *dlsch0 = UE->dlsch[UE_proc.thread_id][0][0];
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      int harq_pid = slot;
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      NR_DL_UE_HARQ_t *UE_harq_process = dlsch0->harq_processes[harq_pid];

      NR_gNB_DLSCH_t *gNB_dlsch = gNB->dlsch[0][0];
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      nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &gNB_dlsch->harq_process.pdsch_pdu.pdsch_pdu_rel15;
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      UE_harq_process->harq_ack.ack = 0;
      round = 0;
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      UE_harq_process->round = round;
      UE_harq_process->first_tx = 1;
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      while ((round<num_rounds) && (UE_harq_process->harq_ack.ack==0)) {
        memset(RC.nrmac[0]->cce_list[1][0],0,MAX_NUM_CCE*sizeof(int));
        memset(RC.nrmac[0]->cce_list[1][1],0,MAX_NUM_CCE*sizeof(int));
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        clear_nr_nfapi_information(RC.nrmac[0], 0, frame, slot);
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        UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].ndi = !(trial&1);
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        UE_info->UE_sched_ctrl[0].harq_processes[harq_pid].round = round;
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        for (int i=0; i<MAX_NUM_CORESET; i++)
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          gNB_mac->UE_info.num_pdcch_cand[0][i] = 0;
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        if (css_flag == 0) {
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          nr_schedule_ue_spec(0, frame, slot);
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        } else {
          nr_schedule_css_dlsch_phytest(0,frame,slot);
        }
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        Sched_INFO.module_id = 0;
        Sched_INFO.CC_id     = 0;
        Sched_INFO.frame     = frame;
        Sched_INFO.slot      = slot;
        Sched_INFO.DL_req    = &gNB_mac->DL_req[0];
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        Sched_INFO.UL_tti_req    = gNB_mac->UL_tti_req_ahead[slot];
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        Sched_INFO.UL_dci_req  = NULL;
        Sched_INFO.TX_req    = &gNB_mac->TX_req[0];
        nr_schedule_response(&Sched_INFO);
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        /* PTRS values for DLSIM calculations   */
        nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[Sched_INFO.CC_id].dl_tti_request_body;
        nfapi_nr_dl_tti_request_pdu_t  *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[1];
        nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
        pdu_bit_map = pdsch_pdu_rel15->pduBitmap;
1022
        if(pdu_bit_map & 0x1) {
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          set_ptrs_symb_idx(&dlPtrsSymPos,
                            pdsch_pdu_rel15->NrOfSymbols,
                            pdsch_pdu_rel15->StartSymbolIndex,
                            1<<pdsch_pdu_rel15->PTRSTimeDensity,
                            pdsch_pdu_rel15->dlDmrsSymbPos);
          ptrsSymbPerSlot = get_ptrs_symbols_in_slot(dlPtrsSymPos, pdsch_pdu_rel15->StartSymbolIndex, pdsch_pdu_rel15->NrOfSymbols);
          ptrsRePerSymb = ((rel15->rbSize + rel15->PTRSFreqDensity - 1)/rel15->PTRSFreqDensity);
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          printf("[DLSIM] PTRS Symbols in a slot: %2u, RE per Symbol: %3u, RE in a slot %4d\n", ptrsSymbPerSlot,ptrsRePerSymb, ptrsSymbPerSlot*ptrsRePerSymb );
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        }
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        if (run_initial_sync)
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          nr_common_signal_procedures(gNB,frame,slot,gNB->ssb[0].ssb_pdu);
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        else
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          phy_procedures_gNB_TX(gNB,frame,slot,1);
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        int txdataF_offset = (slot%2) * frame_parms->samples_per_slot_wCP;
        
        if (n_trials==1) {
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          LOG_M("txsigF0.m","txsF0=", &gNB->common_vars.txdataF[0][txdataF_offset+2*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
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          if (gNB->frame_parms.nb_antennas_tx>1)
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            LOG_M("txsigF1.m","txsF1=", &gNB->common_vars.txdataF[1][txdataF_offset+2*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
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        }
        int tx_offset = frame_parms->get_samples_slot_timestamp(slot,frame_parms,0);
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        if (n_trials==1) printf("tx_offset %d, txdataF_offset %d \n", tx_offset,txdataF_offset);
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        //TODO: loop over slots
        for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
    
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          if (cyclic_prefix_type == 1) {
            PHY_ofdm_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
                         &txdata[aa][tx_offset],
                         frame_parms->ofdm_symbol_size,
                         12,
                         frame_parms->nb_prefix_samples,
                         CYCLIC_PREFIX);
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          } else {
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            nr_normal_prefix_mod(&gNB->common_vars.txdataF[aa][txdataF_offset],
                                 &txdata[aa][tx_offset],
                                 14,
                                 frame_parms);
          }
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        }
       
        if (n_trials==1) {
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          char filename[100];//LOG_M
          for (aa=0;aa<n_tx;aa++) {
            sprintf(filename,"txsig%d.m", aa);//LOG_M
            LOG_M(filename,"txs", &txdata[aa][tx_offset+frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples0],6*(frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples),1,1);
          }
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        }
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        if (output_fd) {
          printf("writing txdata to binary file\n");
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          fwrite(txdata[0],sizeof(int32_t),frame_length_complex_samples,output_fd);
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        }
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        int txlev[n_tx];
        int txlev_sum = 0;
        int l_ofdm = 6;
        for (aa=0; aa<n_tx; aa++) {
          txlev[aa] = signal_energy(&txdata[aa][tx_offset+l_ofdm*frame_parms->ofdm_symbol_size + (l_ofdm-1)*frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0],
          frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
          txlev_sum += txlev[aa];
          if (n_trials==1) printf("txlev[%d] = %d (%f dB) txlev_sum %d\n",aa,txlev[aa],10*log10((double)txlev[aa]),txlev_sum);
        }
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        for (i=(frame_parms->get_samples_slot_timestamp(slot,frame_parms,0)); 
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             i<(frame_parms->get_samples_slot_timestamp(slot+1,frame_parms,0)); 
             i++) {
    
          for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
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            s_re[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)]);
            s_im[aa][i] = ((double)(((short *)txdata[aa]))[(i<<1)+1]);
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          }
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        }
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        double ts = 1.0/(frame_parms->subcarrier_spacing * frame_parms->ofdm_symbol_size); 
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        //Compute AWGN variance
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        sigma2_dB = 10 * log10((double)txlev_sum * ((double)UE->frame_parms.ofdm_symbol_size/(12*rel15->rbSize))) - SNR;
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        sigma2    = pow(10, sigma2_dB/10);
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        if (n_trials==1) printf("sigma2 %f (%f dB), txlev_sum %f (factor %f)\n",sigma2,sigma2_dB,10*log10((double)txlev_sum),(double)(double)UE->frame_parms.ofdm_symbol_size/(12*rel15->rbSize));
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        for (aa=0; aa<n_rx; aa++) {
          bzero(r_re[aa],frame_length_complex_samples*sizeof(double));
          bzero(r_im[aa],frame_length_complex_samples*sizeof(double));
        }
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        // Apply MIMO Channel
        if (channel_model != AWGN) multipath_tv_channel(gNB2UE,
                             s_re,
                             s_im,
                             r_re,
                             r_im,
                             frame_length_complex_samples,
                             0);

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        for (i=frame_parms->get_samples_slot_timestamp(slot,frame_parms,0); 
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             i<frame_parms->get_samples_slot_timestamp(slot+1,frame_parms,0);
             i++) {

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          for (int aa_rx=0; aa_rx<n_rx; aa_rx++) {
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            if (channel_model == AWGN) {
              // sum up signals from different Tx antennas
              r_re[aa_rx][i] = 0;
              r_im[aa_rx][i] = 0;
              for (aa=0; aa<n_tx; aa++) {
                r_re[aa_rx][i] += s_re[aa][i];
                r_im[aa_rx][i] += s_im[aa][i];
              }
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            }
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            // Add Gaussian noise
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            ((short*) UE->common_vars.rxdata[aa_rx])[2*i]   = (short) ((r_re[aa_rx][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0)));
            ((short*) UE->common_vars.rxdata[aa_rx])[2*i+1] = (short) ((r_im[aa_rx][i] + sqrt(sigma2/2)*gaussdouble(0.0,1.0)));
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            /* Add phase noise if enabled */
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            if (pdu_bit_map & 0x1) {
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              phase_noise(ts, &((short*) UE->common_vars.rxdata[aa_rx])[2*i],
                          &((short*) UE->common_vars.rxdata[aa_rx])[2*i+1]);
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            }
1140
          }
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        }
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        nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
        nr_ue_scheduled_response(&scheduled_response);
        
        phy_procedures_nrUE_RX(UE,
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                               &UE_proc,
                               0,
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                               dlsch_threads,
                               NULL);
1151
        
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        //printf("dlsim round %d ends\n",round);
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        round++;
      } // round
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      //----------------------------------------------------------
      //---------------------- count errors ----------------------
      //----------------------------------------------------------
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      if (UE->dlsch[UE_proc.thread_id][0][0]->last_iteration_cnt >=
        UE->dlsch[UE_proc.thread_id][0][0]->max_ldpc_iterations+1)
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        n_errors++;
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      NR_UE_PDSCH **pdsch_vars = UE->pdsch_vars[UE_proc.thread_id];
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      int16_t *UE_llr = pdsch_vars[0]->llr[0];
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      TBS                  = UE_harq_process->TBS;//rel15->TBSize[0];
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      uint16_t length_dmrs = get_num_dmrs(rel15->dlDmrsSymbPos);
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      uint16_t nb_rb       = rel15->rbSize;
      uint8_t  nb_re_dmrs  = rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4;
      uint8_t  mod_order   = rel15->qamModOrder[0];
      uint8_t  nb_symb_sch = rel15->NrOfSymbols;
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      available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, rel15->nrOfLayers);
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      if(pdu_bit_map & 0x1) {
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        available_bits-= (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2);
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        printf("[DLSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5u \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb *rel15->nrOfLayers* 2) );
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      }
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      for (i = 0; i < available_bits; i++) {
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	if(((gNB_dlsch->harq_process.f[i] == 0) && (UE_llr[i] <= 0)) ||
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	   ((gNB_dlsch->harq_process.f[i] == 1) && (UE_llr[i] >= 0)))
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	  {
	    if(errors_scrambling == 0) {
	      LOG_D(PHY,"\n");
	      LOG_D(PHY,"First bit in error in unscrambling = %d\n",i);
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	    }
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	    errors_scrambling++;
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	  }
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      }
      for (i = 0; i < TBS; i++) {
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	estimated_output_bit[i] = (UE_harq_process->b[i/8] & (1 << (i & 7))) >> (i & 7);
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	test_input_bit[i]       = (gNB_dlsch->harq_process.b[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
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	if (estimated_output_bit[i] != test_input_bit[i]) {
	  if(errors_bit == 0)
	    LOG_D(PHY,"First bit in error in decoding = %d (errors scrambling %d)\n",i,errors_scrambling);
	  errors_bit++;
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	}
	
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      }
      
      ////////////////////////////////////////////////////////////
      
      if (errors_scrambling > 0) {
	if (n_trials == 1)
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	  printf("errors_scrambling = %u/%u (trial %d)\n", errors_scrambling, available_bits,trial);
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      }
      
      if (errors_bit > 0) {
	n_false_positive++;
	if (n_trials == 1)
	  printf("errors_bit = %u (trial %d)\n", errors_bit, trial);
      }
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      roundStats[snrRun]+=((float)round); 
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      if (UE_harq_process->harq_ack.ack==1) effRate += ((float)TBS)/round;
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    } // noise trials
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1222
    blerStats[snrRun] = (float) n_errors / (float) n_trials;
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    roundStats[snrRun]/=((float)n_trials);
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    berStats[snrRun] = (double)errors_scrambling/available_bits/n_trials;
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    effRate /= n_trials;
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    printf("*****************************************\n");
    printf("SNR %f, (false positive %f)\n", SNR,
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           (float) n_errors / (float) n_trials);
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    printf("*****************************************\n");
    printf("\n");
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    dump_pdsch_stats(gNB);
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    printf("SNR %f : n_errors (negative CRC) = %d/%d, Avg round %.2f, Channel BER %e, BLER %.2f, Eff Rate %.4f bits/slot, Eff Throughput %.2f, TBS %u bits/slot\n", SNR, n_errors, n_trials,roundStats[snrRun],berStats[snrRun],blerStats[snrRun],effRate,effRate/TBS*100,TBS);
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    printf("\n");
1234

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    if (print_perf==1) {
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      printf("\ngNB TX function statistics (per %d us slot, NPRB %d, mcs %d, TBS %d, Kr %d (Zc %d))\n",
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	     1000>>*scc->ssbSubcarrierSpacing, g_rbSize, g_mcsIndex,
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	     gNB->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3,
	     gNB->dlsch[0][0]->harq_process.K,
	     gNB->dlsch[0][0]->harq_process.K/((gNB->dlsch[0][0]->harq_process.pdsch_pdu.pdsch_pdu_rel15.TBSize[0]<<3)>3824?22:10));
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      printDistribution(&gNB->phy_proc_tx,table_tx,"PHY proc tx");
      printStatIndent2(&gNB->dlsch_encoding_stats,"DLSCH encoding time");
      printStatIndent3(&gNB->dlsch_segmentation_stats,"DLSCH segmentation time");
      printStatIndent3(&gNB->tinput,"DLSCH LDPC input processing time");
      printStatIndent3(&gNB->tprep,"DLSCH LDPC input preparation time");
      printStatIndent3(&gNB->tparity,"DLSCH LDPC parity generation time");
      printStatIndent3(&gNB->toutput,"DLSCH LDPC output generation time");
      printStatIndent3(&gNB->dlsch_rate_matching_stats,"DLSCH Rate Mataching time");
      printStatIndent3(&gNB->dlsch_interleaving_stats,  "DLSCH Interleaving time");
      printStatIndent2(&gNB->dlsch_modulation_stats,"DLSCH modulation time");
      printStatIndent2(&gNB->dlsch_scrambling_stats,  "DLSCH scrambling time");


      printf("\nUE RX function statistics (per %d us slot)\n",1000>>*scc->ssbSubcarrierSpacing);
      /*
      printDistribution(&phy_proc_rx_tot, table_rx,"Total PHY proc rx");
      printStatIndent(&ue_front_end_tot,"Front end processing");
      printStatIndent(&dlsch_llr_tot,"rx_pdsch processing");
      printStatIndent2(&pdsch_procedures_tot,"pdsch processing");
      printStatIndent2(&dlsch_procedures_tot,"dlsch processing");
      printStatIndent2(&UE->crnti_procedures_stats,"C-RNTI processing");
      printStatIndent(&UE->ofdm_demod_stats,"ofdm demodulation");
      printStatIndent(&UE->dlsch_channel_estimation_stats,"DLSCH channel estimation time");
      printStatIndent(&UE->dlsch_freq_offset_estimation_stats,"DLSCH frequency offset estimation time");
      printStatIndent(&dlsch_decoding_tot, "DLSCH Decoding time ");
      printStatIndent(&UE->dlsch_unscrambling_stats,"DLSCH unscrambling time");
      printStatIndent(&UE->dlsch_rate_unmatching_stats,"DLSCH Rate Unmatching");
      printf("|__ DLSCH Turbo Decoding(%d bits), avg iterations: %.1f       %.2f us (%d cycles, %d trials)\n",
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	     UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Cminus ?
	     UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kminus :
	     UE->dlsch[UE_proc.thread_id][0][0]->harq_processes[0]->Kplus,
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	     UE->dlsch_tc_intl1_stats.trials/(double)UE->dlsch_tc_init_stats.trials,
	     (double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials*timeBase,
	     (int)((double)UE->dlsch_turbo_decoding_stats.diff/UE->dlsch_turbo_decoding_stats.trials),
	     UE->dlsch_turbo_decoding_stats.trials);
      printStatIndent2(&UE->dlsch_tc_init_stats,"init");
      printStatIndent2(&UE->dlsch_tc_alpha_stats,"alpha");
      printStatIndent2(&UE->dlsch_tc_beta_stats,"beta");
      printStatIndent2(&UE->dlsch_tc_gamma_stats,"gamma");
      printStatIndent2(&UE->dlsch_tc_ext_stats,"ext");
      printStatIndent2(&UE->dlsch_tc_intl1_stats,"turbo internal interleaver");
      printStatIndent2(&UE->dlsch_tc_intl2_stats,"intl2+HardDecode+CRC");
      */
    }
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    if (n_trials == 1) {
      
      LOG_M("rxsig0.m","rxs0", UE->common_vars.rxdata[0], frame_length_complex_samples, 1, 1);
      if (UE->frame_parms.nb_antennas_rx>1)
	LOG_M("rxsig1.m","rxs1", UE->common_vars.rxdata[1], frame_length_complex_samples, 1, 1);
      LOG_M("chestF0.m","chF0",UE->pdsch_vars[0][0]->dl_ch_estimates_ext,N_RB_DL*12*14,1,1);
      write_output("rxF_comp.m","rxFc",&UE->pdsch_vars[0][0]->rxdataF_comp0[0][0],N_RB_DL*12*14,1,1);
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      LOG_M("rxF_llr.m","rxFllr",UE->pdsch_vars[UE_proc.thread_id][0]->llr[0],available_bits,1,0);
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      break;
    }

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    if (effRate > (eff_tp_check*TBS)) {
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      printf("PDSCH test OK\n");
      break;
    }

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    snrStats[snrRun] = SNR;
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    snrRun++;
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  } // NSR

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  LOG_M("dlsimStats.m","SNR",snrStats,snrRun,1,7);
  LOG_MM("dlsimStats.m","BLER",blerStats,snrRun,1,7);
  LOG_MM("dlsimStats.m","BER",berStats,snrRun,1,7);
  LOG_MM("dlsimStats.m","rounds",roundStats,snrRun,1,7);
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  /*if (n_trials>1) {
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    printf("HARQ stats:\nSNR\tRounds\n");
    psnr = snr0;
    for (uint8_t i=0; i<snrRun; i++) {
      printf("%.1f\t%.2f\n",psnr,roundStats[i]);
      psnr+=0.2;
    }
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  }*/
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  free_channel_desc_scm(gNB2UE);

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  for (i = 0; i < n_tx; i++) {
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    free(s_re[i]);
    free(s_im[i]);
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    free(txdata[i]);
  }
  for (i = 0; i < n_rx; i++) {
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    free(r_re[i]);
    free(r_im[i]);
  }

  free(s_re);
  free(s_im);
  free(r_re);
  free(r_im);
  free(txdata);
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  free(test_input_bit);
  free(estimated_output_bit);
  
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  if (output_fd)
    fclose(output_fd);

  if (input_fd)
    fclose(input_fd);

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  if (scg_fd)
    fclose(scg_fd);
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  return(n_errors);
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}
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void update_ptrs_config(NR_CellGroupConfig_t *secondaryCellGroup, uint16_t *rbSize, uint8_t *mcsIndex, int8_t *ptrs_arg)
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{
  NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0];
  int *ptrsFreqDenst = calloc(2, sizeof(long));
  ptrsFreqDenst[0]= 25;
  ptrsFreqDenst[1]= 115;
  int *ptrsTimeDenst = calloc(3, sizeof(long));
  ptrsTimeDenst[0]= 2;
  ptrsTimeDenst[1]= 4;
  ptrsTimeDenst[2]= 10;

  int epre_Ratio = 0;
  int reOffset = 0;

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  if(ptrs_arg[0] ==0) {
    ptrsTimeDenst[2]= *mcsIndex -1;
  }
  else if(ptrs_arg[0] == 1) {
    ptrsTimeDenst[1]= *mcsIndex - 1;
    ptrsTimeDenst[2]= *mcsIndex + 1;
  }
  else if(ptrs_arg[0] ==2) {
    ptrsTimeDenst[0]= *mcsIndex - 1;
    ptrsTimeDenst[1]= *mcsIndex + 1;
  }
  else {
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    printf("[DLSIM] Wrong L_PTRS value, using default values 1\n");
  }
  /* L = 4 if Imcs < MCS4 */
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  if(ptrs_arg[1] ==2) {
    ptrsFreqDenst[0]= *rbSize - 1;
    ptrsFreqDenst[1]= *rbSize + 1;
  }
  else if(ptrs_arg[1] == 4) {
    ptrsFreqDenst[1]= *rbSize - 1;
  }
  else {
    printf("[DLSIM] Wrong K_PTRS value, using default values 2\n");
  }
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  printf("[DLSIM] PTRS Enabled with L %d, K %d \n", 1<<ptrs_arg[0], ptrs_arg[1] );
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  /* overwrite the values */
  rrc_config_dl_ptrs_params(bwp, ptrsFreqDenst, ptrsTimeDenst, &epre_Ratio, &reOffset);
}

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void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dmrs_arg)
{
  int8_t  mapping_type = typeA;//default value
  int8_t  add_pos = pdsch_dmrs_pos0;//default value
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  if(dmrs_arg[0] == 0) {
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    mapping_type = typeA;
  }
1403
  else if (dmrs_arg[0] == 1) {
1404
    mapping_type = typeB;
1405 1406
  } else {
    AssertFatal(1==0,"Incorrect Mappingtype, valid options 0-typeA, 1-typeB\n");
1407
  }
1408 1409 1410

  /* Additional DMRS positions 0 ,1 ,2 and 3 */
  if(dmrs_arg[1] >= 0 && dmrs_arg[1] <4 ) {
1411
    add_pos = dmrs_arg[1];
1412 1413
  } else {
    AssertFatal(1==0,"Incorrect Additional Position, valid options 0-pos1, 1-pos1, 2-pos2, 3-pos3\n");
1414
  }
1415

1416
  if(scg != NULL) {
1417
    NR_BWP_Downlink_t *bwp = scg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0];
1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460

    AssertFatal((bwp->bwp_Dedicated->pdsch_Config != NULL && bwp->bwp_Dedicated->pdsch_Config->choice.setup != NULL), "Base RRC reconfig structures are not allocated.\n");

    if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA == NULL) {
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;//calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL;
      printf("DLSIM: Allocated Mapping TypeA in RRC reconfig message\n");
    } else if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB == NULL) {
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB));
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup));
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type=NULL;//calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->scramblingID0=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->scramblingID1=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->phaseTrackingRS=NULL;
      bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_AdditionalPosition = NULL;
      printf("DLSIM: Allocated Mapping TypeB in RRC reconfig message\n");
    }

    struct NR_SetupRelease_DMRS_DownlinkConfig	*dmrs_MappingtypeA = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA;
    struct NR_SetupRelease_DMRS_DownlinkConfig	*dmrs_MappingtypeB = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB;


    NR_DMRS_DownlinkConfig_t *dmrs_config = (mapping_type == typeA) ? dmrs_MappingtypeA->choice.setup : dmrs_MappingtypeB->choice.setup;

    if (add_pos != 2) { // pos0,pos1,pos3
      if (dmrs_config->dmrs_AdditionalPosition == NULL) {
        dmrs_config->dmrs_AdditionalPosition = calloc(1,sizeof(*dmrs_MappingtypeA->choice.setup->dmrs_AdditionalPosition));
      }
      *dmrs_config->dmrs_AdditionalPosition = add_pos;
    } else { // if NULL, Value pos2
      free(dmrs_config->dmrs_AdditionalPosition);
      dmrs_config->dmrs_AdditionalPosition = NULL;
    }

1461
    for (int i=0;i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;i++) {
1462 1463 1464
      bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType = mapping_type; 
    }
  }
1465 1466
  if(ue != NULL) {
    for (int i=0;i<MAX_NR_OF_DL_ALLOCATIONS;i++) {
1467 1468 1469 1470 1471 1472
      ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i]->mappingType = mapping_type;
    }
    ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = add_pos;
  }
  printf("[DLSIM] DMRS Config is modified with Mapping Type %d, Additional Positions %d \n", dmrs_arg[0], dmrs_arg[1] );
}