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Commit 4980ec2c authored by Raymond Knopp's avatar Raymond Knopp
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added support for 1.5/10/20 MHz. 1.5MHz primary synch is still broken (128-bit... 

added support for 1.5/10/20 MHz. 1.5MHz primary synch is still broken (128-bit alignment issue with 128-point DFTs). 1/2 UEs connection seems to work ok for 10/20 MHz.

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@4022 818b1a75-f10b-46b9-bf7c-635c3b92a50f
parent b638562d
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Showing with 121 additions and 101 deletions
openair1/PHY/INIT/lte_init.c
View file @ 4980ec2c
......@@ -1014,7 +1014,7 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
ue_pdsch_vars_mch[eNB_id]->rxdataF_comp = (int **)malloc16(8*sizeof(int*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_mch[eNB_id]->rxdataF_comp[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_mch[eNB_id]->rxdataF_comp[(j<<1)+i] = (int *)malloc16(sizeof(int)*(2+frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_mch[eNB_id]->rho = (int **)malloc16(frame_parms->nb_antennas_rx*sizeof(int*));
......
openair1/PHY/LTE_ESTIMATION/lte_adjust_sync.c
View file @ 4980ec2c
......@@ -11,7 +11,7 @@
#include "ARCH/CBMIMO1/DEVICE_DRIVER/from_grlib_softregs.h"
#endif
//#define DEBUG_PHY
#define DEBUG_PHY
// Adjust location synchronization point to account for drift
// The adjustment is performed once per frame based on the
......@@ -73,7 +73,7 @@ void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_PHY
LOG_D(PHY,"frame %d: rx_offset (after) = %d : max_pos = %d,max_pos_fil = %d\n",phy_vars_ue->frame,phy_vars_ue->rx_offset,max_pos,max_pos_fil);
LOG_D(PHY,"frame %d: rx_offset (after) = %d : max_pos = %d,max_pos_fil = %d (peak %d)\n",phy_vars_ue->frame,phy_vars_ue->rx_offset,max_pos,max_pos_fil,temp);
#endif //DEBUG_PHY
#ifdef CBMIMO1
......
openair1/PHY/LTE_TRANSPORT/dci.c
View file @ 4980ec2c
......@@ -2078,7 +2078,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
if (dci_alloc[i].L == (u8)L) {
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] Generating common DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_common_dci,dci_alloc[i].nCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,*(unsigned int*)dci_alloc[i].dci_pdu);
LOG_I(PHY,"Generating common DCI %d/%d (nCCE %d) of length %d, aggregation %d (%x)\n",i,num_common_dci,dci_alloc[i].nCCE,dci_alloc[i].dci_length,1<<dci_alloc[i].L,*(unsigned int*)dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]);
#endif
......@@ -2094,7 +2094,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
if (dci_alloc[i].L == (u8)L) {
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] Generating UE (rnti %x) specific DCI %d of length %d, aggregation %d, format %d (%x)\n",dci_alloc[i].rnti,i,dci_alloc[i].dci_length,1<<dci_alloc[i].L,dci_alloc[i].format,dci_alloc[i].dci_pdu);
LOG_I(PHY," Generating UE (rnti %x) specific DCI %d of length %d, aggregation %d, format %d (%x)\n",dci_alloc[i].rnti,i,dci_alloc[i].dci_length,1<<dci_alloc[i].L,dci_alloc[i].format,dci_alloc[i].dci_pdu);
dump_dci(frame_parms,&dci_alloc[i]);
#endif
......@@ -2117,7 +2117,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH Modulation, Msymb %d\n",Msymb);
LOG_I(PHY," PDCCH Modulation, Msymb %d\n",Msymb);
#endif
// Now do modulation
if (frame_parms->mode1_flag==1)
......@@ -2165,7 +2165,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
for (i=0;i<Msymb2;i+=2) {
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH Modulation (TX diversity): REG %d\n",i>>2);
LOG_I(PHY," PDCCH Modulation (TX diversity): REG %d\n",i>>2);
#endif
// first antenna position n -> x0
((s16*)&y[0][i])[0] = (*e_ptr == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
......@@ -2189,7 +2189,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
#else
for (i=0;i<Msymb2;i+=2) {
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH Modulation: Symbol %d : REG %d/%d\n",i,i>>2,Msymb2>>2);
LOG_I(PHY," PDCCH Modulation: Symbol %d : REG %d/%d\n",i,i>>2,Msymb2>>2);
#endif
qpsk_table_offset = MOD_TABLE_QPSK_OFFSET; //x0
qpsk_table_offset2 = MOD_TABLE_QPSK_OFFSET; //x0*
......@@ -2233,7 +2233,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH Interleaving\n");
LOG_I(PHY," PDCCH Interleaving\n");
#endif
// msg("y %p (%p,%p), wbar %p (%p,%p)\n",y,y[0],y[1],wbar,wbar[0],wbar[1]);
......@@ -2290,7 +2290,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
if (frame_parms->nb_antennas_tx_eNB > 1)
txdataF[1][tti_offset+i] = wbar[1][mprime];
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset+i,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
LOG_I(PHY," PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset+i,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
#endif
mprime++;
}
......@@ -2307,7 +2307,7 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
if (frame_parms->nb_antennas_tx_eNB > 1)
txdataF[1][tti_offset+i] = wbar[1][mprime];
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset+i,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
LOG_I(PHY," PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset+i,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
#endif
mprime++;
}
......@@ -2317,28 +2317,28 @@ u8 generate_dci_top(u8 num_ue_spec_dci,
if (frame_parms->nb_antennas_tx_eNB > 1)
txdataF[1][tti_offset+0] = wbar[1][mprime];
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
LOG_I(PHY," PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
#endif
mprime++;
txdataF[0][tti_offset+1] = wbar[0][mprime];
if (frame_parms->nb_antennas_tx_eNB > 1)
txdataF[1][tti_offset+1] = wbar[1][mprime];
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset+1,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
LOG_I(PHY," PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset+1,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
#endif
mprime++;
txdataF[0][tti_offset-frame_parms->ofdm_symbol_size+3] = wbar[0][mprime];
if (frame_parms->nb_antennas_tx_eNB > 1)
txdataF[1][tti_offset-frame_parms->ofdm_symbol_size+3] = wbar[1][mprime];
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset-frame_parms->ofdm_symbol_size+3,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
LOG_I(PHY," PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset-frame_parms->ofdm_symbol_size+3,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
#endif
mprime++;
txdataF[0][tti_offset-frame_parms->ofdm_symbol_size+4] = wbar[0][mprime];
if (frame_parms->nb_antennas_tx_eNB > 1)
txdataF[1][tti_offset-frame_parms->ofdm_symbol_size+4] = wbar[1][mprime];
#ifdef DEBUG_DCI_ENCODING
msg("[PHY] PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset-frame_parms->ofdm_symbol_size+4,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
LOG_I(PHY," PDCCH mapping mprime %d => %d (symbol %d re %d) -> (%d,%d)\n",mprime,tti_offset,symbol_offset,re_offset-frame_parms->ofdm_symbol_size+4,*(short*)&wbar[0][mprime],*(1+(short*)&wbar[0][mprime]));
#endif
mprime++;
......@@ -2447,14 +2447,14 @@ void dci_decoding(u8 DCI_LENGTH,
s32 i;
#endif
if (aggregation_level>3) {
msg("[PHY] dci.c: dci_decoding FATAL, illegal aggregation_level %d\n",aggregation_level);
LOG_I(PHY," dci.c: dci_decoding FATAL, illegal aggregation_level %d\n",aggregation_level);
return;
}
coded_bits = 72 * (1<<aggregation_level);
#ifdef DEBUG_DCI_DECODING
msg("[PHY] Doing DCI decoding for %d bits, DCI_LENGTH %d,coded_bits %d, e %p\n",3*(DCI_LENGTH+16),DCI_LENGTH,coded_bits,e);
LOG_I(PHY," Doing DCI decoding for %d bits, DCI_LENGTH %d,coded_bits %d, e %p\n",3*(DCI_LENGTH+16),DCI_LENGTH,coded_bits,e);
#endif
// now do decoding
......@@ -2465,7 +2465,7 @@ void dci_decoding(u8 DCI_LENGTH,
#ifdef DEBUG_DCI_DECODING
msg("[PHY] Doing DCI Rate Matching RCC %d, w %p\n",RCC,w);
LOG_I(PHY," Doing DCI Rate Matching RCC %d, w %p\n",RCC,w);
#endif
lte_rate_matching_cc_rx(RCC,coded_bits,w_rx,dummy_w_rx,e);
......@@ -2476,7 +2476,7 @@ void dci_decoding(u8 DCI_LENGTH,
#ifdef DEBUG_DCI_DECODING
for (i=0;i<16+DCI_LENGTH;i++)
msg("[PHY] DCI %d : (%d,%d,%d)\n",i,*(d_rx+96+(3*i)),*(d_rx+97+(3*i)),*(d_rx+98+(3*i)));
LOG_I(PHY," DCI %d : (%d,%d,%d)\n",i,*(d_rx+96+(3*i)),*(d_rx+97+(3*i)),*(d_rx+98+(3*i)));
#endif
memset(decoded_output,0,2+((16+DCI_LENGTH)>>3));
......@@ -3257,7 +3257,7 @@ u16 dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
// Now check UE_SPEC format 1E_2A_M10PRB search spaces aggregation 1
#ifdef DEBUG_DCI_DECODING
msg("[PHY] MU-MIMO check UE_SPEC format 1E_2A_M10PRB\n");
LOG_I(PHY," MU-MIMO check UE_SPEC format 1E_2A_M10PRB\n");
#endif
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ 4980ec2c
......@@ -215,6 +215,7 @@ void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t
rb_alloc2[1] |= (3<<i);
// printf("rb_alloc2[%d] (type 0) %x ((%x>>%d)&1=%d)\n",(3*i)>>5,rb_alloc2[(3*i)>>5],rb_alloc,i,(rb_alloc>>i)&1);
*/
// printf("rb_alloc[1]=%x,rb_alloc[0]=%x\n",rb_alloc2[1],rb_alloc2[0]);
}
else {
LOG_E(PHY,"resource type 1 not supported for N_RB_DL=100\n");
......@@ -573,7 +574,7 @@ int generate_eNB_dlsch_params_from_dci(uint8_t subframe,
TPC = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->TPC;
harq_pid = ((DCI1A_1_5MHz_TDD_1_6_t *)dci_pdu)->harq_pid;
// printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
// printf("TDD 1A: mcs %d, rballoc %x,rv %d, NPRB %d\n",mcs,rballoc,rv,NPRB);
}
else {
vrb_type = ((DCI1A_1_5MHz_FDD_t *)dci_pdu)->vrb_type;
......@@ -1160,7 +1161,7 @@ int generate_eNB_dlsch_params_from_dci(uint8_t subframe,
msg("dlsch0 eNB: harq_pid %d\n",harq_pid);
msg("dlsch0 eNB: Ndi %d\n",dlsch0->harq_processes[harq_pid]->Ndi);
msg("dlsch0 eNB: rvidx %d\n",dlsch0->harq_processes[harq_pid]->rvidx);
msg("dlsch0 eNB: TBS %d\n",dlsch0->harq_processes[harq_pid]->TBS);
msg("dlsch0 eNB: TBS %d (NPRB %d)\n",dlsch0->harq_processes[harq_pid]->TBS,NPRB);
msg("dlsch0 eNB: mcs %d\n",dlsch0->harq_processes[harq_pid]->mcs);
msg("dlsch0 eNB: tpmi %d\n",tpmi);
msg("dlsch0 eNB: mimo_mode %d\n",dlsch0->harq_processes[harq_pid]->mimo_mode);
......
openair1/PHY/LTE_TRANSPORT/initial_sync.c
View file @ 4980ec2c
......@@ -45,6 +45,8 @@
#include "defs.h"
#include "extern.h"
//#define DEBUG_INITIAL_SYNCH
int pbch_detection(PHY_VARS_UE *phy_vars_ue, runmode_t mode) {
......
openair1/PHY/LTE_TRANSPORT/ulsch_demodulation.c
View file @ 4980ec2c
......@@ -1525,8 +1525,8 @@ void rx_ulsch_emul(PHY_VARS_eNB *phy_vars_eNB,
void dump_ulsch(PHY_VARS_eNB *PHY_vars_eNB,uint8_t subframe, uint8_t UE_id) {
uint32_t nsymb = (PHY_vars_eNB->lte_frame_parms.Ncp == 0) ? 14 : 12;
uint8_t harq_pid = subframe2harq_pid(&PHY_vars_eNB->lte_frame_parms,0,subframe);
printf("Dumping ULSCH with harq_pid %d, for NB_rb %d, mcs %d, Qm %d, N_symb %d\n", harq_pid,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->nb_rb,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs,get_Qm_ul(PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs),PHY_vars_eNB->ulsch_eNB[UE_id]->Nsymb_pusch);
uint8_t harq_pid = subframe2harq_pid(&PHY_vars_eNB->lte_frame_parms,PHY_vars_eNB->frame,subframe);
printf("Dumping ULSCH in subframe %d with harq_pid %d, for NB_rb %d, mcs %d, Qm %d, N_symb %d\n", subframe,harq_pid,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->nb_rb,PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs,get_Qm_ul(PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->mcs),PHY_vars_eNB->ulsch_eNB[UE_id]->Nsymb_pusch);
write_output("/tmp/ulsch_d.m","ulsch_dseq",&PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->d[0][96],
PHY_vars_eNB->ulsch_eNB[UE_id]->harq_processes[harq_pid]->Kplus*3,1,0);
write_output("/tmp/rxsig0.m","rxs0", &PHY_vars_eNB->lte_eNB_common_vars.rxdata[0][0][0],PHY_vars_eNB->lte_frame_parms.samples_per_tti*10,1,1);
......
openair1/PHY/MODULATION/slot_fep.c
View file @ 4980ec2c
......@@ -83,7 +83,7 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
if (l==0) {
rx_offset = sample_offset + slot_offset + nb_prefix_samples0 + subframe_offset - SOFFSET;
// Align with 128 bit
// rx_offset = rx_offset - rx_offset % 4;
rx_offset = rx_offset - rx_offset % 4;
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((short *)&ue_common_vars->rxdata[aa][frame_length_samples],
(short *)&ue_common_vars->rxdata[aa][0],
......@@ -113,7 +113,7 @@ int slot_fep(PHY_VARS_UE *phy_vars_ue,
(frame_parms->ofdm_symbol_size+nb_prefix_samples0+nb_prefix_samples) +
(frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1) + subframe_offset - SOFFSET;
// rx_offset = rx_offset - (rx_offset % 4);
rx_offset = rx_offset - (rx_offset % 4);
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((short *)&ue_common_vars->rxdata[aa][frame_length_samples],
......
openair1/SCHED/phy_procedures_lte_eNb.c
View file @ 4980ec2c
......@@ -2710,16 +2710,8 @@ void phy_procedures_eNB_RX(unsigned char last_slot,PHY_VARS_eNB *phy_vars_eNB,u8
phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round++;
LOG_D(PHY,"[UE][PUSCH %d] Increasing to round %d\n",harq_pid,phy_vars_eNB->ulsch_eNB[i]->harq_processes[harq_pid]->round);
// phy_vars_eNB->ulsch_eNB[i]->o_ACK[0] = 0;
// phy_vars_eNB->ulsch_eNB[i]->o_ACK[1] = 0;
/*
#ifdef OAI_EMU
if (abstraction_flag == 0)
dump_ulsch(phy_vars_eNB, last_slot>>1, i);
#endif
*/
// dump_ulsch(phy_vars_eNB, last_slot>>1, i);
// exit(-1);
if (phy_vars_eNB->ulsch_eNB[i]->Msg3_flag == 1) {
LOG_D(PHY,"[eNB %d][RAPROC] frame %d, slot %d, subframe %d, UE %d: Error receiving ULSCH (Msg3), round %d/%d\n",
......
openair1/SIMULATION/ETH_TRANSPORT/netlink_init.c
View file @ 4980ec2c
......@@ -39,14 +39,14 @@ int netlink_init(void)
nas_sock_fd = socket(PF_NETLINK, SOCK_RAW,GRAAL_NETLINK_ID);
if (nas_sock_fd == -1) {
printf("[NETLINK] Error opening socket %d (%d:%s)\n",nas_sock_fd,errno, strerror(errno));
exit(1);
// exit(1);
}
printf("[NETLINK]Opened socket with fd %d\n",nas_sock_fd);
ret = fcntl(nas_sock_fd,F_SETFL,O_NONBLOCK);
if (ret == -1) {
printf("[NETLINK] Error fcntl (%d:%s)\n",errno, strerror(errno));
exit(1);
// exit(1);
}
memset(&nas_src_addr, 0, sizeof(nas_src_addr));
......
openair1/SIMULATION/LTE_PHY/Makefile
View file @ 4980ec2c
......@@ -9,7 +9,7 @@ OPENAIR1_TOP = $(OPENAIR1_DIR)
OPENAIR2_TOP = $(OPENAIR2_DIR)
OPENAIR3 = $(OPENAIR3_DIR)
CFLAGS = -g -O -Wno-strict-aliasing -rdynamic -Wall -DPHYSIM -DNODE_RG -DUSER_MODE -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TXRX=2 -DNB_ANTENNAS_TX=2 -DPHY_CONTEXT=1 $(CPUFLAGS) -DMALLOC_CHECK_=1 # -Wno-packed-bitfield-compat
CFLAGS = -g -O2 -Wno-strict-aliasing -rdynamic -Wall -DPHYSIM -DNODE_RG -DUSER_MODE -DNB_ANTENNAS_RX=2 -DNB_ANTENNAS_TXRX=2 -DNB_ANTENNAS_TX=2 -DPHY_CONTEXT=1 $(CPUFLAGS) -DMALLOC_CHECK_=1 # -Wno-packed-bitfield-compat
# DCI Debug
......@@ -27,7 +27,7 @@ CFLAGS += -DLLR8
endif
CFLAGS += -DNEW_FFT
LFLAGS = -lm -lblas -lxml2 -lrt $(LFDS_DIR)/bin/liblfds611.a
LFLAGS = -lm -lblas -lxml2 -lrt -lpthread $(LFDS_DIR)/bin/liblfds611.a
ifdef GPIB
LFLAGS += -lgpib
......
openair1/SIMULATION/LTE_PHY/dlsim.c
View file @ 4980ec2c
......@@ -791,7 +791,7 @@ int main(int argc, char **argv) {
for (k=0;k<n_users;k++) {
// Create transport channel structures for 2 transport blocks (MIMO)
for (i=0;i<2;i++) {
PHY_vars_eNB->dlsch_eNB[k][i] = new_eNB_dlsch(1,8,N_RB_DL, 0);
PHY_vars_eNB->dlsch_eNB[k][i] = new_eNB_dlsch(1,8,N_RB_DL,0);
if (!PHY_vars_eNB->dlsch_eNB[k][i]) {
printf("Can't get eNB dlsch structures\n");
......@@ -947,7 +947,7 @@ int main(int argc, char **argv) {
}
memcpy(&dci_alloc[num_dci].dci_pdu[0],&DLSCH_alloc_pdu_1[k],dci_length_bytes);
dci_alloc[num_dci].dci_length = dci_length;
dci_alloc[num_dci].L = 2;
dci_alloc[num_dci].L = 1;
dci_alloc[num_dci].rnti = n_rnti+k;
dci_alloc[num_dci].format = format1;
dump_dci(&PHY_vars_eNB->lte_frame_parms,&dci_alloc[num_dci]);
......@@ -1441,7 +1441,7 @@ int main(int argc, char **argv) {
subframe);
if (num_pdcch_symbols_2 > num_pdcch_symbols) {
msg("Error: given num_pdcch_symbols not big enough\n");
msg("Error: given num_pdcch_symbols not big enough (%d > %d)\n",num_pdcch_symbols_2,num_pdcch_symbols);
exit(-1);
}
......@@ -1654,6 +1654,7 @@ int main(int argc, char **argv) {
if (awgn_flag == 0) {
multipath_channel(eNB2UE[0],s_re,s_im,r_re,r_im,
2*frame_parms->samples_per_tti,hold_channel);
// printf("amc: ****************** eNB2UE[%d]->n_rx = %d,dd %d\n",round,eNB2UE[round]->nb_rx,eNB2UE[round]->channel_offset);
if(abstx==1)
if(round==0 && hold_channel==0){
random_channel(eNB2UE[1]);
......
openair1/SIMULATION/LTE_PHY/pdcchsim.c
View file @ 4980ec2c
......@@ -437,7 +437,7 @@ DCI_PDU *get_dci(LTE_DL_FRAME_PARMS *lte_frame_parms,u8 log2L, u8 log2Lcommon, u
// add ue specific dci
DCI_pdu.dci_alloc[1].dci_length = dci_length;
DCI_pdu.dci_alloc[1].L = 0;
DCI_pdu.dci_alloc[1].L = 1;
DCI_pdu.dci_alloc[1].rnti = rnti;
DCI_pdu.dci_alloc[1].format = format1;
DCI_pdu.dci_alloc[1].ra_flag = 0;
......@@ -798,8 +798,8 @@ int main(int argc, char **argv) {
PHY_vars_eNB->ulsch_eNB[0] = new_eNB_ulsch(8,MAX_TURBO_ITERATIONS,0);
PHY_vars_UE->ulsch_ue[0] = new_ue_ulsch(8,0);
PHY_vars_eNB->ulsch_eNB[0] = new_eNB_ulsch(8,MAX_TURBO_ITERATIONS,N_RB_DL,0);
PHY_vars_UE->ulsch_ue[0] = new_ue_ulsch(8,N_RB_DL,0);
if (input_fd==NULL) {
......
openair1/SIMULATION/LTE_PHY/ulsim.c
View file @ 4980ec2c
......@@ -213,6 +213,7 @@ int main(int argc, char **argv) {
uint8_t max_turbo_iterations=4;
uint8_t llr8_flag=0;
int nb_rb_set = 0;
reset_meas(&ts);
start_meas(&ts);
......@@ -330,6 +331,7 @@ int main(int argc, char **argv) {
break;
case 'r':
nb_rb = atoi(optarg);
nb_rb_set = 1;
break;
case 'f':
first_rb = atoi(optarg);
......@@ -400,6 +402,9 @@ int main(int argc, char **argv) {
}
lte_param_init(1,n_rx,1,extended_prefix_flag,N_RB_DL,frame_type,tdd_config,osf);
if (nb_rb_set == 0)
nb_rb = PHY_vars_eNB->lte_frame_parms.N_RB_UL;
printf("1 . rxdataF_comp[0] %p\n",PHY_vars_eNB->lte_eNB_pusch_vars[0]->rxdataF_comp[0][0]);
printf("Setting mcs = %d\n",mcs);
printf("n_frames = %d\n", n_frames);
......@@ -731,7 +736,7 @@ int main(int argc, char **argv) {
PHY_vars_eNB->frame = PHY_vars_UE->frame;
harq_pid = subframe2harq_pid(&PHY_vars_UE->lte_frame_parms,PHY_vars_UE->frame,subframe);
printf("UL frame %d, harq_pid %d\n",PHY_vars_UE->frame,harq_pid);
printf("UL frame %d/subframe %d, harq_pid %d\n",PHY_vars_UE->frame,subframe,harq_pid);
if (input_fdUL == NULL) {
input_buffer_length = PHY_vars_UE->ulsch_ue[0]->harq_processes[harq_pid]->TBS/8;
input_buffer = (unsigned char *)malloc(input_buffer_length+4);
......
openair1/SIMULATION/TOOLS/random_channel.c
View file @ 4980ec2c
......@@ -723,7 +723,7 @@ int random_channel(channel_desc_t *desc) {
struct complex phase, alpha, beta;
if ((desc->nb_tx>NB_ANTENNAS_TX) || (desc->nb_rx > NB_ANTENNAS_RX)) {
msg("random_channel.c: Error: temporary buffer for channel not big enough\n");
msg("random_channel.c: Error: temporary buffer for channel not big enough (%d,%d)\n",desc->nb_tx,desc->nb_rx);
return(-1);
}
......
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