Merge branch 'integration_2022_wk19b' into 'develop'

integration_2022_wk19b See merge request oai/openairinterface5g!1555 MR !1357: Bupt UL-MIMO MR !1516: NR handling 2-port PMI report MR !1454: Implementation of multiple dedicated BWPs MR !1556: Fix RAN-gNB-nrUE-MONO-TDD-Band78-N300 pipeline

Merge branch 'integration_2022_wk19b' into 'develop'
integration_2022_wk19b See merge request oai/openairinterface5g!1555 MR !1357: Bupt UL-MIMO MR !1516: NR handling 2-port PMI report MR !1454: Implementation of multiple dedicated BWPs MR !1556: Fix RAN-gNB-nrUE-MONO-TDD-Band78-N300 pipeline
5bf454c7 · Robert Schmidt · 50d9c1f2 · 22944fb8 · 5bf454c7 · 5bf454c7
Commit 5bf454c7 authored May 17, 2022 by Robert Schmidt
100 changed files
--- a/ci-scripts/cls_physim.py
+++ b/ci-scripts/cls_physim.py
@@ -168,7 +168,7 @@ class PhySim:

 		mySSH.close()
 		#check build status and update HTML object
-		lHTML = html.HTMLManagement()
+		lHTML = cls_oai_html.HTMLManagement()
 		lHTML=self.__CheckBuild_PhySim(htmlObj,constObj)
 		return lHTML

@@ -186,6 +186,6 @@ class PhySim:
 		mySSH.command(self.__workSpacePath+'ran_build/build/ldpctest ' + self.runargs + ' >> '+self.__runLogFile, '\$', 30)
 		mySSH.close()
 		#return updated HTML to main
-		lHTML = html.HTMLManagement()
+		lHTML = cls_oai_html.HTMLManagement()
 		lHTML=self.__CheckResults_PhySim(htmlObj,constObj,testcase_id)
 		return lHTML
--- a/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf
+++ b/ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf
@@ -38,7 +38,7 @@ gNBs =
    ////////// Physical parameters:

    ssb_SubcarrierOffset                                      = 0;
-    pdsch_AntennaPorts_N1                                     = 2;
+    pdsch_AntennaPorts_XP                                     = 2;
    pusch_AntennaPorts                                        = 2;

    pdcch_ConfigSIB1 = (

--- a/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf
+++ b/ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf
@@ -39,7 +39,7 @@ gNBs =
    ////////// Physical parameters:

    ssb_SubcarrierOffset                                      = 0;
-    pdsch_AntennaPorts_N1                                     = 2;
+    pdsch_AntennaPorts_XP                                     = 2;
    pusch_AntennaPorts                                        = 2;

    pdcch_ConfigSIB1 = (

--- a/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf
+++ b/ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf
@@ -20,7 +20,7 @@ gNBs =
    ////////// Physical parameters:

    ssb_SubcarrierOffset                                      = 31; //0;
-    pdsch_AntennaPorts_N1                                     = 2;
+    pdsch_AntennaPorts_XP                                     = 2;
    pusch_AntennaPorts                                        = 2;
    ul_prbblacklist                                           = "51,52,53,54"


--- a/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf
+++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf
@@ -38,7 +38,7 @@ gNBs =
    ////////// Physical parameters:

    ssb_SubcarrierOffset                                      = 0;
-    pdsch_AntennaPorts_N1                                     = 2;
+    pdsch_AntennaPorts_XP                                     = 2;
    pusch_AntennaPorts                                        = 2;
    ul_prbblacklist                                           = "51,52,53,54"
    do_SRS                                                    = 1;

--- a/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf
+++ b/ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf
@@ -38,7 +38,7 @@ gNBs =
    ////////// Physical parameters:

    ssb_SubcarrierOffset                                      = 0;
-    pdsch_AntennaPorts_N1                                     = 2;
+    pdsch_AntennaPorts_XP                                     = 2;
    pusch_AntennaPorts                                        = 2;
    #pusch_TargetSNRx10                                        = 200;
    #pucch_TargetSNRx10                                        = 200;

--- a/ci-scripts/datalog_rt_stats.default.yaml
+++ b/ci-scripts/datalog_rt_stats.default.yaml
@@ -15,7 +15,8 @@ Ref :
  DLSCH encoding : 230.0
  L1 Rx processing : 175.0
  PUSCH inner-receiver : 100.0
-  PUSCH decoding : 180.0 
+  #PUSCH decoding : 180.0
+  PUSCH decoding : 240.0
  DL & UL scheduling timing stats : 37.0
  UL Indication : 38.0
 Threshold :

--- a/ci-scripts/ran.py
+++ b/ci-scripts/ran.py
@@ -383,17 +383,19 @@ class RANManagement():


 		# If tracer options is on, running tshark on EPC side and capture traffic b/ EPC and eNB
-		localEpcIpAddr = EPC.IPAddress
-		localEpcUserName = EPC.UserName
-		localEpcPassword = EPC.Password
-		mySSH.open(localEpcIpAddr, localEpcUserName, localEpcPassword)
-		eth_interface = 'any'
-		fltr = 'sctp'
-		logging.debug('\u001B[1m Launching tshark on interface ' + eth_interface + ' with filter "' + fltr + '"\u001B[0m')
-		self.epcPcapFile = 'enb_' + self.testCase_id + '_s1log.pcap'
-		mySSH.command('echo ' + localEpcPassword + ' | sudo -S rm -f /tmp/' + self.epcPcapFile , '\$', 5)
-		mySSH.command('echo $USER; nohup sudo tshark -f "host ' + lIpAddr +'" -i ' + eth_interface + ' -f "' + fltr + '" -w /tmp/' + self.epcPcapFile + ' > /tmp/tshark.log 2>&1 &', localEpcUserName, 5)
-		mySSH.close()
+		if EPC.IPAddress != "none":
+			localEpcIpAddr = EPC.IPAddress
+			localEpcUserName = EPC.UserName
+			localEpcPassword = EPC.Password
+			mySSH.open(localEpcIpAddr, localEpcUserName, localEpcPassword)
+			eth_interface = 'any'
+			fltr = 'sctp'
+			logging.debug('\u001B[1m Launching tshark on interface ' + eth_interface + ' with filter "' + fltr + '"\u001B[0m')
+			self.epcPcapFile = 'enb_' + self.testCase_id + '_s1log.pcap'
+			mySSH.command('echo ' + localEpcPassword + ' | sudo -S rm -f /tmp/' + self.epcPcapFile , '\$', 5)
+			mySSH.command('echo $USER; nohup sudo tshark -f "host ' + lIpAddr +'" -i ' + eth_interface + ' -f "' + fltr + '" -w /tmp/' + self.epcPcapFile + ' > /tmp/tshark.log 2>&1 &', localEpcUserName, 5)
+			mySSH.close()
+
 		mySSH.open(lIpAddr, lUserName, lPassWord)
 		mySSH.command('cd ' + lSourcePath, '\$', 5)
 		# Initialize_eNB_args usually start with -O and followed by the location in repository

--- a/ci-scripts/xml_files/gnb_phytest_usrp_run.xml
+++ b/ci-scripts/xml_files/gnb_phytest_usrp_run.xml
@@ -24,7 +24,7 @@
 	<htmlTabRef>gNB-PHY-Test</htmlTabRef>
 	<htmlTabName>Run-gNB-PHY-Test</htmlTabName>
 	<htmlTabIcon>tasks</htmlTabIcon>
-	<repeatCount>3</repeatCount>
+	<repeatCount>1</repeatCount>
 	<TestCaseRequestedList>
 090101 000001 090109
 	</TestCaseRequestedList>
@@ -33,7 +33,7 @@
 	<testCase id="090101">
 		<class>Initialize_eNB</class>
 		<desc>Initialize gNB USRP</desc>
-		<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf --phy-test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106 --log_config.global_log_options level,nocolor,time</Initialize_eNB_args>
+		<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf --phy-test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106 --usrp-tx-thread-config 1 --log_config.global_log_options level,nocolor,time</Initialize_eNB_args>
 		<air_interface>NR</air_interface>
 		<USRP_IPAddress>192.168.20.2</USRP_IPAddress>
 	</testCase>

--- a/cmake_targets/CMakeLists.txt
+++ b/cmake_targets/CMakeLists.txt
@@ -2842,6 +2842,7 @@ target_link_libraries(ldpctest
 add_executable(nr_dlschsim
  ${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c
  ${OPENAIR_DIR}/common/utils/nr/nr_common.c
+  ${OPENAIR_DIR}/executables/softmodem-common.c
  ${T_SOURCE}
  ${SHLIB_LOADER_SOURCES}
  )
@@ -2865,6 +2866,7 @@ target_link_libraries(nr_pbchsim
 add_executable(nr_pucchsim
  ${OPENAIR1_DIR}/SIMULATION/NR_PHY/pucchsim.c
  ${OPENAIR_DIR}/common/utils/nr/nr_common.c
+  ${OPENAIR_DIR}/executables/softmodem-common.c
  ${T_SOURCE}
  ${SHLIB_LOADER_SOURCES}
  )
@@ -2909,6 +2911,7 @@ target_link_libraries(nr_prachsim
 add_executable(nr_ulschsim
  ${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulschsim.c
  ${OPENAIR_DIR}/common/utils/nr/nr_common.c
+  ${OPENAIR_DIR}/executables/softmodem-common.c
  ${PHY_INTERFACE_DIR}/queue_t.c
  ${T_SOURCE}
  ${SHLIB_LOADER_SOURCES}

--- a/cmake_targets/autotests/test_case_list.xml
+++ b/cmake_targets/autotests/test_case_list.xml
@@ -1184,9 +1184,10 @@
    
    <testCase id="015108">
      <class>execution</class>
-      <desc>nr_ulschsim Test cases. (Test1: 106 PRB),
-                                    (Test2: 217 PRB),
-                                    (Test3: 273 PRB)</desc>
+      <desc>nr_ulschsim Test cases. (Test1: 106 PRBs),
+                                    (Test2: 217 PRBs),
+                                    (Test3: 273 PRBs)
+                                    (Test4: 106 PRBs 4-layer MIMO)</desc>
      <pre_compile_prog></pre_compile_prog>
      <compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
      <compile_prog_args> --phy_simulators  -c </compile_prog_args>
@@ -1195,8 +1196,9 @@
      <main_exec> $OPENAIR_DIR/targets/bin/nr_ulschsim.Rel15</main_exec>
      <main_exec_args>-R 106 -m9 -s13 -n100
                      -R 217 -m15 -s15 -n100
-                      -R 273 -m19 -s20 -n100</main_exec_args>
-      <tags>nr_ulschsim.test1 nr_ulschsim.test2 nr_ulschsim.test3</tags>
+                      -R 273 -m19 -s20 -n100
+                      -R 106 -m9 -s13 -n100 -y4 -z4 -W4</main_exec_args>
+      <tags>nr_ulschsim.test1 nr_ulschsim.test2 nr_ulschsim.test3 nr_ulschsim.test4</tags>
      <search_expr_true>PUSCH test OK</search_expr_true>
      <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
      <nruns>3</nruns>
@@ -1304,7 +1306,9 @@
                                 (Test12: SC-FDMA, 216 PRBs),
                                 (Test13: SC-FDMA, 273 PRBs),
                                 (Test14: SC-FDMA, 3 DMRS),
-                                 (Test15: MCS 16 50 PRBs 2 RX_Antenna)</desc>
+                                 (Test15: MCS 19 50 PRBs 2 RX_Antenna)
+                                 (Test16: MCS 9 106 PRBs MIMO 2 layers)
+                                 (Test17: MCS 9 106 PRBs MIMO 4 layers)</desc>
      <pre_compile_prog></pre_compile_prog>
      <compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
      <compile_prog_args> --phy_simulators  -c </compile_prog_args>
@@ -1320,14 +1324,16 @@
                      -n100 -s5 -T 2 1 2 -U 2 0 2
                      -n100 -s5 -T 2 2 2 -U 2 1 2
                      -n100 -s5 -a4 -b8 -T 2 1 2 -U 2 1 3
-                      -n100 -s5 -Z
+                      -n100 -Z -s5
                      -n100 -s5 -Z -r75
                      -n50 -s5 -Z -r216 -R217
                      -n50 -s5 -Z -r270 -R273
                      -n100 -s5 -Z -U 2 0 2
-                      -n100 -m16 -s10 -z2</main_exec_args>
+                      -n100 -m19 -s10 -S15 -z2
+                      -n100 -m9 -r106 -s10 -W2 -y2 -z2
+                      -n100 -m9 -r106 -s20 -W4 -y4 -z4</main_exec_args>

-      <tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15</tags>
+      <tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15 nr_ulsim.test16 nr_ulsim.test17</tags>
      <search_expr_true>PUSCH test OK</search_expr_true>
      <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
      <nruns>3</nruns>

--- a/common/utils/ocp_itti/intertask_interface.cpp
+++ b/common/utils/ocp_itti/intertask_interface.cpp
@@ -450,6 +450,7 @@ extern "C" {
  void itti_wait_tasks_end(void) {
    shutting_down = false;
    signal(SIGTERM, catch_sigterm);
+    //signal(SIGINT, catch_sigterm);
    while (! shutting_down)
    {
      sleep(24 * 3600);

--- a/doc/FEATURE_SET.md
+++ b/doc/FEATURE_SET.md
@@ -332,6 +332,9 @@ The following features are valid for the gNB and the 5G-NR UE.
  - evalution of RSRP report
  - evaluation of CQI report
 - MAC scheduling of SR reception
+- Bandwidth part (BWP) operation
+  - Handle multiple dedicated BWPs
+  - BWP switching through RRCReconfiguration method

 **gNB RLC**
 - Send/Receive operations according to 38.322 Rel.16
@@ -493,6 +496,8 @@ The following features are valid for the gNB and the 5G-NR UE.
   - Configuration of fapi PDU according to DCI
 * Scheduler procedures for SRS transmission
   - Periodic SRS transmission
+* Bandwidth part (BWP) operation
+   - Operation in configured dedicated BWP through RRCSetup or RRCReconfiguration


 **UE RLC**

--- a/doc/RUNMODEM.md
+++ b/doc/RUNMODEM.md
@@ -207,7 +207,24 @@ UE on machine 2:

 `sudo ./nr-uesoftmodem --if_freq 2169080000 --if_freq_off -400000000`

+# MIMO configuration

+<table style="border-collapse: collapse; border: none;">
+  <tr style="border-collapse: collapse; border: none;">
+    <td style="border-collapse: collapse; border: none;">
+         <img src="./images/mimo_antenna_ports.png" alt="" border=3 height=100 width=300>
+         </img>
+    </td>
+  </tr>
+</table>
+
+This image shows an example of gNB 5G MIMO logical antenna port configuration. It has to be noted that logical antenna ports might not directly correspond to physical antenna ports and each logical antenna port might consist of a sub-array of antennas.
+
+The basic element is a dual-polarized antenna, therefore the minimal DL MIMO setup with two logical antenna ports would consist of two cross-polarized antenna elements. In a single panel configuration, as the one in the picture, this element can be repeated vertiacally and/or horizontally to form an equi-spaced 1D or 2D array. The values N1 and N2 represent the number of antenna ports in the two dimensions and the supported configurations are specified in Section 5.2.2.2.1 of TS 38.214.
+
+The DL logical antenna port configuration can be selected through configuration file. `pdsch_AntennaPorts_N1` can be used to set N1 parameter, `pdsch_AntennaPorts_N2` to set N2 and `pdsch_AntennaPorts_XP` to set the cross-polarization configuration (1 for single pol, 2 for cross-pol). To be noted that if XP is 1 but N1 and/or N2 are larger than 1, this would result in a non-standard configuration and the PMI selected would be the identity matrix regardless of CSI report. The default value for each of these parameters is 1.
+
+# Additional links

 [Selecting an alternative ldpc implementation at run time](../openair1/PHY/CODING/DOC/LDPCImplementation.md)


--- a/doc/RUN_NR_multiple_BWPs.md
+++ b/doc/RUN_NR_multiple_BWPs.md
+# Procedure to add dedicated Bandwidth part (BWP)
+
+## Contributed by 5G Testbed IISc 
+
+### Developers: Abhijith A, Shruthi S
+
+# Terminology #
+
+## Bandwidth part (BWP) ##
+Bandwidth Part (BWP) is a set of contiguous Resource Blocks in the resource grid. 
+
+Parameters of a BWP are communicated to UE using RRC parameters: BWP-Downlink and BWP-Uplink. 
+
+A UE can be configured with a set of 4 BWPs in uplink (UL) and downlink (DL) direction (3GPP TS 38.331 Annex B.2 Description of BWP configuration options). But only 1 BWP can be active in UL and DL direction at a given time.
+
+# Procedure to run multiple dedicated BWPs #
+
+A maximum of 4 dedicated BWPs can be configured for a UE.
+
+To configure multiple BWPs, add the following parameters to the gNB configuration file under "servingCellConfigDedicated": 
+
+## Setup of the Configuration files ##
+```
+    firstActiveDownlinkBWP-Id = 1;  #BWP-Id
+    defaultDownlinkBWP-Id     = 1;  #BWP-Id
+    firstActiveUplinkBWP-Id   = 1;  #BWP-Id
+```
+
+Each dedicated BWP must have:
+```
+    # BWP 1 Configuration
+    dl_bwp-Id_1 = 1;
+    dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
+    # subcarrierSpacing
+    # 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
+    dl_bwp1_subcarrierSpacing = 1;
+```   
+
+ Find these parameters in this configuration file: "targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf"
+     
+# Testing gNB and UE in RF simulator
+
+## gNB command:
+```
+    sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf --gNBs.[0].min_rxtxtime 6 --rfsim --sa
+```
+
+## UE command:
+```
+    sudo RFSIMULATOR=127.0.0.1 ./nr-uesoftmodem -r 106 --numerology 1 --band 78 -C 3619200000 --nokrnmod --rfsim --sa --uicc0.imsi 208990000000001
+```
\ No newline at end of file
--- a/doc/UL_MIMO.txt
+++ b/doc/UL_MIMO.txt
+# how to build phy sim
+cd cmake_targets/
+sudo ./build_oai --phy_simulators -c
+
+cd phy_simulators/build/
+# ULSCH sim  
+# bit level validation                   
+# PUSCH encoding and decoding for 4 layers   2 CMD without data
+sudo ./nr_ulschsim -R 106 -m9 -s13 -n100 -y4 -z4 -W4
+
+# UL sim
+# Uplink chain validation  
+# PUSCH on UE side and gNB side,whole chain for PUSCH
+# No channel model on data domain signal
+# No cross-path connection
+# PMI = 0  is only unitary prcoding matrix
+sudo ./nr_ulsim -n100 -m9 -r106 -s13 -W4 -y4 -z4   
+
+# How to build rfsim
+sudo ./build_oai -c --gNB --nrUE -w SIMU
+
+# How to run with rfsim
+# 4x4 RANK 4
+sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf --rfsim --phy-test --l 2  --L 4
+sudo ./nr-uesoftmodem  --rfsim --phy-test --ue-nb-ant-rx 4 --ue-nb-ant-tx 4
+# 4x4 RANK 2
+sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf --rfsim --phy-test --l 2  --L 2
+sudo ./nr-uesoftmodem  --rfsim --phy-test --ue-nb-ant-rx 4 --ue-nb-ant-tx 4
+
+
+
--- a/doc/images/mimo_antenna_ports.png
+++ b/doc/images/mimo_antenna_ports.png
--- a/executables/nr-softmodem-common.h
+++ b/executables/nr-softmodem-common.h
@@ -66,6 +66,7 @@
 #define CONFIG_HLP_ITTIL         "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
 #define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
 #define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n"
+#define CONFIG_HLP_ULNL_PHYTEST "Set the uplink nrOfLayers for PHYTEST mode\n"
 #define CONFIG_HLP_STMON         "Enable processing timing measurement of lte softmodem on per subframe basis \n"
 #define CONFIG_HLP_MSLOTS        "Skip the missed slots/subframes \n"
 #define CONFIG_HLP_ULMCS_PHYTEST "Set the uplink MCS for PHYTEST mode\n"

--- a/executables/nr-softmodem.c
+++ b/executables/nr-softmodem.c
@@ -839,10 +839,10 @@ int main( int argc, char **argv ) {
  }

  for (int inst = 0; inst < NB_RU; inst++) {
+    kill_NR_RU_proc(inst);
    nr_phy_free_RU(RC.ru[inst]);
  }

-  free_lte_top();
  pthread_cond_destroy(&sync_cond);
  pthread_mutex_destroy(&sync_mutex);
  pthread_cond_destroy(&nfapi_sync_cond);

--- a/executables/nr-softmodem.h
+++ b/executables/nr-softmodem.h
@@ -22,6 +22,7 @@
    {"E" ,                    CONFIG_HLP_TQFS,        PARAMFLAG_BOOL,   i8ptr:&threequarter_fs,             defintval:0,                   TYPE_INT8,   0},        \
    {"m" ,                    CONFIG_HLP_DLMCS_PHYTEST,0,               uptr:&target_dl_mcs,                defintval:0,                   TYPE_UINT,   0},        \
    {"l" ,                    CONFIG_HLP_DLNL_PHYTEST,0,                uptr:&target_dl_Nl,                 defintval:0,                   TYPE_UINT,   0},        \
+    {"L" ,                    CONFIG_HLP_ULNL_PHYTEST,0,                uptr:&target_ul_Nl,                 defintval:0,                   TYPE_UINT,   0},        \
    {"t" ,                    CONFIG_HLP_ULMCS_PHYTEST,0,               uptr:&target_ul_mcs,                defintval:0,                   TYPE_UINT,   0},        \
    {"M" ,                    CONFIG_HLP_DLBW_PHYTEST,0,                uptr:&target_dl_bw,                 defintval:0,                   TYPE_UINT,   0},        \
    {"T" ,                    CONFIG_HLP_ULBW_PHYTEST,0,                uptr:&target_ul_bw,                 defintval:0,                   TYPE_UINT,   0},        \
@@ -36,6 +37,7 @@
 extern threads_t threads;
 extern uint32_t target_dl_mcs;
 extern uint32_t target_dl_Nl;
+extern uint32_t target_ul_Nl;
 extern uint32_t target_ul_mcs;
 extern uint32_t target_dl_bw;
 extern uint32_t target_ul_bw;

--- a/executables/nr-ue.c
+++ b/executables/nr-ue.c
@@ -613,7 +613,7 @@ void processSlotTX(void *arg) {
  int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
  uint8_t gNB_id = 0;

-  LOG_D(PHY,"%d.%d => slot type %d\n",proc->frame_tx,proc->nr_slot_tx,tx_slot_type);
+  LOG_D(PHY,"processSlotTX %d.%d => slot type %d\n",proc->frame_tx,proc->nr_slot_tx,tx_slot_type);
  if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){

    // trigger L2 to run ue_scheduler thru IF module
@@ -713,7 +713,8 @@ void processSlotRX(void *arg) {
      LOG_D(PHY, "Sending Uplink data \n");
      nr_ue_pusch_common_procedures(UE,
                                    proc->nr_slot_tx,
-                                    &UE->frame_parms,1);
+                                    &UE->frame_parms,
+                                    UE->frame_parms.nb_antennas_tx);
    }

    if (UE->UE_mode[gNB_id] > NOT_SYNCHED && UE->UE_mode[gNB_id] < PUSCH) {

--- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
+++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
@@ -10,7 +10,8 @@
 #define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS          64
 // Constants Defined in 38.213
 #define FAPI_NR_MAX_CORESET_PER_BWP                3
-#define FAPI_NR_MAX_SS                             10
+#define FAPI_NR_MAX_SS_PER_BWP                     10
+#define FAPI_NR_MAX_SS                             FAPI_NR_MAX_SS_PER_BWP*NR_MAX_NUM_BWP


 /// RX_IND

--- a/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+++ b/nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
@@ -308,6 +308,7 @@ typedef struct
  uint8_t  transform_precoding;
  uint16_t data_scrambling_id;
  uint8_t  nrOfLayers;
+  uint8_t  Tpmi;
  //DMRS
  uint16_t  ul_dmrs_symb_pos;
  uint8_t  dmrs_config_type;

--- a/openair1/PHY/INIT/nr_init.c
+++ b/openair1/PHY/INIT/nr_init.c
@@ -136,7 +136,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
        }
      }

-      int max_mimo_layers =(CSI_RS_antenna_ports<NR_MAX_NB_LAYERS) ? CSI_RS_antenna_ports : NR_MAX_NB_LAYERS;
+      int max_mimo_layers = (CSI_RS_antenna_ports<NR_MAX_NB_LAYERS) ? CSI_RS_antenna_ports : NR_MAX_NB_LAYERS;

      gNB->nr_mimo_precoding_matrix = (int32_t ***)malloc16(max_mimo_layers* sizeof(int32_t **));
      int32_t ***mat = gNB->nr_mimo_precoding_matrix;
@@ -236,7 +236,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
                if((llb != ll) || (mmb != mm) || ((N1 == 1) && (N2 == 1))){
                  pmiq += 1;
                  mat[1][pmiq] = (int32_t *)malloc16((2*N1*N2)*(2)*sizeof(int32_t));
-                  LOG_I(PHY, "layer 2 Codebook pmiq = %d\n",pmiq);
+                  LOG_D(PHY, "layer 2 Codebook pmiq = %d\n",pmiq);
                  for(int j_col=0; j_col<2; j_col++) {
                    if (j_col==0) {
                      llc = llb;
@@ -320,7 +320,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
                  if((llb != ll) || (mmb != mm)){
                    pmiq += 1;
                    mat[2][pmiq] = (int32_t *)malloc16((2*N1*N2)*(3)*sizeof(int32_t));
-                    LOG_I(PHY, "layer 3 Codebook pmiq = %d\n",pmiq);
+                    LOG_D(PHY, "layer 3 Codebook pmiq = %d\n",pmiq);
                    for(int j_col=0; j_col<3; j_col++) {
                      if (j_col==0) {
                        llc = llb;
@@ -411,7 +411,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
                  if((llb != ll) || (mmb != mm)){
                    pmiq += 1;
                    mat[3][pmiq] = (int32_t *)malloc16((2*N1*N2)*4*sizeof(int32_t));
-                    LOG_I(PHY, "layer 4 pmiq = %d\n",pmiq);
+                    LOG_D(PHY, "layer 4 pmiq = %d\n",pmiq);
                    for(int j_col=0; j_col<4; j_col++) {
                      if (j_col==0) {
                        llc = llb;
@@ -688,11 +688,19 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
    pusch_vars[ULSCH_id]->ul_ch_magb0           = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
    pusch_vars[ULSCH_id]->ul_ch_mag             = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
    pusch_vars[ULSCH_id]->ul_ch_magb            = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
-    pusch_vars[ULSCH_id]->rho                   = (int32_t **)malloc16_clear(n_buf*sizeof(int32_t*) );
+    pusch_vars[ULSCH_id]->rho                   = (int32_t ***)malloc16_clear(Prx*sizeof(int32_t**) );
+    pusch_vars[ULSCH_id]->llr_layers            = (int16_t **)malloc16(max_ul_mimo_layers*sizeof(int32_t *) );

    for (i=0; i<Prx; i++) {
      pusch_vars[ULSCH_id]->rxdataF_ext[i]           = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
      pusch_vars[ULSCH_id]->rxdataF_ext2[i]          = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
+      pusch_vars[ULSCH_id]->rho[i]                   = (int32_t **)malloc16_clear(NR_MAX_NB_LAYERS*NR_MAX_NB_LAYERS*sizeof(int32_t*));
+
+      for (int j=0; j< max_ul_mimo_layers; j++) {
+        for (int k=0; k<max_ul_mimo_layers; k++) {
+          pusch_vars[ULSCH_id]->rho[i][j*max_ul_mimo_layers+k]=(int32_t *)malloc16_clear( sizeof(int32_t) * fp->N_RB_UL*12*7*2 );
+        }
+      }
    }
    for (i=0; i<n_buf; i++) {
      pusch_vars[ULSCH_id]->ul_ch_estimates[i]       = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2*fp->symbols_per_slot );
@@ -706,7 +714,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
      pusch_vars[ULSCH_id]->ul_ch_magb0[i]           = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
      pusch_vars[ULSCH_id]->ul_ch_mag[i]             = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
      pusch_vars[ULSCH_id]->ul_ch_magb[i]            = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
-      pusch_vars[ULSCH_id]->rho[i]                   = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
+    }
+
+    for (i=0; i< max_ul_mimo_layers; i++) {
+      pusch_vars[ULSCH_id]->llr_layers[i] = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
    }
    pusch_vars[ULSCH_id]->llr = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
    pusch_vars[ULSCH_id]->ul_valid_re_per_slot  = (int16_t *)malloc16_clear( sizeof(int16_t)*fp->symbols_per_slot);
@@ -823,9 +834,16 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)

  NR_gNB_PUSCH** pusch_vars = gNB->pusch_vars;
  for (int ULSCH_id=0; ULSCH_id<gNB->number_of_nr_ulsch_max; ULSCH_id++) {
+    for (int i=0; i< max_ul_mimo_layers; i++)
+      free_and_zero(pusch_vars[ULSCH_id]->llr_layers[i]);
    for (int i = 0; i < Prx; i++) {
      free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext[i]);
      free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2[i]);
+      for (int j=0; j< max_ul_mimo_layers; j++) {
+        for (int k=0; k<max_ul_mimo_layers; k++)
+          free_and_zero(pusch_vars[ULSCH_id]->rho[i][j*max_ul_mimo_layers+k]);
+      }
+      free_and_zero(pusch_vars[ULSCH_id]->rho[i]);
    }
    for (int i = 0; i < n_buf; i++) {
      free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates[i]);
@@ -839,8 +857,8 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
      free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb0[i]);
      free_and_zero(pusch_vars[ULSCH_id]->ul_ch_mag[i]);
      free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb[i]);
-      free_and_zero(pusch_vars[ULSCH_id]->rho[i]);
    }
+    free_and_zero(pusch_vars[ULSCH_id]->llr_layers);
    free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext);
    free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2);
    free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates);

--- a/openair1/PHY/INIT/nr_init_ru.c
+++ b/openair1/PHY/INIT/nr_init_ru.c
@@ -41,7 +41,7 @@ int nr_phy_init_RU(RU_t *ru) {
  int p;
  int re;

-  LOG_I(PHY,"Initializing RU signal buffers (if_south %s) nb_tx %d\n",ru_if_types[ru->if_south],ru->nb_tx);
+  LOG_I(PHY,"Initializing RU signal buffers (if_south %s) nb_tx %d, nb_rx %d\n",ru_if_types[ru->if_south],ru->nb_tx, ru->nb_rx);

  nfapi_nr_config_request_scf_t *cfg;
  ru->nb_log_antennas=0;
@@ -205,12 +205,11 @@ void nr_phy_free_RU(RU_t *ru)
 	free_and_zero(ru->prach_rxsigF[j][i]);
      free_and_zero(ru->prach_rxsigF[j]);
    }
-
    if (ru->do_precoding == 1) {
      for (i = 0; i < ru->num_gNB; i++) {
        for (p = 0; p < ru->nb_log_antennas; p++) {
-            for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
-            free_and_zero(ru->beam_weights[i][p]);
+          for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
+          free_and_zero(ru->beam_weights[i][p]);
        }
      }
      for(i=0; i< ru->nb_tx; ++i)

--- a/openair1/PHY/INIT/nr_init_ue.c
+++ b/openair1/PHY/INIT/nr_init_ue.c
@@ -497,7 +497,7 @@ void term_nr_ue_transport(PHY_VARS_NR_UE *ue)
      for (int k = 0; k < RX_NB_TH_MAX; k++) {
        free_nr_ue_dlsch(&ue->dlsch[k][i][j], N_RB_DL);
        if (j==0)
-          free_nr_ue_ulsch(&ue->ulsch[k][i], N_RB_DL);
+          free_nr_ue_ulsch(&ue->ulsch[k][i], N_RB_DL, &ue->frame_parms);
      }
    }

@@ -518,7 +518,7 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue) {
        AssertFatal((ue->dlsch[k][i][j]  = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL))!=NULL,"Can't get ue dlsch structures\n");
        LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[k][i][j]);
        if (j==0) {
-          AssertFatal((ue->ulsch[k][i] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES))!=NULL,"Can't get ue ulsch structures\n");
+          AssertFatal((ue->ulsch[k][i] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES,&ue->frame_parms))!=NULL,"Can't get ue ulsch structures\n");
          LOG_D(PHY,"ulsch[%d][%d] => %p\n",k,i,ue->ulsch[k][i]);
        }
      }

--- a/openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+++ b/openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
--- a/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+++ b/openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
@@ -39,9 +39,11 @@
 #include "nr_refsig.h"
 #include "PHY/defs_gNB.h"

-/*Table 7.4.1.1.2-1/2 from 38.211 */
+// Table 6.4.1.1.3-1/2 from TS 38.211
+int delta1[8] = {0, 0, 1, 1, 0, 0, 1, 1};
 int wf1[8][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1}};
 int wt1[8][2] = {{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1}};
+int delta2[12] = {0, 0, 2, 2, 4, 4, 0, 0, 2, 2, 4, 4};
 int wf2[12][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1}};
 int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1}};

@@ -49,6 +51,13 @@ int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1
 short nr_rx_mod_table[14]  = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
 short nr_rx_nmod_table[14] = {0,0,-23170,23170,23170,-23170,-23170,23170,-23170,-23170,23170,23170,23170,-23170};

+int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p) {
+  if (dmrs_config_type == pusch_dmrs_type1) {
+    return delta1[p];
+  } else {
+    return delta2[p];
+  }
+}

 int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
                     unsigned int Ns,

--- a/openair1/PHY/NR_REFSIG/nr_refsig.h
+++ b/openair1/PHY/NR_REFSIG/nr_refsig.h
@@ -42,6 +42,8 @@ void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);

 void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);

+int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p);
+
 int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
                     unsigned int Ns,
                     unsigned int *nr_gold_pusch,

--- a/openair1/PHY/NR_TRANSPORT/nr_scrambling.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_scrambling.c
@@ -52,6 +52,7 @@ void nr_codeword_scrambling(uint8_t *in,
    ((uint16_t*)&in32)[0] = _mm_movemask_epi8(_mm_slli_epi16(in128[0],7));
    ((uint16_t*)&in32)[1] = _mm_movemask_epi8(_mm_slli_epi16(in128[1],7));
    out[i]=(in32^s);
+    LOG_D(PHY,"in[%d] %x => %x\n",i,in32,out[i]);
    s=lte_gold_generic(&x1, &x2, 0);
  }
 //#elsif defined(__arm__) || defined(__aarch64)

--- a/openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
@@ -136,21 +136,22 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
    @param nb_rb_pusch The number of RBs allocated (used for Resource Allocation Type 1 in NR)
    @param frame_parms, Pointer to frame descriptor structure
 */
-void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
-                                 NR_gNB_PUSCH *pusch_vars,
-                                 int slot,
-                                 unsigned char symbol,
-                                 uint8_t is_dmrs_symbol,
-                                 nfapi_nr_pusch_pdu_t *pusch_pdu,
-                                 NR_DL_FRAME_PARMS *frame_parms);
+void nr_ulsch_extract_rbs(int32_t **rxdataF,
+                          NR_gNB_PUSCH *pusch_vars,
+                          int slot,
+                          unsigned char symbol,
+                          uint8_t is_dmrs_symbol,
+                          nfapi_nr_pusch_pdu_t *pusch_pdu,
+                          NR_DL_FRAME_PARMS *frame_parms);

 void nr_ulsch_scale_channel(int32_t **ul_ch_estimates_ext,
                            NR_DL_FRAME_PARMS *frame_parms,
                            NR_gNB_ULSCH_t *ulsch_gNB,
-                            uint8_t symbol,
-                            uint8_t start_symbol,
-                            uint16_t nb_rb,
-                            pusch_dmrs_type_t pusch_dmrs_type);
+                            uint8_t symbol, 
+                            uint8_t is_dmrs_symbol,                           
+                            uint32_t len,
+                            uint8_t nrOfLayers,
+                            uint16_t nb_rb);

 /** \brief This function computes the average channel level over all allocated RBs and antennas (TX/RX) in order to compute output shift for compensated signal
    @param ul_ch_estimates_ext Channel estimates in allocated RBs
@@ -184,9 +185,10 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
                                int **ul_ch_mag,
                                int **ul_ch_magb,
                                int **rxdataF_comp,
-                                int **rho,
+                                int ***rho,
                                NR_DL_FRAME_PARMS *frame_parms,
                                unsigned char symbol,
+                                int length,
                                uint8_t is_dmrs_symbol,
                                unsigned char mod_order,
                                uint8_t  nrOfLayers,
@@ -254,8 +256,8 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
    @param mod_order modulation order
 */
 void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
-                          int32_t **ul_ch_mag,
-                          int32_t **ul_ch_magb,
+                          int32_t *ul_ch_mag,
+                          int32_t *ul_ch_magb,
                          int16_t  *ulsch_llr,
                          uint32_t nb_rb,
                          uint32_t nb_re,

--- a/openair1/PHY/NR_TRANSPORT/nr_ulsch.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch.c
@@ -85,6 +85,33 @@ void nr_ulsch_unscrambling(int16_t* llr, uint32_t size, uint32_t Nid, uint32_t n
  nr_codeword_unscrambling(llr, size, 0, Nid, n_RNTI);
 }

+void nr_ulsch_layer_demapping(int16_t *llr_cw,
+				     uint8_t Nl,
+				     uint8_t mod_order,
+				     uint32_t length,
+				     int16_t **llr_layers) 
+{
+
+  switch (Nl) {
+    case 1:
+      memcpy((void*)llr_cw, (void*)llr_layers[0], (length)*sizeof(int16_t));
+      break;
+    case 2:
+    case 3:
+    case 4:
+      for (int i=0; i<(length/Nl/mod_order); i++) {
+        for (int l=0; l<Nl; l++) {
+          for (int m=0; m<mod_order; m++) {
+            llr_cw[i*Nl*mod_order+l*mod_order+m] = llr_layers[l][i*mod_order+m];
+          }
+        }
+      }
+      break;
+  default:
+  AssertFatal(0, "Not supported number of layers %d\n", Nl);
+  }
+}
+
 void dump_pusch_stats(FILE *fd,PHY_VARS_gNB *gNB) {

  for (int i=0;i<gNB->number_of_nr_ulsch_max;i++) {

--- a/openair1/PHY/NR_TRANSPORT/nr_ulsch.h
+++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch.h
@@ -71,6 +71,12 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,

 void nr_ulsch_unscrambling(int16_t* llr, uint32_t size, uint32_t Nid, uint32_t n_RNTI);

+void nr_ulsch_layer_demapping(int16_t *llr_cw,
+				     uint8_t Nl,
+				     uint8_t mod_order,
+				     uint32_t length,
+				     int16_t **llr_layers); 
+
 void nr_ulsch_procedures(PHY_VARS_gNB *gNB,
                         int frame_rx,
                         int slot_rx,

--- a/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
@@ -57,8 +57,7 @@
 void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr, uint16_t N_RB_UL)
 {

-  int i,r;
-  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS;  //number of segments to be allocated
+  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS;  //number of segments to be allocated
  NR_gNB_ULSCH_t *ulsch = *ulschptr;

  if (N_RB_UL != 273) {
@@ -66,17 +65,18 @@ void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr, uint16_t N_RB_UL)
    a_segments = a_segments/273 +1;
  }

-  for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
+  for (int i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
    if (ulsch->harq_processes[i]) {
      if (ulsch->harq_processes[i]->b) {
        free_and_zero(ulsch->harq_processes[i]->b);
        ulsch->harq_processes[i]->b = NULL;
      }
-      for (r=0; r<a_segments; r++) {
+      for (int r=0; r<a_segments; r++) {
        free_and_zero(ulsch->harq_processes[i]->c[r]);
        free_and_zero(ulsch->harq_processes[i]->d[r]);
-        free_and_zero(ulsch->harq_processes[i]->w[r]);
      }
+      free_and_zero(ulsch->harq_processes[i]->c);
+      free_and_zero(ulsch->harq_processes[i]->d);
      free_and_zero(ulsch->harq_processes[i]);
      ulsch->harq_processes[i] = NULL;
    }
@@ -90,7 +90,7 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations, uint16_t N_RB_UL)

  NR_gNB_ULSCH_t *ulsch;
  uint8_t i,r;
-  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS;  //number of segments to be allocated
+  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS;  //number of segments to be allocated

  if (N_RB_UL != 273) {
    a_segments = a_segments*N_RB_UL;
@@ -107,10 +107,11 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations, uint16_t N_RB_UL)

    ulsch->harq_processes[i] = (NR_UL_gNB_HARQ_t *)malloc16_clear(sizeof(NR_UL_gNB_HARQ_t));
    ulsch->harq_processes[i]->b = (uint8_t*)malloc16_clear(ulsch_bytes);
+    ulsch->harq_processes[i]->c = (uint8_t**)malloc16_clear(a_segments*sizeof(uint8_t *));
+    ulsch->harq_processes[i]->d = (int16_t**)malloc16_clear(a_segments*sizeof(int16_t *));
    for (r=0; r<a_segments; r++) {
      ulsch->harq_processes[i]->c[r] = (uint8_t*)malloc16_clear(8448*sizeof(uint8_t));
      ulsch->harq_processes[i]->d[r] = (int16_t*)malloc16_clear((68*384)*sizeof(int16_t));
-      ulsch->harq_processes[i]->w[r] = (int16_t*)malloc16_clear((3*(6144+64))*sizeof(int16_t));
    }
  }

@@ -168,8 +169,6 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
        ulsch->harq_processes[i]->C=0;
        /// Pointers to code blocks after LDPC coding (38.212 V15.4.0 section 5.3.2)
        //int16_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
-        /// LDPC processing buffer
-        //t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_NR_ULSCH_SEGMENTS];
        ulsch->harq_processes[i]->Z=0;
        /// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
        //int16_t e[MAX_NUM_NR_ULSCH_SEGMENTS][3*8448];
@@ -259,9 +258,12 @@ void nr_processULSegment(void* arg) {

  //////////////////////////// ulsch_llr =====> ulsch_harq->e //////////////////////////////

+  /// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
+  int16_t harq_e[3*8448];
+
  nr_deinterleaving_ldpc(E,
                         Qm,
-                         ulsch_harq->e[r],
+                         harq_e,
                         ulsch_llr+r_offset);

  //for (int i =0; i<16; i++)
@@ -270,16 +272,7 @@ void nr_processULSegment(void* arg) {
  stop_meas(&phy_vars_gNB->ulsch_deinterleaving_stats);


-  /*LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
-        harq_pid,r, G,
-        Kr*3,
-        ulsch_harq->TBS,
-        Qm,
-        nb_rb,
-        n_layers,
-        pusch_pdu->pusch_data.rv_index,
-        ulsch_harq->round);*/
-  //////////////////////////////////////////////////////////////////////////////////////////
+ //////////////////////////////////////////////////////////////////////////////////////////


  //////////////////////////////////////////////////////////////////////////////////////////
@@ -294,7 +287,7 @@ void nr_processULSegment(void* arg) {
                               p_decoderParms->BG,
                               p_decoderParms->Z,
                               ulsch_harq->d[r],
-                               ulsch_harq->e[r],
+                               harq_e,
                               ulsch_harq->C,
                               rv_index,
                               ulsch_harq->new_rx,
@@ -357,13 +350,13 @@ void nr_processULSegment(void* arg) {

  if (check_crc((uint8_t*)llrProcBuf,length_dec,ulsch_harq->F,crc_type)) {
 #ifdef PRINT_CRC_CHECK
-      LOG_I(PHY, "Segment %d CRC OK, iterations %d/%d\n",r,no_iteration_ldpc,max_ldpc_iterations);
+      LOG_I(PHY,"Segment %d CRC OK, iterations %d/%d\n",r,no_iteration_ldpc,max_ldpc_iterations);
 #endif
    rdata->decodeIterations = no_iteration_ldpc;
    if (rdata->decodeIterations > p_decoderParms->numMaxIter) rdata->decodeIterations--;
  } else {
 #ifdef PRINT_CRC_CHECK
-      LOG_I(PHY, "CRC NOK\n");
+      LOG_I(PHY,"CRC NOK\n");
 #endif
    rdata->decodeIterations = max_ldpc_iterations + 1;
  }
@@ -449,7 +442,8 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,

  A   = (harq_process->TBS)<<3;

-  LOG_D(NR_PHY, "ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d, Coderate %d\n", harq_pid, A, G, mcs, n_layers, nb_rb, Qm, n_layers, R);
+  LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, Coderate %d RV %d round %d\n",
+        harq_pid, A, G, mcs, n_layers, nb_rb, Qm, R, pusch_pdu->pusch_data.rv_index, harq_process->round);

  if (R<1024)
    Coderate = (float) R /(float) 1024;
@@ -543,7 +537,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,

  r_offset = 0;

-  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS;  //number of segments to be allocated
+  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*n_layers;  //number of segments to be allocated

  if (nb_rb != 273) {
    a_segments = a_segments*nb_rb;

--- a/openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
--- a/openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
+++ b/openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
@@ -64,7 +64,7 @@ void nr_ulsch_qpsk_llr(int32_t *rxdataF_comp,
 //----------------------------------------------------------------------------------------------

 void nr_ulsch_16qam_llr(int32_t *rxdataF_comp,
-                        int32_t **ul_ch_mag,
+                        int32_t *ul_ch_mag,
                        int16_t  *ulsch_llr,
                        uint32_t nb_rb,
                        uint32_t nb_re,
@@ -110,12 +110,12 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp,

 #if defined(__x86_64__) || defined(__i386__)
 #ifdef __AVX2__
-    ch_mag = (__m256i*)&ul_ch_mag[0][(symbol*(off+(nb_rb*12)))];
+    ch_mag = (__m256i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
 #else
-    ch_mag = (__m128i*)&ul_ch_mag[0][(symbol*(off+(nb_rb*12)))];
+    ch_mag = (__m128i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
 #endif
 #elif defined(__arm__)
-  ch_mag = (int16x8_t*)&ul_ch_mag[0][(symbol*nb_rb*12)];
+  ch_mag = (int16x8_t*)&ul_ch_mag[(symbol*nb_rb*12)];
 #endif

 #ifdef __AVX2__
@@ -231,8 +231,8 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp,
 //----------------------------------------------------------------------------------------------

 void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
-                        int32_t **ul_ch_mag,
-                        int32_t **ul_ch_magb,
+                        int32_t *ul_ch_mag,
+                        int32_t *ul_ch_magb,
                        int16_t  *ulsch_llr,
                        uint32_t nb_rb,
                        uint32_t nb_re,
@@ -265,15 +265,15 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,

 #if defined(__x86_64__) || defined(__i386__)
 #ifdef __AVX2__
-  ch_mag = (__m256i*)&ul_ch_mag[0][(symbol*(off+(nb_rb*12)))];
-  ch_magb = (__m256i*)&ul_ch_magb[0][(symbol*(off+(nb_rb*12)))];
+  ch_mag = (__m256i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
+  ch_magb = (__m256i*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
 #else
-  ch_mag = (__m128i*)&ul_ch_mag[0][(symbol*nb_rb*12)];
-  ch_magb = (__m128i*)&ul_ch_magb[0][(symbol*nb_rb*12)];
+  ch_mag = (__m128i*)&ul_ch_mag[(symbol*nb_rb*12)];
+  ch_magb = (__m128i*)&ul_ch_magb[(symbol*nb_rb*12)];
 #endif
 #elif defined(__arm__)
-  ch_mag = (int16x8_t*)&ul_ch_mag[0][(symbol*nb_rb*12)];
-  ch_magb = (int16x8_t*)&ul_ch_magb[0][(symbol*nb_rb*12)];
+  ch_mag = (int16x8_t*)&ul_ch_mag[(symbol*nb_rb*12)];
+  ch_magb = (int16x8_t*)&ul_ch_magb[(symbol*nb_rb*12)];
 #endif

 #ifdef __AVX2__
@@ -471,8 +471,8 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,


 void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
-                          int32_t **ul_ch_mag,
-                          int32_t **ul_ch_magb,
+                          int32_t *ul_ch_mag,
+                          int32_t *ul_ch_magb,
                          int16_t *ulsch_llr,
                          uint32_t nb_rb,
                          uint32_t nb_re,

--- a/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c
+++ b/openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c
@@ -148,7 +148,7 @@ short filt8_dcr0_h[8]= {
 0,4096,8192,12288,16384,0,0,0};

 short filt8_l1[8] = {
-24576,16384,0,0,0,0,0,0};
+24576,16384,8192,0,0,0,0,0};

 short filt8_ml1[8] = {
 -8192,0,8192,16384,8192,0,0,0};
@@ -163,10 +163,10 @@ short filt8_mm1[8]= {
 0,0,0,0,8192,16384,8192,0};

 short filt8_dcl1[8]= {
-0,0,0,16384,12288,8192,4096,0};
+0,0,16384,12288,8192,4096,0,0};

 short filt8_dcr1[8]= {
-0,0,0,0,4096,8192,12288,16384};
+0,0,0,4096,8192,12288,16384,0};

 short filt8_dcl1_h[8]= {
 0,16384,12288,8192,4096,0,0,0};

--- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
@@ -63,10 +63,12 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlsch, uint16_t N_RB_DL);
 */
 NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint16_t N_RB_DL);

+void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,
+                      uint16_t N_RB_UL,
+                      NR_DL_FRAME_PARMS* frame_parms);

-void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulsch, uint16_t N_RB_UL);

-NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids);
+NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids, NR_DL_FRAME_PARMS* frame_parms);

 /** \brief This function computes the LLRs for ML (max-logsum approximation) dual-stream QPSK/QPSK reception.
    @param stream0_in Input from channel compensated (MR combined) stream 0

--- a/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
@@ -84,9 +84,9 @@ typedef struct {
  /// Pointer to the payload + CRC 
  uint8_t *b;
  /// Pointers to transport block segments
-  uint8_t *c[MAX_NUM_NR_ULSCH_SEGMENTS];
+  uint8_t **c;
  /// LDPC-code outputs
-  uint8_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
+  uint8_t **d;
  /// LDPC-code outputs (TS 36.212 V15.4.0, Sec 5.3.2 p. 17)
  uint8_t *e;
  /// Rate matching (Interleaving) outputs (TS 36.212 V15.4.0, Sec 5.4.2.2 p. 30)

--- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c
@@ -43,10 +43,10 @@

 //#define DEBUG_ULSCH_CODING

-void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
+void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,
+                      uint16_t N_RB_UL,
+                      NR_DL_FRAME_PARMS* frame_parms) {

-{
-  int i, r;
  NR_UE_ULSCH_t *ulsch = *ulschptr;

  if (ulsch) {
@@ -54,15 +54,15 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
    printf("Freeing ulsch %p\n",ulsch);
 #endif

-  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS;  //number of segments to be allocated
-
-  if (N_RB_UL != 273) {
-    a_segments = a_segments*N_RB_UL;
-    a_segments = a_segments/273 +1;
-  }  
+    int max_layers = (frame_parms->nb_antennas_tx<NR_MAX_NB_LAYERS) ? frame_parms->nb_antennas_tx : NR_MAX_NB_LAYERS;
+    uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*max_layers;  //number of segments to be allocated

+    if (N_RB_UL != 273) {
+      a_segments = a_segments*N_RB_UL;
+      a_segments = a_segments/273 +1;
+    }

-    for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
+    for (int i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
      if (ulsch->harq_processes[i]) {

        if (ulsch->harq_processes[i]->a) {
@@ -81,7 +81,7 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
          free16(ulsch->harq_processes[i]->f,14*N_RB_UL*12*8);
          ulsch->harq_processes[i]->f = NULL;
        }
-        for (r=0; r<a_segments; r++) {
+        for (int r=0; r<a_segments; r++) {
          if (ulsch->harq_processes[i]->c[r]) {
            free16(ulsch->harq_processes[i]->c[r],((r==0)?8:0) + 3+768);
            ulsch->harq_processes[i]->c[r] = NULL;
@@ -94,6 +94,15 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)

        }

+        if (ulsch->harq_processes[i]->c) {
+          free16(ulsch->harq_processes[i]->c,a_segments);
+          ulsch->harq_processes[i]->c = NULL;
+        }
+        if (ulsch->harq_processes[i]->d) {
+          free16(ulsch->harq_processes[i]->d,a_segments);
+          ulsch->harq_processes[i]->d = NULL;
+        }
+
        free16(ulsch->harq_processes[i],sizeof(NR_UL_UE_HARQ_t));
        ulsch->harq_processes[i] = NULL;
      }
@@ -101,13 +110,13 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
    free16(ulsch,sizeof(NR_UE_ULSCH_t));
    *ulschptr = NULL;
  }
-
 }


-NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids)
-{
-  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS;  //number of segments to be allocated
+NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids, NR_DL_FRAME_PARMS* frame_parms) {
+
+  int max_layers = (frame_parms->nb_antennas_tx<NR_MAX_NB_LAYERS) ? frame_parms->nb_antennas_tx : NR_MAX_NB_LAYERS;
+  uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*max_layers;  //number of segments to be allocated

  if (N_RB_UL != 273) {
    a_segments = a_segments*N_RB_UL;
@@ -140,6 +149,8 @@ NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids)
    DevAssert(ulsch->harq_processes[i]->b);
    bzero(ulsch->harq_processes[i]->b,ulsch_bytes);

+    ulsch->harq_processes[i]->c = malloc16(a_segments*sizeof(uint8_t *));
+    ulsch->harq_processes[i]->d = malloc16(a_segments*sizeof(uint16_t *));
    for (int r = 0; r < a_segments; r++) {
      // account for filler in first segment and CRCs for multiple segment case
      ulsch->harq_processes[i]->c[r] = malloc16(8448);
@@ -216,6 +227,8 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
    printf("\n");
   */ 

+    int max_payload_bytes = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*harq_process->pusch_pdu.nrOfLayers*1056;
+
    if (A > 3824) {
      // Add 24-bit crc (polynomial A) to payload
      crc = crc24a(harq_process->a,A)>>8;
@@ -227,7 +240,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,

      harq_process->B = A+24;

-      AssertFatal((A/8)+4 <= MAX_NR_ULSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_NR_ULSCH_PAYLOAD_BYTES);
+      AssertFatal((A/8)+4 <= max_payload_bytes,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,max_payload_bytes);

      memcpy(harq_process->b,harq_process->a,(A/8)+4);
    }
@@ -241,7 +254,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,

      harq_process->B = A+16;

-      AssertFatal((A/8)+3 <= MAX_NR_ULSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_NR_ULSCH_PAYLOAD_BYTES);
+      AssertFatal((A/8)+3 <= max_payload_bytes,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,max_payload_bytes);

      memcpy(harq_process->b,harq_process->a,(A/8)+3);  // using 3 bytes to mimic the case of 24 bit crc
    }
@@ -301,7 +314,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
      printf("start ldpc encoder segment %d/%d\n",r,harq_process->C);
      printf("input %d %d %d %d %d \n", harq_process->c[r][0], harq_process->c[r][1], harq_process->c[r][2],harq_process->c[r][3], harq_process->c[r][4]);
      for (int cnt =0 ; cnt < 22*(*pz)/8; cnt ++){
-      printf("%d ", harq_process->c[r][cnt]);
+        printf("%d ", harq_process->c[r][cnt]);
      }
      printf("\n");


--- a/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+++ b/openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
--- a/openair1/PHY/TOOLS/lte_ue_scope.c
+++ b/openair1/PHY/TOOLS/lte_ue_scope.c
@@ -51,9 +51,9 @@ void reset_stats(FL_OBJECT *button, long arg) {
  int i,j,k;
  PHY_VARS_eNB *phy_vars_eNB = RC.eNB[0][0];

-  for (i=0; i<NUMBER_OF_DLSCH_MAX; i++) {
-    for (k=0; k<8; k++) { //harq_processes
-      for (j=0; j<phy_vars_eNB->dlsch[i][0]->Mlimit; j++) {
+  for (i=0; i<NUMBER_OF_UE_MAX; i++) {
+    for (k=0; k<NUMBER_OF_DLSCH_MAX; k++) { //harq_processes
+      for (j=0; j<phy_vars_eNB->dlsch[k][0]->Mlimit; j++) {
        phy_vars_eNB->UE_stats[i].dlsch_NAK[k][j]=0;
        phy_vars_eNB->UE_stats[i].dlsch_ACK[k][j]=0;
        phy_vars_eNB->UE_stats[i].dlsch_trials[k][j]=0;

--- a/openair1/PHY/defs_gNB.h
+++ b/openair1/PHY/defs_gNB.h
@@ -271,7 +271,7 @@ typedef struct {
  /// The payload + CRC (24 bits) in bits (38.212 V15.4.0 section 5.1)
  uint32_t B;
  /// Pointers to code blocks after code block segmentation and CRC attachment (38.212 V15.4.0 section 5.2.2)
-  uint8_t *c[MAX_NUM_NR_ULSCH_SEGMENTS];
+  uint8_t **c;
  /// Number of bits in each code block (38.212 V15.4.0 section 5.2.2)
  uint32_t K;
  /// Number of "Filler" bits added in the code block segmentation (38.212 V15.4.0 section 5.2.2)
@@ -279,11 +279,9 @@ typedef struct {
  /// Number of code blocks after code block segmentation (38.212 V15.4.0 section 5.2.2)
  uint32_t C;
  /// Pointers to code blocks after LDPC coding (38.212 V15.4.0 section 5.3.2)
-  int16_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
+  int16_t **d;
  /// LDPC lifting size (38.212 V15.4.0 table 5.3.2-1)
  uint32_t Z;
-  /// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
-  int16_t e[MAX_NUM_NR_ULSCH_SEGMENTS][3*8448];
  /// Number of bits in each code block after rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
  uint32_t E;
  /// Number of segments processed so far
@@ -338,8 +336,6 @@ typedef struct {
  int16_t q_RI[MAX_RI_PAYLOAD];
  /// Temporary h sequence to flag PUSCH_x/PUSCH_y symbols which are not scrambled
  uint8_t h[MAX_NUM_CHANNEL_BITS];
-  /// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
-  int16_t *w[MAX_NUM_NR_ULSCH_SEGMENTS];
  //////////////////////////////////////////////////////////////
 } NR_UL_gNB_HARQ_t;

@@ -471,7 +467,7 @@ typedef struct {
  /// \brief Cross-correlation of two UE signals.
  /// - first index: rx antenna [0..nb_antennas_rx[
  /// - second index: symbol [0..]
-  int32_t **rho;
+  int32_t ***rho;
  /// \f$\log_2(\max|H_i|^2)\f$
  int16_t log2_maxh;
  /// \brief Magnitude of Uplink Channel first layer (16QAM level/First 64QAM level).
@@ -501,6 +497,10 @@ typedef struct {
  /// \brief llr values.
  /// - first index: ? [0..1179743] (hard coded)
  int16_t *llr;
+  /// \brief llr values per layer.
+  /// - first index: ? [0..3] (hard coded)
+  /// - first index: ? [0..1179743] (hard coded)
+  int16_t **llr_layers;
  /// DMRS symbol index, to be updated every DMRS symbol within a slot.
  uint8_t dmrs_symbol;
  // PTRS symbol index, to be updated every PTRS symbol within a slot.

--- a/openair1/PHY/defs_nr_common.h
+++ b/openair1/PHY/defs_nr_common.h
@@ -79,16 +79,20 @@
 #define NR_MAX_CSET_DURATION 3

 #define NR_MAX_NB_RBG 18
+
 #define NR_MAX_NB_LAYERS 4 // 8
+
 #define NR_MAX_NB_HARQ_PROCESSES 16

 #define NR_MAX_PDSCH_TBS 3824
 #define NR_MAX_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits.

-#define MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER 34
+#define MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER 36
+
+#define MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER 34

-#define MAX_NUM_NR_ULSCH_SEGMENTS 34
-#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056)
+#define MAX_NUM_NR_CHANNEL_BITS (4*14*273*12*8)  // 14 symbols, 273 RB
+#define MAX_NUM_NR_RE (4*14*273*12)

 #define MAX_NUM_NR_SRS_SYMBOLS 4


--- a/openair1/SCHED_NR/nr_ru_procedures.c
+++ b/openair1/SCHED_NR/nr_ru_procedures.c
@@ -526,7 +526,8 @@ void nr_fep0(RU_t *ru, int first_half) {
    end_symbol = NR_SYMBOLS_PER_SLOT;
  }

-  LOG_D(PHY,"In fep0 for slot = %d, first_half = %d, start_symbol = %d, end_symbol = %d\n", proc->tti_rx, first_half, start_symbol, end_symbol);
+  LOG_D(PHY,"In fep0 for slot = %d, first_half = %d, start_symbol = %d, end_symbol = %d, nb_antennas_rx = %d,N_TA_offset = %d\n", 
+        proc->tti_rx, first_half, start_symbol, end_symbol,fp->nb_antennas_rx,ru->N_TA_offset);
  //  printf("fep0: slot %d\n",slot);

  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+proc->tti_rx, 1);

--- a/openair1/SCHED_NR/phy_procedures_nr_gNB.c
+++ b/openair1/SCHED_NR/phy_procedures_nr_gNB.c
@@ -346,6 +346,14 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
 	number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
 	pusch_pdu->qam_mod_order,
 	pusch_pdu->nrOfLayers);
+
+
+  nr_ulsch_layer_demapping(gNB->pusch_vars[ULSCH_id]->llr,
+                           pusch_pdu->nrOfLayers,
+                           pusch_pdu->qam_mod_order,
+                           G,
+                           gNB->pusch_vars[ULSCH_id]->llr_layers);
+             
  //----------------------------------------------------------
  //------------------- ULSCH unscrambling -------------------
  //----------------------------------------------------------

--- a/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+++ b/openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
@@ -426,7 +426,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
      for (int i = 0; i < ul_config->number_pdus; ++i){

        AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type);
-        LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
+        LOG_D(PHY, "In %s i %d: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, i, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);

        uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, current_harq_pid, gNB_id = 0;
        /* PRACH */
@@ -451,6 +451,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
          if (harq_process_ul_ue){

            nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &harq_process_ul_ue->pusch_pdu;
+            
+            LOG_D(PHY, "In %s i %d: copy pusch_config_pdu nrOfLayers:%d, num_dmrs_cdm_grps_no_data:%d \n", __FUNCTION__, i, pusch_config_pdu->nrOfLayers,pusch_config_pdu->num_dmrs_cdm_grps_no_data);

            memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t));


--- a/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+++ b/openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
@@ -284,7 +284,8 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,

  VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);

-  memset(ue->common_vars.txdataF[0], 0, sizeof(int)*14*ue->frame_parms.ofdm_symbol_size);
+  for(int i=0; i< ue->frame_parms.nb_antennas_tx; ++i)
+    memset(ue->common_vars.txdataF[i], 0, sizeof(int)*14*ue->frame_parms.ofdm_symbol_size);

  LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);

@@ -918,21 +919,25 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
      const double N_TA_max = Ta_max * bw_scaling * tc_factor;

      NR_UE_MAC_INST_t *mac = get_mac_inst(0);
+      NR_BWP_Id_t dl_bwp = mac->DL_BWP_Id;
+      NR_BWP_Id_t ul_bwp = mac->UL_BWP_Id;

      NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
-      if (mac->ULbwp[0] &&
-          mac->ULbwp[0]->bwp_Dedicated &&
-          mac->ULbwp[0]->bwp_Dedicated->pusch_Config &&
-          mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup &&
-          mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
-        pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
-      }
-      else if (mac->ULbwp[0] &&
-               mac->ULbwp[0]->bwp_Common &&
-               mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon &&
-               mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup &&
-               mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
-        pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
+      if(ul_bwp){
+        if (mac->ULbwp[ul_bwp-1] &&
+            mac->ULbwp[ul_bwp-1]->bwp_Dedicated &&
+            mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config &&
+            mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup &&
+            mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
+          pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
+        }
+        else if (mac->ULbwp[ul_bwp-1] &&
+                 mac->ULbwp[ul_bwp-1]->bwp_Common &&
+                 mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon &&
+                 mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
+                 mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
+          pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
+        }
      }
      else if (mac->scc_SIB &&
               mac->scc_SIB->uplinkConfigCommon &&
@@ -943,12 +948,15 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
      }
      long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;

-      NR_PDSCH_Config_t *pdsch_Config = (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
+      NR_PDSCH_Config_t *pdsch_Config = NULL;
      NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
-      if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
-        pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
-      else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
-        pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
+      if(dl_bwp){
+        pdsch_Config = (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
+        if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
+          pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
+        else if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
+          pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
+      }
      else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
        pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
      long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
@@ -1002,7 +1010,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
        d_2_1 = 1;

      /* d_2_2 */
-      const double d_2_2 = 0.0; // set to 0 because there is only 1 BWP: TODO this should corresponds to the switching time as defined in TS 38.133
+      const double d_2_2 = pusch_d_2_2_timing_capability_1[numerology][1];

      /* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
      // N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */

--- a/openair1/SCHED_NR_UE/phy_sch_processing_time.h
+++ b/openair1/SCHED_NR_UE/phy_sch_processing_time.h
@@ -106,4 +106,36 @@ float pusch_N_2_timing_capability_2[3][2] = {
 {  0,      5   },
 {  1,      5.5 },
 {  2,      11  },
-};
\ No newline at end of file
+};
+
+/* TS 38.133 Table 8.6.2-1: BWP switch delay capability 1
+//   corresponding to the PUSCH preparation time d_2_2 [slots]
+// where mu corresponds to the one of {mu_DL, mu_UL}
+//   resulting with the largest T_proc_2
+// where mu_DL is the SCS with which the PDCCH
+//   carrying the DCI scheduling the PUSCH was transmitted
+//   mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
+*/
+float pusch_d_2_2_timing_capability_1[4][2] = {
+/* mu      d_2_2   */
+{  0,      1   },
+{  1,      2   },
+{  2,      3   },
+{  3,      6   },
+};
+
+/* TS 38.133 Table 8.6.2-1: BWP switch delay capability 2
+//   corresponding to the PUSCH preparation time d_2_2 [slots]
+// where mu corresponds to the one of {mu_DL, mu_UL}
+//   resulting with the largest T_proc_2
+// where mu_DL is the SCS with which the PDCCH
+//   carrying the DCI scheduling the PUSCH was transmitted
+//   mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
+*/
+float pusch_d_2_2_timing_capability_2[4][2] = {
+/* mu      d_2_2   */
+{  0,      3   },
+{  1,      5   },
+{  2,      9   },
+{  3,      18  },
+};
--- a/openair1/SIMULATION/NR_PHY/dlschsim.c
+++ b/openair1/SIMULATION/NR_PHY/dlschsim.c
@@ -48,13 +48,16 @@
 #include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
 #include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"

+
 //#define DEBUG_NR_DLSCHSIM

+THREAD_STRUCT thread_struct;
 PHY_VARS_gNB *gNB;
 PHY_VARS_NR_UE *UE;
 RAN_CONTEXT_t RC;
 UE_nr_rxtx_proc_t proc;
 int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
+uint64_t downlink_frequency[MAX_NUM_CCs][4];

 double cpuf;
 //uint8_t nfapi_mode = 0;

--- a/openair1/SIMULATION/NR_PHY/dlsim.c
+++ b/openair1/SIMULATION/NR_PHY/dlsim.c
@@ -211,10 +211,9 @@ int nr_derive_key(int alg_type, uint8_t alg_id,

 void config_common(int Mod_idP,
                   int ssb_SubcarrierOffset,
-                   rrc_pdsch_AntennaPorts_t pdsch_AntennaPorts,
+                   int pdsch_AntennaPorts,
                   int pusch_AntennaPorts,
-		   NR_ServingCellConfigCommon_t *scc
-		   );
+                   NR_ServingCellConfigCommon_t *scc);

 int generate_dlsch_header(unsigned char *mac_header,
                          unsigned char num_sdus,
@@ -293,7 +292,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
                           UE_info->CellGroup[0],
                           sched_ctrl->active_bwp,
                           NULL,
-                           /* tda = */ 2,
+                           /* tda = */ 0,
                           g_nrOfLayers,
                           sched_ctrl,
                           ps);
@@ -315,8 +314,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
                                        ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
                                        0 /* N_PRB_oh, 0 for initialBWP */,
                                        0 /* tb_scaling */,
-                                        ps->nrOfLayers)
-                         >> 3;
+                                        ps->nrOfLayers) >> 3;

  /* the simulator assumes the HARQ PID is equal to the slot number */
  sched_pdsch->dl_harq_pid = slot;
@@ -652,12 +650,12 @@ int main(int argc, char **argv)
        dmrs_arg[i] = atoi(argv[optind++]);
      }
      break;
-      
+
    case 'X':
      strncpy(gNBthreads, optarg, sizeof(gNBthreads));
      gNBthreads[sizeof(gNBthreads)-1]=0;
      break;
-      
+
    default:
    case 'h':
      printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n",
@@ -871,11 +869,11 @@ int main(int argc, char **argv)
    fs = 61.44e6;
    bw = 40e6;
  }
-  else if (mu == 1 && N_RB_DL == 133) { 
+  else if (mu == 1 && N_RB_DL == 133) {
    fs = 61.44e6;
    bw = 50e6;
  }
-  else if (mu == 1 && N_RB_DL == 162) { 
+  else if (mu == 1 && N_RB_DL == 162) {
    fs = 61.44e6;
    bw = 60e6;
  }

--- a/openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
+++ b/openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
@@ -21,6 +21,8 @@ nfapi_mode_t nfapi_mod;
 nfapi_mode_t nfapi_getmode(void) {
  return nfapi_mod;
 }
+void nfapi_setmode(nfapi_mode_t nfapi_mode) {}
+
 int dummy_nr_ue_dl_indication(nr_downlink_indication_t *dl_info)            { return(0);  }
 int dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info)              { return(0);  }
 void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,

--- a/openair1/SIMULATION/NR_PHY/pucchsim.c
+++ b/openair1/SIMULATION/NR_PHY/pucchsim.c
@@ -47,12 +47,13 @@
 #include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
 #include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"

-
+THREAD_STRUCT thread_struct;
 PHY_VARS_gNB *gNB;
 PHY_VARS_NR_UE *UE;
 RAN_CONTEXT_t RC;
 openair0_config_t openair0_cfg[MAX_CARDS];
 int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
+uint64_t downlink_frequency[MAX_NUM_CCs][4];

 double cpuf;
 //uint8_t nfapi_mode = 0;

--- a/openair1/SIMULATION/NR_PHY/ulschsim.c
+++ b/openair1/SIMULATION/NR_PHY/ulschsim.c
@@ -50,10 +50,12 @@

 //#define DEBUG_NR_ULSCHSIM

+THREAD_STRUCT thread_struct;
 PHY_VARS_gNB *gNB;
 PHY_VARS_NR_UE *UE;
 RAN_CONTEXT_t RC;
 int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
+uint64_t downlink_frequency[MAX_NUM_CCs][4];

 void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}

@@ -137,6 +139,7 @@ int main(int argc, char **argv)
  uint16_t nb_symb_sch = 12;
  uint16_t nb_rb = 50;
  uint8_t Imcs = 9;
+  uint8_t Nl = 1;

  double DS_TDL = .03;

@@ -150,7 +153,7 @@ int main(int argc, char **argv)
  randominit(0);

  //while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:")) != -1) {
-  while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:r:")) != -1) {
+  while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:r:W:")) != -1) {
    switch (c) {
      /*case 'f':
         write_output_file = 1;
@@ -251,7 +254,7 @@ int main(int argc, char **argv)
      case 'y':
        n_tx = atoi(optarg);

-        if ((n_tx == 0) || (n_tx > 2)) {
+        if ((n_tx == 0) || (n_tx > 4)) {
          printf("Unsupported number of TX antennas %d. Exiting.\n", n_tx);
          exit(-1);
        }
@@ -261,7 +264,7 @@ int main(int argc, char **argv)
      case 'z':
        n_rx = atoi(optarg);

-        if ((n_rx == 0) || (n_rx > 2)) {
+        if ((n_rx == 0) || (n_rx > 4)) {
          printf("Unsupported number of RX antennas %d. Exiting.\n", n_rx);
          exit(-1);
        }
@@ -299,6 +302,10 @@ int main(int argc, char **argv)
          printf("Illegal PBCH phase (0-3) got %d\n", pbch_phase);
        break;*/

+      case 'W':
+        Nl = atoi(optarg);
+      break;
+
      case 'm':
        Imcs = atoi(optarg);
 #ifdef DEBUG_NR_ULSCHSIM
@@ -335,13 +342,14 @@ int main(int argc, char **argv)
          printf("-z Number of RX antennas used in UE\n");
          //printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n");
          //printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n");
+          printf("-W number of layer\n");
          printf("-M Multiple SSB positions in burst\n");
          printf("-N Nid_cell\n");
          printf("-R N_RB_UL\n");
          printf("-F Input filename (.txt format) for RX conformance testing\n");
-          printf("-m\n");
-          printf("-l\n");
-          printf("-r\n");
+          printf("-m MCS\n");
+          printf("-l number of symbol\n");
+          printf("-r number of RB\n");
          //printf("-O oversampling factor (1,2,4,8,16)\n");
          //printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
          //printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
@@ -359,8 +367,8 @@ int main(int argc, char **argv)
    snr1 = snr0 + 10;

  gNB2UE = new_channel_desc_scm(n_tx,
-		                n_rx,
-				channel_model,
+                                n_rx,
+                                channel_model,
                                61.44e6, //N_RB2sampling_rate(N_RB_DL),
                                40e6, //N_RB2channel_bandwidth(N_RB_DL),
                                DS_TDL,
@@ -383,8 +391,6 @@ int main(int argc, char **argv)
  initTpool(tp_param, gNB->threadPool, true);
  initNotifiedFIFO(gNB->respDecode);
  frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
-  frame_parms->nb_antennas_tx = n_tx;
-  frame_parms->nb_antennas_rx = n_rx;
  frame_parms->N_RB_DL = N_RB_DL;
  frame_parms->N_RB_UL = N_RB_UL;
  frame_parms->Ncp = extended_prefix_flag ? EXTENDED : NORMAL;
@@ -392,6 +398,9 @@ int main(int argc, char **argv)

  memcpy(&gNB->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));

+  gNB->frame_parms.nb_antennas_tx = 1;
+  gNB->frame_parms.nb_antennas_rx = n_rx;
+
  nr_phy_config_request_sim(gNB, N_RB_UL, N_RB_UL, mu, Nid_cell, SSB_positions);

  phy_init_nr_gNB(gNB, 0, 1); //lowmem
@@ -400,6 +409,9 @@ int main(int argc, char **argv)
  UE = malloc(sizeof(PHY_VARS_NR_UE));
  memcpy(&UE->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));

+  UE->frame_parms.nb_antennas_tx = n_tx;
+  UE->frame_parms.nb_antennas_rx = 1;
+
  //phy_init_nr_top(frame_parms);
  if (init_nr_ue_signal(UE, 1) != 0) {
    printf("Error at UE NR initialisation.\n");
@@ -407,7 +419,7 @@ int main(int argc, char **argv)
  }

  for (sf = 0; sf < 2; sf++) {
-    UE->ulsch[sf][0] = new_nr_ue_ulsch(N_RB_UL, 8);
+    UE->ulsch[sf][0] = new_nr_ue_ulsch(N_RB_UL, 8, frame_parms);
    if (!UE->ulsch[sf][0]) {
      printf("Can't get ue ulsch structures.\n");
      exit(-1);
@@ -421,8 +433,7 @@ int main(int argc, char **argv)
  uint8_t length_dmrs = 1;
  uint8_t N_PRB_oh;
  uint16_t N_RE_prime,code_rate;
-  unsigned char mod_order;
-  uint8_t Nl = 1;
+  unsigned char mod_order;  
  uint8_t rvidx = 0;
  uint8_t UE_id = 0;

@@ -432,9 +443,12 @@ int main(int argc, char **argv)

  NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[0][0];

+  if ((Nl==4)||(Nl==3))
+    nb_re_dmrs = nb_re_dmrs*2;
+
  mod_order = nr_get_Qm_ul(Imcs, 0);
  code_rate = nr_get_code_rate_ul(Imcs, 0);
-  available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
+  available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, Nl);
  TBS = nr_compute_tbs(mod_order,code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, Nl);

  printf("\nAvailable bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order);
@@ -610,7 +624,8 @@ int main(int argc, char **argv)
  }

  for (sf = 0; sf < 2; sf++)
-    free_nr_ue_ulsch(&UE->ulsch[sf][0], N_RB_UL);
+    free_nr_ue_ulsch(&UE->ulsch[sf][0], N_RB_UL, frame_parms);
+
  term_nr_ue_signal(UE, 1);
  free(UE);


--- a/openair1/SIMULATION/NR_PHY/ulsim.c
+++ b/openair1/SIMULATION/NR_PHY/ulsim.c
--- a/openair2/COMMON/f1ap_messages_types.h
+++ b/openair2/COMMON/f1ap_messages_types.h
@@ -60,7 +60,9 @@
 #define F1AP_MAX_NB_CELLS 2

 #define F1AP_MAX_NO_OF_TNL_ASSOCIATIONS 32
-#define F1AP_MAX_NO_UE_ID 1024 
+#define F1AP_MAX_NO_UE_ID 1024
+#define F1AP_MAX_DU2CU_RRC_LENGTH 1024
+
 typedef struct f1ap_net_ip_address_s {
  unsigned ipv4:1;
  unsigned ipv6:1;
@@ -307,7 +309,7 @@ typedef struct f1ap_initial_ul_rrc_message_s {
  uint16_t crnti;
  uint8_t *rrc_container;
  int      rrc_container_length;
-  char du2cu_rrc_container[200];
+  char     du2cu_rrc_container[F1AP_MAX_DU2CU_RRC_LENGTH];
  int      du2cu_rrc_container_length;
 } f1ap_initial_ul_rrc_message_t;


--- a/openair2/COMMON/mac_messages_types.h
+++ b/openair2/COMMON/mac_messages_types.h
@@ -58,7 +58,7 @@
 // Some constants from "LAYER2/MAC/defs.h"
 #define BCCH_SDU_SIZE                           (512)
 #define BCCH_SDU_MBMS_SIZE                      (512)
-#define CCCH_SDU_SIZE                           (512)
+#define CCCH_SDU_SIZE                           (1024)
 #define MCCH_SDU_SIZE                           (512)
 #define PCCH_SDU_SIZE                           (512)


--- a/openair2/GNB_APP/RRC_nr_paramsvalues.h
+++ b/openair2/GNB_APP/RRC_nr_paramsvalues.h
@@ -132,6 +132,34 @@
 #define GNB_CONFIG_STRING_ULPTRSMAXPORTS_0                               "ul_ptrsMaxPorts_0"
 #define GNB_CONFIG_STRING_ULPTRSPOWER_0                                  "ul_ptrsPower_0"

+#define GNB_CONFIG_STRING_DLBWP1_ID                                      "dl_bwp-Id_1"
+#define GNB_CONFIG_STRING_DLBWP2_ID                                      "dl_bwp-Id_2"
+#define GNB_CONFIG_STRING_DLBWP3_ID                                      "dl_bwp-Id_3"
+#define GNB_CONFIG_STRING_DLBWP4_ID                                      "dl_bwp-Id_4"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP1                    "dl_bwp1_locationAndBandwidth"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP2                    "dl_bwp2_locationAndBandwidth"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP3                    "dl_bwp3_locationAndBandwidth"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP4                    "dl_bwp4_locationAndBandwidth"
+#define GNB_CONFIG_STRING_SCS_DLBWP1                                     "dl_bwp1_subcarrierSpacing"
+#define GNB_CONFIG_STRING_SCS_DLBWP2                                     "dl_bwp2_subcarrierSpacing"
+#define GNB_CONFIG_STRING_SCS_DLBWP3                                     "dl_bwp3_subcarrierSpacing"
+#define GNB_CONFIG_STRING_SCS_DLBWP4                                     "dl_bwp4_subcarrierSpacing"
+#define GNB_CONFIG_STRING_FIRSTACTIVEDLBWP_ID                            "firstActiveDownlinkBWP-Id"
+#define GNB_CONFIG_STRING_DEFAULTDLBWP_ID                                "defaultDownlinkBWP-Id"
+#define GNB_CONFIG_STRING_ULBWP1_ID                                      "ul_bwp-Id_1"
+#define GNB_CONFIG_STRING_ULBWP2_ID                                      "ul_bwp-Id_2"
+#define GNB_CONFIG_STRING_ULBWP3_ID                                      "ul_bwp-Id_3"
+#define GNB_CONFIG_STRING_ULBWP4_ID                                      "ul_bwp-Id_4"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP1                    "ul_bwp1_locationAndBandwidth"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP2                    "ul_bwp2_locationAndBandwidth"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP3                    "ul_bwp3_locationAndBandwidth"
+#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP4                    "ul_bwp4_locationAndBandwidth"
+#define GNB_CONFIG_STRING_SCS_ULBWP1                                     "ul_bwp1_subcarrierSpacing"
+#define GNB_CONFIG_STRING_SCS_ULBWP2                                     "ul_bwp2_subcarrierSpacing"
+#define GNB_CONFIG_STRING_SCS_ULBWP3                                     "ul_bwp3_subcarrierSpacing"
+#define GNB_CONFIG_STRING_SCS_ULBWP4                                     "ul_bwp4_subcarrierSpacing"
+#define GNB_CONFIG_STRING_FIRSTACTIVEULBWP_ID                            "firstActiveUplinkBWP-Id"
+
 /*--------------------------------------------------------------------------------------------------------------------*/
 /*                                            pdcch_ConfigSIB1 parameters                                             */
 /*--------------------------------------------------------------------------------------------------------------------*/
@@ -240,10 +268,33 @@
 {GNB_CONFIG_STRING_ULPTRSTIMEDENSITY2_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[2],defint64val:-1,TYPE_INT64,0}, \
 {GNB_CONFIG_STRING_ULPTRSREOFFSET_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset,defint64val:-1,TYPE_INT64,0}, \
 {GNB_CONFIG_STRING_ULPTRSMAXPORTS_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->maxNrofPorts,defint64val:0,TYPE_INT64,0}, \
-{GNB_CONFIG_STRING_ULPTRSPOWER_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->ptrs_Power,defint64val:0,TYPE_INT64,0}}
-
-
-
-
+{GNB_CONFIG_STRING_ULPTRSPOWER_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->ptrs_Power,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_FIRSTACTIVEDLBWP_ID,NULL,0,i64ptr:scd->firstActiveDownlinkBWP_Id,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_FIRSTACTIVEULBWP_ID,NULL,0,i64ptr:scd->uplinkConfig->firstActiveUplinkBWP_Id,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_DLBWP1_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Id,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_DLBWP2_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Id,defint64val:2,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_DLBWP3_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Id,defint64val:3,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_DLBWP4_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Id,defint64val:4,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_DLBWP1,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_DLBWP2,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_DLBWP3,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_DLBWP4,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP1,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP2,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP3,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP4,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_ULBWP1_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Id,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_ULBWP2_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Id,defint64val:2,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_ULBWP3_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Id,defint64val:3,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_ULBWP4_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Id,defint64val:4,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_ULBWP1,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_ULBWP2,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_ULBWP3,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_SCS_ULBWP4,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP1,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP2,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP3,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP4,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
+{GNB_CONFIG_STRING_DEFAULTDLBWP_ID,NULL,0,i64ptr:scd->defaultDownlinkBWP_Id,defint64val:0,TYPE_INT64,0}}

 #endif
--- a/openair2/GNB_APP/gnb_config.c
+++ b/openair2/GNB_APP/gnb_config.c
--- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
--- a/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+++ b/openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
--- a/openair2/LAYER2/NR_MAC_UE/config_ue.c
+++ b/openair2/LAYER2/NR_MAC_UE/config_ue.c
--- a/openair2/LAYER2/NR_MAC_UE/mac_defs.h
+++ b/openair2/LAYER2/NR_MAC_UE/mac_defs.h
--- a/openair2/LAYER2/NR_MAC_UE/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_UE/mac_proto.h
--- a/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
+++ b/openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
--- a/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
--- a/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
--- a/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+++ b/openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
--- a/openair2/LAYER2/NR_MAC_gNB/config.c
+++ b/openair2/LAYER2/NR_MAC_gNB/config.c
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
@@ -348,6 +348,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,

  nr_mac_update_timers(module_idP, frame, slot);

+  schedule_nr_bwp_switch(module_idP, frame, slot);
+
  // This schedules MIB
  schedule_nr_mib(module_idP, frame, slot);


--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
--- a/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+++ b/openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
--- a/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+++ b/openair2/LAYER2/NR_MAC_gNB/mac_proto.h
--- a/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+++ b/openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
--- a/openair2/RRC/LTE/defs_NB_IoT.h
+++ b/openair2/RRC/LTE/defs_NB_IoT.h
--- a/openair2/RRC/LTE/rrc_defs.h
+++ b/openair2/RRC/LTE/rrc_defs.h
--- a/openair2/RRC/NR/L2_nr_interface.c
+++ b/openair2/RRC/NR/L2_nr_interface.c
--- a/openair2/RRC/NR/MESSAGES/asn1_msg.c
+++ b/openair2/RRC/NR/MESSAGES/asn1_msg.c
--- a/openair2/RRC/NR/MESSAGES/asn1_msg.h
+++ b/openair2/RRC/NR/MESSAGES/asn1_msg.h
--- a/openair2/RRC/NR/nr_rrc_config.c
+++ b/openair2/RRC/NR/nr_rrc_config.c
--- a/openair2/RRC/NR/nr_rrc_config.h
+++ b/openair2/RRC/NR/nr_rrc_config.h
--- a/openair2/RRC/NR/nr_rrc_defs.h
+++ b/openair2/RRC/NR/nr_rrc_defs.h
--- a/openair2/RRC/NR/nr_rrc_proto.h
+++ b/openair2/RRC/NR/nr_rrc_proto.h
--- a/openair2/RRC/NR/rrc_gNB.c
+++ b/openair2/RRC/NR/rrc_gNB.c
--- a/openair2/RRC/NR/rrc_gNB_nsa.c
+++ b/openair2/RRC/NR/rrc_gNB_nsa.c
--- a/openair2/RRC/NR/rrc_gNB_reconfig.c
+++ b/openair2/RRC/NR/rrc_gNB_reconfig.c
--- a/openair2/RRC/NR_UE/rrc_UE.c
+++ b/openair2/RRC/NR_UE/rrc_UE.c
--- a/targets/ARCH/rfsimulator/simulator.c
+++ b/targets/ARCH/rfsimulator/simulator.c
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.217PRB.2x2.usrpn300.conf
--- a/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.273PRB.2x2.usrpn300.conf
+++ b/targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.273PRB.2x2.usrpn300.conf