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Michael Black
OpenXG-RAN
Commits
615f365b
Commit
615f365b
authored
Jan 27, 2020
by
Florian Kaltenberger
Browse files
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Plain Diff
adding support for beam selection in usrp_lib
parent
8dac3a46
Changes
2
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2 changed files
with
42 additions
and
18 deletions
+42
-18
executables/nr-ru.c
executables/nr-ru.c
+4
-0
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+38
-18
No files found.
executables/nr-ru.c
View file @
615f365b
...
@@ -754,6 +754,10 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
...
@@ -754,6 +754,10 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
nextslot_type
==
NR_UPLINK_SLOT
)
{
nextslot_type
==
NR_UPLINK_SLOT
)
{
flags
=
3
;
// end of burst
flags
=
3
;
// end of burst
}
}
// the beam index is written in bits 8-10 of the flags
// the following choice cycles through the beams every slot, starting with beam 3
flags
|=
((
3
+
slot
)
&
7
)
<<
8
;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME
(
VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS
,
flags
);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME
(
VCD_SIGNAL_DUMPER_VARIABLES_TRX_WRITE_FLAGS
,
flags
);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME
(
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU
,
frame
);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME
(
VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU
,
frame
);
...
...
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
View file @
615f365b
...
@@ -276,14 +276,17 @@ static int trx_usrp_start(openair0_device *device) {
...
@@ -276,14 +276,17 @@ static int trx_usrp_start(openair0_device *device) {
// setup GPIO for TDD, GPIO(4) = ATR_RX
// setup GPIO for TDD, GPIO(4) = ATR_RX
//set data direction register (DDR) to output
//set data direction register (DDR) to output
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"DDR"
,
0x
7f
,
0x7
f
);
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"DDR"
,
0x
fff
,
0xff
f
);
//set
control register to ATR
//set
lower 7 bits to be controlled automatically by ATR (the rest 5 bits are controlled manually)
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"CTRL"
,
0x7f
,
0x
7
f
);
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"CTRL"
,
0x7f
,
0x
ff
f
);
//set pins 4 (RX_TX_Switch) and 6 (Shutdown PA) to 1 when the radio is only receiving (ATR_RX)
//set pins 4 (RX_TX_Switch) and 6 (Shutdown PA) to 1 when the radio is only receiving (ATR_RX)
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"ATR_RX"
,
(
1
<<
4
)
|
(
1
<<
6
),
0x7f
);
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"ATR_RX"
,
(
1
<<
4
)
|
(
1
<<
6
),
0x7f
);
// set pin 5 (Shutdown LNA) to 1 when the radio is transmitting and receiveing (ATR_XX)
// set pin 5 (Shutdown LNA) to 1 when the radio is transmitting and receiveing (ATR_XX)
// (we use full duplex here, because our RX is on all the time - this might need to change later)
// (we use full duplex here, because our RX is on all the time - this might need to change later)
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"ATR_XX"
,
(
1
<<
5
),
0x7f
);
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"ATR_XX"
,
(
1
<<
5
),
0x7f
);
// set the output pins to 0
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"OUT"
,
3
<<
7
,
0xf80
);
// init recv and send streaming
// init recv and send streaming
uhd
::
stream_cmd_t
cmd
(
uhd
::
stream_cmd_t
::
STREAM_MODE_START_CONTINUOUS
);
uhd
::
stream_cmd_t
cmd
(
uhd
::
stream_cmd_t
::
STREAM_MODE_START_CONTINUOUS
);
LOG_I
(
HW
,
"Time in secs now: %llu
\n
"
,
s
->
usrp
->
get_time_now
().
to_ticks
(
s
->
sample_rate
));
LOG_I
(
HW
,
"Time in secs now: %llu
\n
"
,
s
->
usrp
->
get_time_now
().
to_ticks
(
s
->
sample_rate
));
...
@@ -404,10 +407,19 @@ static int trx_usrp_write_recplay(openair0_device *device, openair0_timestamp ti
...
@@ -404,10 +407,19 @@ static int trx_usrp_write_recplay(openair0_device *device, openair0_timestamp ti
@param antenna_id index of the antenna if the device has multiple antennas
@param antenna_id index of the antenna if the device has multiple antennas
@param flags flags must be set to TRUE if timestamp parameter needs to be applied
@param flags flags must be set to TRUE if timestamp parameter needs to be applied
*/
*/
static
int
trx_usrp_write
(
openair0_device
*
device
,
openair0_timestamp
timestamp
,
void
**
buff
,
int
nsamps
,
int
cc
,
int
flags
)
{
static
int
trx_usrp_write
(
openair0_device
*
device
,
openair0_timestamp
timestamp
,
void
**
buff
,
int
nsamps
,
int
cc
,
int
flags
)
{
int
ret
=
0
;
int
ret
=
0
;
usrp_state_t
*
s
=
(
usrp_state_t
*
)
device
->
priv
;
usrp_state_t
*
s
=
(
usrp_state_t
*
)
device
->
priv
;
int
nsamps2
;
// aligned to upper 32 or 16 byte boundary
int
nsamps2
;
// aligned to upper 32 or 16 byte boundary
int
flags_lsb
=
flags
&
0xff
;
int
flags_msb
=
(
flags
>>
8
)
&
0xff
;
#if defined(__x86_64) || defined(__i386__)
#if defined(__x86_64) || defined(__i386__)
#ifdef __AVX2__
#ifdef __AVX2__
nsamps2
=
(
nsamps
+
7
)
>>
3
;
nsamps2
=
(
nsamps
+
7
)
>>
3
;
...
@@ -441,40 +453,48 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
...
@@ -441,40 +453,48 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
boolean_t
first_packet_state
=
false
,
last_packet_state
=
false
;
boolean_t
first_packet_state
=
false
,
last_packet_state
=
false
;
if
(
flags
==
2
)
{
// start of burst
if
(
flags
_lsb
==
2
)
{
// start of burst
// s->tx_md.start_of_burst = true;
// s->tx_md.start_of_burst = true;
// s->tx_md.end_of_burst = false;
// s->tx_md.end_of_burst = false;
first_packet_state
=
true
;
first_packet_state
=
true
;
last_packet_state
=
false
;
last_packet_state
=
false
;
}
else
if
(
flags
==
3
)
{
// end of burst
}
else
if
(
flags
_lsb
==
3
)
{
// end of burst
//s->tx_md.start_of_burst = false;
//s->tx_md.start_of_burst = false;
//s->tx_md.end_of_burst = true;
//s->tx_md.end_of_burst = true;
first_packet_state
=
false
;
first_packet_state
=
false
;
last_packet_state
=
true
;
last_packet_state
=
true
;
}
else
if
(
flags
==
4
)
{
// start and end
}
else
if
(
flags
_lsb
==
4
)
{
// start and end
// s->tx_md.start_of_burst = true;
// s->tx_md.start_of_burst = true;
// s->tx_md.end_of_burst = true;
// s->tx_md.end_of_burst = true;
first_packet_state
=
true
;
first_packet_state
=
true
;
last_packet_state
=
true
;
last_packet_state
=
true
;
}
else
if
(
flags
==
1
)
{
// middle of burst
}
else
if
(
flags
_lsb
==
1
)
{
// middle of burst
// s->tx_md.start_of_burst = false;
// s->tx_md.start_of_burst = false;
// s->tx_md.end_of_burst = false;
// s->tx_md.end_of_burst = false;
first_packet_state
=
false
;
first_packet_state
=
false
;
last_packet_state
=
false
;
last_packet_state
=
false
;
}
else
if
(
flags
==
10
)
{
// fail safe mode
}
// s->tx_md.has_time_spec = false;
else
if
(
flags_lsb
==
10
)
{
// fail safe mode
// s->tx_md.start_of_burst = false;
// s->tx_md.has_time_spec = false;
// s->tx_md.end_of_burst = true;
// s->tx_md.start_of_burst = false;
first_packet_state
=
false
;
// s->tx_md.end_of_burst = true;
last_packet_state
=
true
;
first_packet_state
=
false
;
last_packet_state
=
true
;
}
}
// push GPIO bits 7-9 from flags_msb
int
gpio789
=
(
flags_msb
&
7
)
<<
7
;
s
->
tx_md
.
has_time_spec
=
true
;
s
->
tx_md
.
has_time_spec
=
true
;
s
->
tx_md
.
start_of_burst
=
(
s
->
tx_count
==
0
)
?
true
:
first_packet_state
;
s
->
tx_md
.
start_of_burst
=
(
s
->
tx_count
==
0
)
?
true
:
first_packet_state
;
s
->
tx_md
.
end_of_burst
=
last_packet_state
;
s
->
tx_md
.
end_of_burst
=
last_packet_state
;
s
->
tx_md
.
time_spec
=
uhd
::
time_spec_t
::
from_ticks
(
timestamp
,
s
->
sample_rate
);
s
->
tx_md
.
time_spec
=
uhd
::
time_spec_t
::
from_ticks
(
timestamp
,
s
->
sample_rate
);
s
->
tx_count
++
;
s
->
tx_count
++
;
s
->
usrp
->
set_command_time
(
s
->
tx_md
.
time_spec
);
s
->
usrp
->
set_gpio_attr
(
"FP0"
,
"OUT"
,
gpio789
,
0xfff
);
s
->
usrp
->
clear_command_time
();
if
(
cc
>
1
)
{
if
(
cc
>
1
)
{
std
::
vector
<
void
*>
buff_ptrs
;
std
::
vector
<
void
*>
buff_ptrs
;
...
...
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