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OpenXG-RAN
Commit a4a5dbbc authored by Rohit Gupta's avatar Rohit Gupta
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added master clock for 5MHz

parent a0ffa8ca
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targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
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...@@ -625,6 +625,7 @@ extern "C" { ...@@ -625,6 +625,7 @@ extern "C" {
openair0_cfg[0].tx_scheduling_advance = 10240; openair0_cfg[0].tx_scheduling_advance = 10240;
break; break;
case 7680000: case 7680000:
s->usrp->set_master_clock_rate(30.72e6);
openair0_cfg[0].samples_per_packet = 1024; openair0_cfg[0].samples_per_packet = 1024;
openair0_cfg[0].tx_sample_advance = 80; openair0_cfg[0].tx_sample_advance = 80;
openair0_cfg[0].tx_bw = 20e6; openair0_cfg[0].tx_bw = 20e6;
......
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