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Commit d013302c authored by matzakos's avatar matzakos
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Merge remote-tracking branch 'origin/NR_UL_scheduling' into NR_RRC_PDCP 

 Conflicts:
	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
parents 0b8d5a8f c810300e
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Showing with 1069 additions and 476 deletions
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
View file @ d013302c
......@@ -1120,6 +1120,7 @@ typedef struct
uint16_t ul_dmrs_symb_pos;
uint8_t dmrs_config_type;
uint16_t ul_dmrs_scrambling_id;
uint16_t pusch_identity;
uint8_t scid;
uint8_t num_dmrs_cdm_grps_no_data;
uint16_t dmrs_ports;//DMRS ports. [TS38.212 7.3.1.1.2] provides description between DCI 0-1 content and DMRS ports. Bitmap occupying the 11 LSBs with: bit 0: antenna port 1000 bit 11: antenna port 1011 and for each bit 0: DMRS port not used 1: DMRS port used
......
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
View file @ d013302c
......@@ -197,8 +197,10 @@ decoder_node_t *add_nodes(int level, int first_leaf_index, t_nrPolar_params *pol
}
for (int i=0;i<Nv;i++) {
if (polarParams->information_bit_pattern[i+first_leaf_index]>0)
all_frozen_below=0;
if (polarParams->information_bit_pattern[i+first_leaf_index]>0) {
all_frozen_below=0;
break;
}
}
if (all_frozen_below==0)
......
openair1/PHY/LTE_TRANSPORT/dci_tools.c
View file @ d013302c
......@@ -2006,11 +2006,6 @@ void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu
return;
}
//AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb>0,"nb_rb = 0\n");
if(ulsch->harq_processes[harq_pid]->nb_rb == 0) {
LOG_E(PHY, "fill_ulsch UE_id %d nb_rb = 0\n", UE_id);
}
ulsch->harq_processes[harq_pid]->frame = frame;
ulsch->harq_processes[harq_pid]->subframe = subframe;
ulsch->harq_processes[harq_pid]->handled = 0;
......
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
View file @ d013302c
......@@ -34,6 +34,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
int ul_id,
unsigned short bwp_start_subcarrier,
nfapi_nr_pusch_pdu_t *pusch_pdu) {
......@@ -43,8 +44,8 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned int pilot_cnt,re_cnt;
int16_t ch[2],ch_r[2],ch_l[2],*pil,*rxF,*ul_ch;
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
int ch_offset,symbol_offset, UE_id = 0;
int32_t **ul_ch_estimates_time = gNB->pusch_vars[UE_id]->ul_ch_estimates_time;
int ch_offset,symbol_offset ;
int32_t **ul_ch_estimates_time = gNB->pusch_vars[ul_id]->ul_ch_estimates_time;
__m128i *ul_ch_128;
#ifdef DEBUG_CH
......@@ -55,7 +56,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
//uint16_t Nid_cell = (eNB_offset == 0) ? gNB->frame_parms.Nid_cell : gNB->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **ul_ch_estimates = gNB->pusch_vars[UE_id]->ul_ch_estimates;
int **ul_ch_estimates = gNB->pusch_vars[ul_id]->ul_ch_estimates;
int **rxdataF = gNB->common_vars.rxdataF;
nushift = (p>>1)&1;
......@@ -338,7 +339,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
8);
}
}
#ifdef DEBUG_PDSCH
#ifdef DEBUG_PUSCH
ul_ch = (int16_t *)&ul_ch_estimates[aarx][ch_offset];
for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pusch*12/8); idxP++) {
for(uint8_t idxI=0; idxI<16; idxI+=2) {
......
openair1/PHY/NR_ESTIMATION/nr_ul_estimation.h
View file @ d013302c
......@@ -43,6 +43,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
int ul_id,
unsigned short bwp_start_subcarrier,
nfapi_nr_pusch_pdu_t *pusch_pdu);
......
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
View file @ d013302c
......@@ -61,7 +61,7 @@ void free_gNB_dlsch(NR_gNB_DLSCH_t **dlschptr, uint16_t N_RB)
if (N_RB != 273) {
a_segments = a_segments*N_RB;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
......@@ -150,7 +150,7 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
if (N_RB != 273) {
a_segments = a_segments*N_RB;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
uint16_t dlsch_bytes = a_segments*1056; // allocated bytes per segment
......@@ -326,7 +326,8 @@ int nr_dlsch_encoding(unsigned char *a,
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *rel15 = &dlsch->harq_processes[harq_pid]->pdsch_pdu.pdsch_pdu_rel15;
uint16_t nb_rb = rel15->rbSize;
uint8_t nb_symb_sch = rel15->NrOfSymbols;
uint32_t A, Z, Kb, F=0;
uint32_t A, Kb, F=0;
static uint32_t Z = 0;
uint32_t *Zc = &Z;
uint8_t mod_order = rel15->qamModOrder[0];
uint16_t Kr=0,r;
......
openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
View file @ d013302c
......@@ -67,7 +67,7 @@ void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr,uint8_t N_RB_UL)
if (ulsch) {
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
......@@ -119,11 +119,10 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations,uint16_t N_RB_UL, uint
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
ulsch = (NR_gNB_ULSCH_t *)malloc16(sizeof(NR_gNB_ULSCH_t));
if (ulsch) {
......@@ -366,13 +365,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d\n",harq_pid,A,G, mcs, n_layers, nb_rb, Qm, n_layers);
if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
harq_process->B = A+24;
else
harq_process->B = A+16;
if (R<1024)
Coderate = (float) R /(float) 1024;
......@@ -409,6 +401,13 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
}
}
if (harq_process->round == 0) {
// This is a new packet, so compute quantities regarding segmentation
if (A > 3824)
harq_process->B = A+24;
else
harq_process->B = A+16;
// [hna] Perform nr_segmenation with input and output set to NULL to calculate only (B, C, K, Z, F)
nr_segmentation(NULL,
NULL,
......@@ -438,7 +437,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
if (harq_process->C > a_segments) {
......@@ -479,7 +478,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
stop_meas(&phy_vars_gNB->ulsch_deinterleaving_stats);
#ifdef DEBUG_ULSCH_DECODING
LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
harq_pid,r, G,
Kr*3,
......@@ -489,7 +487,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
n_layers,
pusch_pdu->pusch_data.rv_index,
harq_process->round);
#endif
//////////////////////////////////////////////////////////////////////////////////////////
......@@ -664,8 +661,8 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
harq_process->status = SCH_IDLE;
harq_process->round = 0;
harq_process->handled = 0;
ulsch->harq_mask &= ~(1 << harq_pid);
}
ulsch->harq_mask &= ~(1 << harq_pid);
// LOG_D(PHY,"[gNB %d] ULSCH: Setting NACK for nr_tti_rx %d (pid %d, pid status %d, round %d/Max %d, TBS %d)\n",
// phy_vars_gNB->Mod_id,nr_tti_rx,harq_pid,harq_process->status,harq_process->round,ulsch->Mlimit,harq_process->TBS);
......@@ -675,15 +672,15 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
} else {
#ifdef gNB_DEBUG_TRACE
//#ifdef gNB_DEBUG_TRACE
LOG_I(PHY,"[gNB %d] ULSCH: Setting ACK for nr_tti_rx %d TBS %d\n",
phy_vars_gNB->Mod_id,nr_tti_rx,harq_process->TBS);
#endif
//#endif
harq_process->status = SCH_IDLE;
harq_process->round = 0;
// harq_process->handled = 0;
ulsch->harq_mask &= ~(1 << harq_pid);
ulsch->harq_mask |= (1 << harq_pid);
// harq_process->harq_ack.ack = 1;
// harq_process->harq_ack.harq_id = harq_pid;
// harq_process->harq_ack.send_harq_status = 1;
......
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
View file @ d013302c
......@@ -1082,6 +1082,7 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
nr_tti_rx,
0, // p
symbol,
ulsch_id,
bwp_start_subcarrier,
rel15_ul);
stop_meas(&gNB->ulsch_channel_estimation_stats);
......
openair1/PHY/NR_TRANSPORT/pucch_rx.c
View file @ d013302c
......@@ -1047,6 +1047,8 @@ void init_pucch2_luts() {
bit = (i&0x80) > 0 ? 0 : 1;
*lut_num_i = _mm_insert_epi16(*lut_num_i,bit,7);
*lut_den_i = _mm_insert_epi16(*lut_den_i,1-bit,7);
#ifdef DEBUG_NR_PUCCH_RX
printf("i %d, lut_num (%d,%d,%d,%d,%d,%d,%d,%d)\n",i,
((int16_t *)lut_num_i)[0],
((int16_t *)lut_num_i)[1],
......@@ -1056,6 +1058,7 @@ void init_pucch2_luts() {
((int16_t *)lut_num_i)[5],
((int16_t *)lut_num_i)[6],
((int16_t *)lut_num_i)[7]);
#endif
}
}
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @ d013302c
......@@ -68,7 +68,7 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlschptr,uint8_t N_RB_DL)
if (dlsch) {
if (N_RB_DL != 273) {
a_segments = a_segments*N_RB_DL;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
......@@ -409,7 +409,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
if (harq_process->C > a_segments) {
......@@ -947,7 +947,7 @@ uint32_t nr_dlsch_decoding_mthread(PHY_VARS_NR_UE *phy_vars_ue,
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
if (harq_process->C > a_segments) {
......@@ -1525,7 +1525,7 @@ void nr_dlsch_decoding_process(void *arg)
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
if (harq_process->C > a_segments) {
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
View file @ d013302c
......@@ -333,9 +333,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id_i]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms,
......@@ -348,9 +348,9 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
dlsch0_harq->pmi_alloc,
pdsch_vars[eNB_id_i]->pmi_ext,
symbol,
pilots,
start_rb,
nb_rb_pdsch,
pilots,
start_rb,
nb_rb_pdsch,
nr_tti_rx,
ue->high_speed_flag,
frame_parms,
......@@ -510,7 +510,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
(aatx>1) ? pdsch_vars[eNB_id]->rho : NULL,
frame_parms,
symbol,
pilots,
pilots,
first_symbol_flag,
dlsch0_harq->Qm,
nb_rb,
......@@ -1141,7 +1141,7 @@ void nr_dlsch_channel_compensation(int **rxdataF_ext,
int **rho,
NR_DL_FRAME_PARMS *frame_parms,
unsigned char symbol,
uint8_t pilots,
uint8_t pilots,
uint8_t first_symbol_flag,
unsigned char mod_order,
unsigned short nb_rb,
......
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c
View file @ d013302c
......@@ -57,7 +57,7 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,unsigned char N_RB_UL)
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
......@@ -114,7 +114,7 @@ NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL,
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273;
a_segments = a_segments/273 +1;
}
uint16_t ulsch_bytes = a_segments*1056; // allocated bytes per segment
......@@ -225,8 +225,9 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
unsigned int crc;
NR_UL_UE_HARQ_t *harq_process;
uint16_t nb_rb ;
uint32_t A, Z, F;
uint32_t *pz;
uint32_t A, F;
static uint32_t Z = 0;
uint32_t *pz = &Z;
uint8_t mod_order;
uint16_t Kr,r;
uint32_t r_offset;
......@@ -409,6 +410,8 @@ int nr_ulsch_encoding(NR_UE_ULSCH_t *ulsch,
///////////////////////////////////////////////////////////////////////////////
}
F = harq_process->F;
Kr = harq_process->K;
for (r=0; r<harq_process->C; r++) { // looping over C segments
......
openair1/SCHED_NR/fapi_nr_l1.c
View file @ d013302c
......@@ -160,6 +160,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
gNB->dlsch[i][0]->harq_mask=0;
}
gNB->pdcch_pdu = NULL;
gNB->ul_dci_pdu = NULL;
gNB->pbch_configured=0;
for (int i=0;i<number_dl_pdu;i++) {
......
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @ d013302c
......@@ -162,7 +162,7 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
if (gNB->pdcch_pdu || gNB->ul_dci_pdu) {
LOG_D(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
LOG_I(PHY, "[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)\n",
gNB->Mod_id, frame, slot,
gNB->ul_dci_pdu==NULL?0:gNB->ul_dci_pdu->pdcch_pdu.pdcch_pdu_rel15.numDlDci,
gNB->pdcch_pdu==NULL?0:gNB->pdcch_pdu->pdcch_pdu_rel15.numDlDci);
......@@ -438,6 +438,9 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
(ulsch_harq->slot == slot_rx) &&
(ulsch_harq->handled == 0)){
LOG_I(PHY, "PUSCH generation started in frame %d slot %d\n",
frame_rx,slot_rx);
#ifdef DEBUG_RXDATA
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
RU_t *ru = gNB->RU_list[0];
......@@ -445,7 +448,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
slot_offset -= ru->N_TA_offset;
char name[128];
FILE *f;
sprintf(name, "rxdata.%d.%d.raw", frame_rx,slot_rx);
sprintf(name, "rxdata.%d.%d.%d.raw", ulsch->rnti,frame_rx,slot_rx);
f = fopen(name, "w"); if (f == NULL) exit(1);
fwrite(&ru->common.rxdata[0][slot_offset],2,frame_parms->get_samples_per_slot(slot_rx,frame_parms)*2, f);
fclose(f);
......@@ -454,14 +457,18 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
uint8_t symbol_start = ulsch_harq->ulsch_pdu.start_symbol_index;
uint8_t symbol_end = symbol_start + ulsch_harq->ulsch_pdu.nr_of_symbols;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH,1);
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
}
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
if (no_sig) {
LOG_I(PHY, "ULSCH %d not received\n",ULSCH_id);
return;
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH,0);
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[0]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[0]->rxdataF_ext[0],6900,1,1);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_ULSCH_PROCEDURES_RX,1);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
nr_ulsch_procedures(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_ULSCH_PROCEDURES_RX,0);
break;
}
......
openair1/SIMULATION/NR_PHY/ulsim.c
View file @ d013302c
......@@ -104,6 +104,7 @@ int rrc_init_nr_global_param(void){return(0);}
// needed for some functions
uint16_t n_rnti = 0x1234;
openair0_config_t openair0_cfg[MAX_CARDS];
uint8_t round_rv_map[4] = {1, 0, 2, 3};
int main(int argc, char **argv)
{
......@@ -146,6 +147,7 @@ int main(int argc, char **argv)
int print_perf = 0;
cpuf = get_cpu_freq_GHz();
int msg3_flag = 0;
uint8_t rv_index = 0;
UE_nr_rxtx_proc_t UE_proc;
FILE *scg_fd=NULL;
......@@ -556,6 +558,7 @@ int main(int argc, char **argv)
uint16_t n_rb1 = 75;
uint8_t mcs_table = 0;
uint16_t pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA; // | PUSCH_PDU_BITMAP_PUSCH_PTRS;
uint8_t max_rounds = 4;
uint8_t length_dmrs = pusch_len1; // [hna] remove dmrs struct
uint16_t l_prime_mask = get_l_prime(nb_symb_sch, typeB, pusch_dmrs_pos0, length_dmrs); // [hna] remove dmrs struct
......@@ -574,10 +577,18 @@ int main(int argc, char **argv)
printf("\n");
for (int i=0;i<16;i++) printf("%f\n",gaussdouble(0.0,1.0));
//for (int i=0;i<16;i++) printf("%f\n",gaussdouble(0.0,1.0));
for (SNR = snr0; SNR < snr1; SNR += snr_step) {
varArray_t *table_rx=initVarArray(1000,sizeof(double));
varArray_t *table_rx=initVarArray(1000,sizeof(double));
for (trial = 0; trial < n_trials; trial++) {
uint8_t round = 0;
int error_flag;
gNB->ulsch[0][0]->harq_mask = 0;
while (round<max_rounds && !(gNB->ulsch[0][0]->harq_mask & 0x1)) {
ulsch_ue[0]->harq_processes[harq_pid]->round = round;
gNB->ulsch[0][0]->harq_processes[harq_pid]->round = round;
rv_index = round_rv_map[round];
reset_meas(&gNB->phy_proc_rx);
reset_meas(&gNB->ulsch_decoding_stats);
reset_meas(&gNB->ulsch_deinterleaving_stats);
......@@ -658,9 +669,9 @@ int main(int argc, char **argv)
pusch_pdu->uplink_frequency_shift_7p5khz = 0;
pusch_pdu->start_symbol_index = start_symbol;
pusch_pdu->nr_of_symbols = nb_symb_sch;
pusch_pdu->pusch_data.rv_index = 0;
pusch_pdu->pusch_data.rv_index = rv_index;
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = 0;
pusch_pdu->pusch_data.new_data_indicator = trial & 0x1;
pusch_pdu->pusch_data.num_cb = 0;
pusch_pdu->pusch_ptrs.ptrs_time_density = ptrs_time_density;
pusch_pdu->pusch_ptrs.ptrs_freq_density = ptrs_freq_density;
......@@ -694,8 +705,8 @@ int main(int argc, char **argv)
ul_config.ul_config_list[0].pusch_config_pdu.mcs_index = Imcs;
ul_config.ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
ul_config.ul_config_list[0].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 1;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = 0;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = trial & 0x1;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = rv_index;
ul_config.ul_config_list[0].pusch_config_pdu.nrOfLayers = precod_nbr_layers;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.harq_process_id = harq_pid;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_time_density = ptrs_time_density;
......@@ -762,8 +773,6 @@ int main(int argc, char **argv)
errors_scrambling = 0;
errors_decoding = 0;
int error_flag;
for (trial = 0; trial < n_trials; trial++) {
error_flag = 0;
//----------------------------------------------------------
......@@ -833,6 +842,9 @@ int main(int argc, char **argv)
error_flag = 1;
n_errors++;
}
printf("end of round %d rv_index %d\n",round, rv_index);
round++;
} // round
//----------------------------------------------------------
//----------------- count and print errors -----------------
......@@ -868,11 +880,11 @@ int main(int argc, char **argv)
if (n_trials == 1) {
for (int r=0;r<ulsch_ue[0]->harq_processes[harq_pid]->C;r++)
for (int i=0;i<ulsch_ue[0]->harq_processes[harq_pid]->K>>3;i++) {
if ((ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]) != 0) printf("************");
/*if ((ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]) != 0) printf("************");
printf("r %d: in[%d] %x, out[%d] %x (%x)\n",r,
i,ulsch_ue[0]->harq_processes[harq_pid]->c[r][i],
i,ulsch_gNB->harq_processes[harq_pid]->c[r][i],
ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]);
ulsch_ue[0]->harq_processes[harq_pid]->c[r][i]^ulsch_gNB->harq_processes[harq_pid]->c[r][i]);*/
}
}
if (errors_decoding > 0 && error_flag == 0) {
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac.h
View file @ d013302c
......@@ -251,9 +251,8 @@ typedef struct {
uint8_t short_messages; //8 bits
uint8_t tb_scaling; //2 bits
uint8_t pucch_resource_indicator; //3 bits
uint8_t dmrs_sequence_initialization; //1 bit
uint8_t system_info_indicator; //1 bit
uint8_t ulsch_indicator;
uint8_t slot_format_indicator_count;
uint8_t *slot_format_indicators;
......@@ -290,6 +289,7 @@ typedef struct {
dci_field_t cloded_loop_indicator; //variable
dci_field_t ul_sul_indicator; //variable
dci_field_t antenna_ports; //variable
dci_field_t dmrs_sequence_initialization;
dci_field_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
} dci_pdu_rel15_t;
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
View file @ d013302c
......@@ -77,7 +77,8 @@ int is_nr_DL_slot(NR_ServingCellConfigCommon_t *scc,slot_t slotP);
int is_nr_UL_slot(NR_ServingCellConfigCommon_t *scc,slot_t slotP);
uint16_t nr_dci_size(NR_CellGroupConfig_t *secondaryCellGroup,
uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
NR_CellGroupConfig_t *secondaryCellGroup,
dci_pdu_rel15_t *dci_pdu,
nr_dci_format_t format,
nr_rnti_type_t rnti_type,
......@@ -103,6 +104,8 @@ uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
uint8_t nb_preambles,
uint8_t unpaired);
int ul_ant_bits(NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig,long transformPrecoder);
int get_format0(uint8_t index, uint8_t unpaired);
uint16_t get_NCS(uint8_t index, uint16_t format, uint8_t restricted_set_config);
......
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
View file @ d013302c
......@@ -223,7 +223,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); // NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
rel15->dci_length = nr_dci_size(mac->scg,def_dci_pdu_rel15,rel15->dci_format,NR_RNTI_C,rel15->BWPSize,bwp_id);
rel15->dci_length = nr_dci_size(scc,mac->scg,def_dci_pdu_rel15,rel15->dci_format,NR_RNTI_C,rel15->BWPSize,bwp_id);
for (int i = 0; i < sps; i++)
if ((monitoringSymbolsWithinSlot >> (sps - 1 - i)) & 1) {
rel15->coreset.StartSymbolIndex = i;
......@@ -243,7 +243,7 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275);
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275);
rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
rel15->dci_length = nr_dci_size(mac->scg,def_dci_pdu_rel15,rel15->dci_format,NR_RNTI_C,rel15->BWPSize,bwp_id);
rel15->dci_length = nr_dci_size(scc,mac->scg,def_dci_pdu_rel15,rel15->dci_format,NR_RNTI_C,rel15->BWPSize,bwp_id);
// get UE-specific search space
for (ss_id = 0; ss_id < FAPI_NR_MAX_SS_PER_CORESET && mac->SSpace[0][0][ss_id] != NULL; ss_id++){
uss = mac->SSpace[0][0][ss_id];
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ d013302c
......@@ -773,8 +773,8 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
uint16_t rnti = 0x1234;
uint32_t rb_size = 50;
uint32_t rb_start = 0;
uint8_t nr_of_symbols = 12;
uint8_t start_symbol_index = 2;
uint8_t nr_of_symbols = 11;
uint8_t start_symbol_index = 0;
uint8_t nrOfLayers = 1;
uint8_t mcs_index = 9;
uint8_t mcs_table = 0;
......@@ -3530,7 +3530,7 @@ void nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
dci_pdu_rel15->cbgfi.val = (*dci_pdu>>(dci_size-pos))&((1<<dci_pdu_rel15->cbgfi.nbits)-1);
// DMRS sequence init
pos+=1;
dci_pdu_rel15->dmrs_sequence_initialization = (*dci_pdu>>(dci_size-pos))&0x1;
dci_pdu_rel15->dmrs_sequence_initialization.val = (*dci_pdu>>(dci_size-pos))&0x1;
break;
}
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ d013302c
......@@ -288,6 +288,26 @@ void copy_nr_ulreq(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
}
*/
void nr_schedule_pusch(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP) {
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
NR_UE_list_t *UE_list = &RC.nrmac[Mod_idP]->UE_list;
NR_sched_pusch *pusch = UE_list->UE_sched_ctrl[UE_id].sched_pusch;
if ((pusch->active == true) && (frameP == pusch->frame) && (slotP == pusch->slot)) {
UL_tti_req->SFN = pusch->frame;
UL_tti_req->Slot = pusch->slot;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pusch_pdu_t);
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pusch_pdu = pusch->pusch_pdu;
UL_tti_req->n_pdus+=1;
memset((void *) UE_list->UE_sched_ctrl[UE_id].sched_pusch,
0, sizeof(NR_sched_pusch));
}
}
void nr_schedule_pucch(int Mod_idP,
int UE_id,
frame_t frameP,
......@@ -361,6 +381,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
int UE_id;
uint64_t *dlsch_in_slot_bitmap=NULL;
uint64_t *ulsch_in_slot_bitmap=NULL;
int pucch_sched;
UE_id=0;
int bwp_id = 1;
......@@ -412,93 +433,97 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
*ulsch_in_slot_bitmap = 0x00;
}
// Check if there are downlink symbols in the slot,
if (is_nr_DL_slot(cc->ServingCellConfigCommon,slot_txP)) {
memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
//mbsfn_status[CC_id] = 0;
// clear vrb_maps
memset(cc[CC_id].vrb_map, 0, 100);
memset(cc[CC_id].vrb_map_UL, 0, 100);
memset(RC.nrmac[module_idP]->cce_list[bwp_id][0],0,MAX_NUM_CCE*sizeof(int)); // coreset0
memset(RC.nrmac[module_idP]->cce_list[bwp_id][1],0,MAX_NUM_CCE*sizeof(int)); // coresetid 1
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
//mbsfn_status[CC_id] = 0;
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame_txP, slot_txP);
}
// clear vrb_maps
memset(cc[CC_id].vrb_map, 0, 100);
memset(cc[CC_id].vrb_map_UL, 0, 100);
// refresh UE list based on UEs dropped by PHY in previous subframe
/*
for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
if (UE_list->active[i]) {
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame_txP, slot_txP);
}
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
rnti = 0;//UE_RNTI(module_idP, i);
CC_id = 0;//UE_PCCID(module_idP, i);
// refresh UE list based on UEs dropped by PHY in previous subframe
/*
for (i = 0; i < MAX_MOBILES_PER_GNB; i++) {
if (UE_list->active[i]) {
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
*/
nfapi_nr_config_request_t *cfg = &RC.nrmac[module_idP]->config[CC_id];
rnti = 0;//UE_RNTI(module_idP, i);
CC_id = 0;//UE_PCCID(module_idP, i);
// This schedules MIB
if((slot_txP == 0) && (frame_txP & 7) == 0){
schedule_nr_mib(module_idP, frame_txP, slot_txP);
}
} //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
*/
if (get_softmodem_params()->phy_test == 0)
nr_schedule_RA(module_idP, frame_txP, slot_txP);
else
UE_list->fiveG_connected[UE_id] = true;
// This schedules MIB
if((slot_txP == 0) && (frame_txP & 7) == 0){
schedule_nr_mib(module_idP, frame_txP, slot_txP);
}
// Phytest scheduling
// This schedule PRACH if we are not in phy_test mode
if (get_softmodem_params()->phy_test == 0)
schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
if (get_softmodem_params()->phy_test) {
// This schedule SR
// TODO
// TbD once RACH is available, start ta_timer when UE is connected
if (ue_sched_ctl->ta_timer)
ue_sched_ctl->ta_timer--;
// This schedule CSI
// TODO
if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl->ta_timer = 100;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */
gNB->ta_len = 2;
}
// This schedule RA procedure if not in phy_test mode
// Otherwise already consider 5G already connected
if (get_softmodem_params()->phy_test == 0) {
nr_schedule_RA(module_idP, frame_txP, slot_txP);
nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
}
else
UE_list->fiveG_connected[UE_id] = true;
if (get_softmodem_params()->phy_test) {
// TbD once RACH is available, start ta_timer when UE is connected
if (ue_sched_ctl->ta_timer)
ue_sched_ctl->ta_timer--;
if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update;
/* if time is up, then set the timer to not send it for 5 frames
// regardless of the TA value */
ue_sched_ctl->ta_timer = 100;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */
gNB->ta_len = 2;
}
}
if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) {
ue_sched_ctl->current_harq_pid = slot_txP % num_slots_per_tdd;
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, num_slots_per_tdd, NULL);
// resetting ta flag
gNB->ta_len = 0;
}
// This schedules the DCI for Uplink and subsequently PUSCH
if (UE_list->fiveG_connected[UE_id]) {
int tda = 1; // time domain assignment hardcoded for now
schedule_fapi_ul_pdu(module_idP, frame_txP, slot_txP, num_slots_per_tdd, tda);
nr_schedule_pusch(module_idP, UE_id, frame_rxP, slot_rxP);
}
if (UE_list->fiveG_connected[UE_id] && (is_xlsch_in_slot(*dlsch_in_slot_bitmap,slot_txP%num_slots_per_tdd))) {
ue_sched_ctl->current_harq_pid = slot_txP % num_slots_per_tdd;
nr_update_pucch_scheduling(module_idP, UE_id, frame_txP, slot_txP, num_slots_per_tdd,&pucch_sched);
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, &UE_list->UE_sched_ctrl[UE_id].sched_pucch[pucch_sched], NULL);
// resetting ta flag
gNB->ta_len = 0;
}
if (UE_list->fiveG_connected[UE_id])
nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
/*
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
*/
} //is_nr_DL_slot
if (is_nr_UL_slot(cc->ServingCellConfigCommon,slot_rxP)) {
if (get_softmodem_params()->phy_test == 0) {
if (UE_list->fiveG_connected[UE_id])
nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
schedule_nr_prach(module_idP, (frame_rxP+1)&1023, slot_rxP);
nr_schedule_reception_msg3(module_idP, 0, frame_rxP, slot_rxP);
}
if (get_softmodem_params()->phy_test){
nr_schedule_pucch(module_idP, UE_id, frame_rxP, slot_rxP);
if (is_xlsch_in_slot(*ulsch_in_slot_bitmap,slot_rxP%num_slots_per_tdd)){
nr_schedule_uss_ulsch_phytest(module_idP, frame_rxP, slot_rxP);
}
}
}
stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
View file @ d013302c
......@@ -54,115 +54,117 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[module_idP]->UL_tti_req[0];
uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
uint8_t mu,N_dur,N_t_slot,start_symbol;
uint16_t format;
if (is_nr_UL_slot(scc,slotP)) {
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
mu = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
mu = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
// prach is scheduled according to configuration index and tables 6.3.3.2.2 to 6.3.3.2.4
if ( get_nr_prach_info_from_index(config_index,
(int)frameP,
(int)slotP,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA,
mu,
cc->frame_type,
&format,
&start_symbol,
&N_t_slot,
&N_dur) ) {
int fdm = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM;
uint16_t format0 = format&0xff; // first column of format from table
uint16_t format1 = (format>>8)&0xff; // second column of format from table
UL_tti_req->SFN = frameP;
UL_tti_req->Slot = slotP;
for (int n=0; n<(1<<fdm); n++) { // one structure per frequency domain occasion
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_prach_pdu_t);
nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].prach_pdu;
memset(prach_pdu,0,sizeof(nfapi_nr_prach_pdu_t));
UL_tti_req->n_pdus+=1;
// filling the prach fapi structure
prach_pdu->phys_cell_id = *scc->physCellId;
prach_pdu->num_prach_ocas = N_t_slot;
prach_pdu->prach_start_symbol = start_symbol;
prach_pdu->num_ra = n;
prach_pdu->num_cs = get_NCS(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig,
format0,
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig);
// SCF PRACH PDU format field does not consider A1/B1 etc. possibilities
// We added 9 = A1/B1 10 = A2/B2 11 A3/B3
if (format1!=0xff) {
switch(format0) {
case 0xa1:
prach_pdu->prach_format = 9;
break;
case 0xa2:
prach_pdu->prach_format = 10;
break;
case 0xa3:
prach_pdu->prach_format = 11;
break;
default:
AssertFatal(1==0,"Only formats A1/B1 A2/B2 A3/B3 are valid for dual format");
uint8_t config_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
uint8_t mu,N_dur,N_t_slot,start_symbol;
uint16_t format;
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
mu = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
mu = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
// prach is scheduled according to configuration index and tables 6.3.3.2.2 to 6.3.3.2.4
if ( get_nr_prach_info_from_index(config_index,
(int)frameP,
(int)slotP,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA,
mu,
cc->frame_type,
&format,
&start_symbol,
&N_t_slot,
&N_dur) ) {
int fdm = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM;
uint16_t format0 = format&0xff; // first column of format from table
uint16_t format1 = (format>>8)&0xff; // second column of format from table
UL_tti_req->SFN = frameP;
UL_tti_req->Slot = slotP;
for (int n=0; n<(1<<fdm); n++) { // one structure per frequency domain occasion
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PRACH_PDU_TYPE;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_prach_pdu_t);
nfapi_nr_prach_pdu_t *prach_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].prach_pdu;
memset(prach_pdu,0,sizeof(nfapi_nr_prach_pdu_t));
UL_tti_req->n_pdus+=1;
// filling the prach fapi structure
prach_pdu->phys_cell_id = *scc->physCellId;
prach_pdu->num_prach_ocas = N_t_slot;
prach_pdu->prach_start_symbol = start_symbol;
prach_pdu->num_ra = n;
prach_pdu->num_cs = get_NCS(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig,
format0,
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig);
// SCF PRACH PDU format field does not consider A1/B1 etc. possibilities
// We added 9 = A1/B1 10 = A2/B2 11 A3/B3
if (format1!=0xff) {
switch(format0) {
case 0xa1:
prach_pdu->prach_format = 9;
break;
case 0xa2:
prach_pdu->prach_format = 10;
break;
case 0xa3:
prach_pdu->prach_format = 11;
break;
default:
AssertFatal(1==0,"Only formats A1/B1 A2/B2 A3/B3 are valid for dual format");
}
}
}
else{
switch(format0) {
case 0xa1:
prach_pdu->prach_format = 0;
break;
case 0xa2:
prach_pdu->prach_format = 1;
break;
case 0xa3:
prach_pdu->prach_format = 2;
break;
case 0xb1:
prach_pdu->prach_format = 3;
break;
case 0xb2:
prach_pdu->prach_format = 4;
break;
case 0xb3:
prach_pdu->prach_format = 5;
break;
case 0xb4:
prach_pdu->prach_format = 6;
break;
case 0xc0:
prach_pdu->prach_format = 7;
break;
case 0xc2:
prach_pdu->prach_format = 8;
break;
case 0:
// long formats are handled @ PHY
break;
case 1:
// long formats are handled @ PHY
break;
case 2:
// long formats are handled @ PHY
break;
case 3:
// long formats are handled @ PHY
break;
default:
AssertFatal(1==0,"Invalid PRACH format");
else{
switch(format0) {
case 0xa1:
prach_pdu->prach_format = 0;
break;
case 0xa2:
prach_pdu->prach_format = 1;
break;
case 0xa3:
prach_pdu->prach_format = 2;
break;
case 0xb1:
prach_pdu->prach_format = 3;
break;
case 0xb2:
prach_pdu->prach_format = 4;
break;
case 0xb3:
prach_pdu->prach_format = 5;
break;
case 0xb4:
prach_pdu->prach_format = 6;
break;
case 0xc0:
prach_pdu->prach_format = 7;
break;
case 0xc2:
prach_pdu->prach_format = 8;
break;
case 0:
// long formats are handled @ PHY
break;
case 1:
// long formats are handled @ PHY
break;
case 2:
// long formats are handled @ PHY
break;
case 3:
// long formats are handled @ PHY
break;
default:
AssertFatal(1==0,"Invalid PRACH format");
}
}
}
}
}
}
void nr_schedule_msg2(uint16_t rach_frame, uint16_t rach_slot,
uint16_t *msg2_frame, uint16_t *msg2_slot,
NR_ServingCellConfigCommon_t *scc,
......@@ -688,7 +690,7 @@ void nr_generate_Msg2(module_id_t module_idP,
pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols);
fill_dci_pdu_rel15(secondaryCellGroup,pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types,dci10_bw,ra->bwp_id);
fill_dci_pdu_rel15(scc,secondaryCellGroup,pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types,dci10_bw,ra->bwp_id);
dl_req->nPDUs+=2;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
View file @ d013302c
......@@ -734,6 +734,19 @@ void prepare_dci(NR_CellGroupConfig_t *secondaryCellGroup,
NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
switch(format) {
case NR_UL_DCI_FORMAT_0_1:
// format indicator
dci_pdu_rel15->format_indicator = 0;
// carrier indicator
if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->crossCarrierSchedulingConfig != NULL)
AssertFatal(1==0,"Cross Carrier Scheduling Config currently not supported\n");
// supplementary uplink
if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->supplementaryUplink != NULL)
AssertFatal(1==0,"Supplementary Uplink currently not supported\n");
// SRS request
dci_pdu_rel15->srs_request.val = 0;
dci_pdu_rel15->ulsch_indicator = 1;
break;
case NR_DL_DCI_FORMAT_1_1:
// format indicator
dci_pdu_rel15->format_indicator = 1;
......@@ -782,16 +795,15 @@ void prepare_dci(NR_CellGroupConfig_t *secondaryCellGroup,
// CBGTI and CBGFI
if (secondaryCellGroup->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->codeBlockGroupTransmission != NULL)
AssertFatal(1==0,"CBG transmission currently not supported\n");
// dmrs sequence initialization
dci_pdu_rel15->dmrs_sequence_initialization = 0; // FIXME no information on what this bit should be in 38.212
break;
default :
AssertFatal(1==0,"Prepare dci currently only implemented for 1_1 \n");
AssertFatal(1==0,"Prepare dci currently only implemented for 1_1 and 0_1 \n");
}
}
void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
NR_CellGroupConfig_t *secondaryCellGroup,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
dci_pdu_rel15_t *dci_pdu_rel15,
int *dci_formats,
......@@ -804,11 +816,11 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
uint64_t *dci_pdu = (uint64_t *)pdcch_pdu_rel15->dci_pdu.Payload[d];
int dci_size = nr_dci_size(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],rnti_types[d],N_RB,bwp_id);
int dci_size = nr_dci_size(scc,secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],rnti_types[d],N_RB,bwp_id);
pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d] = dci_size;
AssertFatal(pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d]<=64, "DCI sizes above 64 bits not yet supported");
if(dci_formats[d]==NR_DL_DCI_FORMAT_1_1)
if(dci_formats[d]==NR_DL_DCI_FORMAT_1_1 || dci_formats[d]==NR_UL_DCI_FORMAT_0_1)
prepare_dci(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],bwp_id);
/// Payload generation
......@@ -1118,6 +1130,110 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
}
break;
case NR_UL_DCI_FORMAT_0_1:
switch(rnti_types[d])
{
case NR_RNTI_C:
// Indicating a DL DCI format 1bit
pos=1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->format_indicator&0x1)<<(dci_size-pos);
// Carrier indicator
pos+=dci_pdu_rel15->carrier_indicator.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->carrier_indicator.val&((1<<dci_pdu_rel15->carrier_indicator.nbits)-1))<<(dci_size-pos);
// UL/SUL Indicator
pos+=dci_pdu_rel15->ul_sul_indicator.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ul_sul_indicator.val&((1<<dci_pdu_rel15->ul_sul_indicator.nbits)-1))<<(dci_size-pos);
// BWP indicator
pos+=dci_pdu_rel15->bwp_indicator.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->bwp_indicator.val&((1<<dci_pdu_rel15->bwp_indicator.nbits)-1))<<(dci_size-pos);
// Frequency domain resource assignment
pos+=dci_pdu_rel15->frequency_domain_assignment.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val&((1<<dci_pdu_rel15->frequency_domain_assignment.nbits)-1)) << (dci_size-pos);
// Time domain resource assignment
pos+=dci_pdu_rel15->time_domain_assignment.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->time_domain_assignment.val&((1<<dci_pdu_rel15->time_domain_assignment.nbits)-1)) << (dci_size-pos);
// Frequency hopping
pos+=dci_pdu_rel15->frequency_hopping_flag.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->frequency_hopping_flag.val&((1<<dci_pdu_rel15->frequency_hopping_flag.nbits)-1)) << (dci_size-pos);
// MCS 5bit
pos+=5;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
// New data indicator 1bit
pos+=1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ndi&0x1)<<(dci_size-pos);
// Redundancy version 2bit
pos+=2;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->rv&0x3)<<(dci_size-pos);
// HARQ process number 4bit
pos+=4;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->harq_pid&0xf)<<(dci_size-pos);
// 1st Downlink assignment index
pos+=dci_pdu_rel15->dai[0].nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[0].val&((1<<dci_pdu_rel15->dai[0].nbits)-1))<<(dci_size-pos);
// 2nd Downlink assignment index
pos+=dci_pdu_rel15->dai[1].nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->dai[1].val&((1<<dci_pdu_rel15->dai[1].nbits)-1))<<(dci_size-pos);
// TPC command for scheduled PUSCH 2bit
pos+=2;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->tpc&0x3)<<(dci_size-pos);
// SRS resource indicator
pos+=dci_pdu_rel15->srs_resource_indicator.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->srs_resource_indicator.val&((1<<dci_pdu_rel15->srs_resource_indicator.nbits)-1))<<(dci_size-pos);
// Precoding info and n. of layers
pos+=dci_pdu_rel15->precoding_information.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->precoding_information.val&((1<<dci_pdu_rel15->precoding_information.nbits)-1))<<(dci_size-pos);
// Antenna ports
pos+=dci_pdu_rel15->antenna_ports.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->antenna_ports.val&((1<<dci_pdu_rel15->antenna_ports.nbits)-1))<<(dci_size-pos);
// SRS request
pos+=dci_pdu_rel15->srs_request.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->srs_request.val&((1<<dci_pdu_rel15->srs_request.nbits)-1))<<(dci_size-pos);
// CSI request
pos+=dci_pdu_rel15->csi_request.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->csi_request.val&((1<<dci_pdu_rel15->csi_request.nbits)-1))<<(dci_size-pos);
// CBG transmission information
pos+=dci_pdu_rel15->cbgti.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->cbgti.val&((1<<dci_pdu_rel15->cbgti.nbits)-1))<<(dci_size-pos);
// PTRS DMRS association
pos+=dci_pdu_rel15->ptrs_dmrs_association.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ptrs_dmrs_association.val&((1<<dci_pdu_rel15->ptrs_dmrs_association.nbits)-1))<<(dci_size-pos);
// Beta offset indicator
pos+=dci_pdu_rel15->beta_offset_indicator.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->beta_offset_indicator.val&((1<<dci_pdu_rel15->beta_offset_indicator.nbits)-1))<<(dci_size-pos);
// DMRS sequence initialization
pos+=dci_pdu_rel15->dmrs_sequence_initialization.nbits;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val&((1<<dci_pdu_rel15->dmrs_sequence_initialization.nbits)-1))<<(dci_size-pos);
// UL-SCH indicator
pos+=1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->ulsch_indicator&0x1)<<(dci_size-pos);
break;
}
break;
case NR_DL_DCI_FORMAT_1_1:
// Indicating a DL DCI format 1bit
pos=1;
......@@ -1223,7 +1339,7 @@ void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
// DMRS sequence init
pos+=1;
*dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization&0x1)<<(dci_size-pos);
*dci_pdu |= ((uint64_t)dci_pdu_rel15->dmrs_sequence_initialization.val&0x1)<<(dci_size-pos);
}
}
}
......@@ -1352,6 +1468,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
0,
sizeof(NR_UE_sched_ctrl_t));
UE_list->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch));
UE_list->UE_sched_ctrl[UE_id].sched_pusch = (NR_sched_pusch *)malloc(sizeof(NR_sched_pusch));
LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n",
mod_idP,
UE_id,
......
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @ d013302c
......@@ -132,7 +132,13 @@ int configure_fapi_dl_pdu(int Mod_id,
uint16_t *rbSize,
uint16_t *rbStart);
void config_uldci(NR_BWP_Uplink_t *ubwp,nfapi_nr_pusch_pdu_t *pusch_pdu,nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15, dci_pdu_rel15_t *dci_pdu_rel15, int *dci_formats, int *rnti_types);
void config_uldci(NR_BWP_Uplink_t *ubwp,
nfapi_nr_pusch_pdu_t *pusch_pdu,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
dci_pdu_rel15_t *dci_pdu_rel15,
int *dci_formats, int *rnti_types,
int time_domain_assignment,
int n_ubwp, int bwp_id);
void configure_fapi_dl_Tx(module_id_t Mod_idP,
frame_t frameP,
......@@ -148,9 +154,10 @@ void nr_schedule_uss_dlsch_phytest(module_id_t module_idP,
int num_slots_per_tdd,
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_config);
void nr_schedule_uss_ulsch_phytest(int Mod_idP,
frame_t frameP,
sub_frame_t slotP);
void nr_schedule_pusch(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP);
void nr_update_pucch_scheduling(int Mod_idP,
int UE_id,
......@@ -203,7 +210,8 @@ int nr_configure_pdcch(gNB_MAC_INST *nr_mac,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_Downlink_t *bwp);
void fill_dci_pdu_rel15(NR_CellGroupConfig_t *secondaryCellGroup,
void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
NR_CellGroupConfig_t *secondaryCellGroup,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
dci_pdu_rel15_t *dci_pdu_rel15,
int *dci_formats,
......@@ -281,6 +289,11 @@ void nr_generate_Msg2(module_id_t module_idP,
void nr_schedule_reception_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP);
void schedule_fapi_ul_pdu(int Mod_idP,
frame_t frameP,
sub_frame_t slotP,
int num_slots_per_tdd,
int time_domain_assignment);
void nr_process_mac_pdu(
module_id_t module_idP,
......@@ -289,6 +302,10 @@ void nr_process_mac_pdu(
uint8_t *pduP,
uint16_t mac_pdu_len);
int binomial(int n, int k);
bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot);
/* \brief Function to indicate a received SDU on ULSCH.
@param Mod_id Instance ID of gNB
......
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @ d013302c
......@@ -253,6 +253,13 @@ typedef struct NR_sched_pucch {
uint8_t resource_indicator;
} NR_sched_pucch;
typedef struct NR_sched_pusch {
int frame;
int slot;
bool active;
nfapi_nr_pusch_pdu_t pusch_pdu;
} NR_sched_pusch;
typedef struct NR_UE_harq {
uint8_t is_waiting;
uint8_t ndi;
......@@ -265,6 +272,7 @@ typedef struct {
uint64_t dlsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains dlsch
uint64_t ulsch_in_slot_bitmap; // static bitmap signaling which slot in a tdd period contains ulsch
NR_sched_pucch *sched_pucch;
NR_sched_pusch *sched_pusch;
uint16_t ta_timer;
int16_t ta_update;
uint8_t current_harq_pid;
......
openair2/RRC/LTE/MESSAGES/asn1_msg.c
View file @ d013302c
......@@ -3198,6 +3198,42 @@ uint8_t do_UECapabilityEnquiry( const protocol_ctxt_t *const ctxt_pP,
ASN_SEQUENCE_ADD(&dl_dcch_msg.message.choice.c1.choice.ueCapabilityEnquiry.criticalExtensions.choice.c1.choice.ueCapabilityEnquiry_r8.ue_CapabilityRequest.list,
&rat);
/* request NR configuration */
LTE_UECapabilityEnquiry_r8_IEs_t *r8 = &dl_dcch_msg.message.choice.c1.choice.ueCapabilityEnquiry.criticalExtensions.choice.c1.choice.ueCapabilityEnquiry_r8;
LTE_UECapabilityEnquiry_v8a0_IEs_t r8_a0;
LTE_UECapabilityEnquiry_v1180_IEs_t r11_80;
LTE_UECapabilityEnquiry_v1310_IEs_t r13_10;
LTE_UECapabilityEnquiry_v1430_IEs_t r14_30;
LTE_UECapabilityEnquiry_v1510_IEs_t r15_10;
memset(&r8_a0, 0, sizeof(r8_a0));
memset(&r11_80, 0, sizeof(r11_80));
memset(&r13_10, 0, sizeof(r13_10));
memset(&r14_30, 0, sizeof(r14_30));
memset(&r15_10, 0, sizeof(r15_10));
r8->nonCriticalExtension = &r8_a0;
r8_a0.nonCriticalExtension = &r11_80;
r11_80.nonCriticalExtension = &r13_10;
r13_10.nonCriticalExtension = &r14_30;
r14_30.nonCriticalExtension = &r15_10;
/* TODO: no hardcoded values here */
OCTET_STRING_t req_freq;
unsigned char req_freq_buf[5] = { 0x00, 0x20, 0x1a, 0x02, 0x68 }; // bands 7 & nr78
//unsigned char req_freq_buf[5] = { 0x00, 0x20, 0x1a, 0x08, 0x18 }; // bands 7 & nr260
//unsigned char req_freq_buf[13] = { 0x00, 0xc0, 0x18, 0x01, 0x01, 0x30, 0x4b, 0x04, 0x0e, 0x08, 0x24, 0x04, 0xd0 };
// unsigned char req_freq_buf[21] = {
//0x01, 0x60, 0x18, 0x05, 0x80, 0xc0, 0x04, 0x04, 0xc1, 0x2c, 0x10, 0x08, 0x20, 0x30, 0x40, 0xe0, 0x82, 0x40, 0x28, 0x80, 0x9a
// };
req_freq.buf = req_freq_buf;
req_freq.size = 5;
// req_freq.size = 21;
r15_10.requestedFreqBandsNR_MRDC_r15 = &req_freq;
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_LTE_DL_DCCH_Message, (void *)&dl_dcch_msg);
}
......@@ -3276,17 +3312,17 @@ uint8_t do_NR_UECapabilityEnquiry( const protocol_ctxt_t *const ctxt_pP,
/* TODO: no hardcoded values here */
OCTET_STRING_t req_freq;
//unsigned char req_freq_buf[5] = { 0x00, 0x20, 0x1a, 0x02, 0x68 }; // bands 7 & nr78
unsigned char req_freq_buf[5] = { 0x00, 0x20, 0x1a, 0x02, 0x68 }; // bands 7 & nr78
//unsigned char req_freq_buf[5] = { 0x00, 0x20, 0x1a, 0x08, 0x18 }; // bands 7 & nr260
//unsigned char req_freq_buf[13] = { 0x00, 0xc0, 0x18, 0x01, 0x01, 0x30, 0x4b, 0x04, 0x0e, 0x08, 0x24, 0x04, 0xd0 };
unsigned char req_freq_buf[21] = {
0x01, 0x60, 0x18, 0x05, 0x80, 0xc0, 0x04, 0x04, 0xc1, 0x2c, 0x10, 0x08, 0x20, 0x30, 0x40, 0xe0, 0x82, 0x40, 0x28, 0x80, 0x9a
};
// unsigned char req_freq_buf[21] = {
//0x01, 0x60, 0x18, 0x05, 0x80, 0xc0, 0x04, 0x04, 0xc1, 0x2c, 0x10, 0x08, 0x20, 0x30, 0x40, 0xe0, 0x82, 0x40, 0x28, 0x80, 0x9a
// };
req_freq.buf = req_freq_buf;
req_freq.size = 5;
req_freq.size = 21;
// req_freq.size = 21;
r15_10.requestedFreqBandsNR_MRDC_r15 = &req_freq;
......
openair2/RRC/NR/rrc_gNB_reconfig.c
View file @ d013302c
......@@ -837,7 +837,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup = calloc(1,sizeof(*pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup));
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
NR_DMRS_UplinkConfig->dmrs_Type = NULL;
NR_DMRS_UplinkConfig->dmrs_AdditionalPosition =NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos0;
NR_DMRS_UplinkConfig->dmrs_AdditionalPosition = calloc(1,sizeof(*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition));
*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition = NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos0;
NR_DMRS_UplinkConfig->phaseTrackingRS=NULL;
NR_DMRS_UplinkConfig->maxLength=NULL;
NR_DMRS_UplinkConfig->transformPrecodingDisabled = calloc(1,sizeof(*NR_DMRS_UplinkConfig->transformPrecodingDisabled));
......@@ -928,7 +929,7 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
srs_res0->resourceMapping.repetitionFactor=NR_SRS_Resource__resourceMapping__repetitionFactor_n1;
srs_res0->freqDomainPosition=0;
srs_res0->freqDomainShift=0;
srs_res0->freqHopping.c_SRS = 61;
srs_res0->freqHopping.c_SRS = 0;
srs_res0->freqHopping.b_SRS=0;
srs_res0->freqHopping.b_hop=0;
srs_res0->groupOrSequenceHopping=NR_SRS_Resource__groupOrSequenceHopping_neither;
......@@ -1107,7 +1108,19 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id = calloc(1,sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id));
*secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id = 1;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig = NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig = calloc(1,sizeof(*secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig));
NR_PUSCH_ServingCellConfig_t *pusch_scc = calloc(1,sizeof(*pusch_scc));
secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->present = NR_SetupRelease_PUSCH_ServingCellConfig_PR_setup;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup = pusch_scc;
pusch_scc->codeBlockGroupTransmission = NULL;
pusch_scc->rateMatching = NULL;
pusch_scc->xOverhead = NULL;
pusch_scc->ext1=calloc(1,sizeof(*pusch_scc->ext1));
pusch_scc->ext1->maxMIMO_Layers = calloc(1,sizeof(*pusch_scc->ext1->maxMIMO_Layers));
*pusch_scc->ext1->maxMIMO_Layers = 1;
pusch_scc->ext1->processingType2Enabled = NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->carrierSwitching = NULL;
secondaryCellGroup->spCellConfig->spCellConfigDedicated->supplementaryUplink=NULL;
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_enb.conf
View file @ d013302c
......@@ -235,7 +235,7 @@ MACRLCs = (
THREAD_STRUCT = (
{
parallel_config = "PARALLEL_RU_L1_TRX_SPLITaaaaaa";
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
worker_config = "ENABLE";
}
);
......
targets/PROJECTS/GENERIC-LTE-EPC/CONF/testing_gnb.conf
View file @ d013302c
......@@ -132,12 +132,12 @@ gNBs =
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
......@@ -266,8 +266,8 @@ RUs = (
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
//parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
parallel_config = "PARALLEL_SINGLE_THREAD";
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
//parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
......
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