- 27 Mar, 2017 1 commit
-
-
Elena_Lukashova authored
Now the llrs after SIC procedure are updated. In dlsim_tm in case of TB0_active==-1, the llr were taken from the wrong buffer, and in dlsch_demodulation the SIC llrs were written into the wrong buffer in the same case.
-
- 26 Mar, 2017 1 commit
-
-
Elena_Lukashova authored
-
- 25 Mar, 2017 1 commit
-
-
Elena_Lukashova authored
-
- 21 Mar, 2017 9 commits
-
-
Elena_Lukashova authored
-
Elena_Lukashova authored
-
Elena_Lukashova authored
Now it counts how many times the TBs were set to active.
-
Elena_Lukashova authored
-
Elena_Lukashova authored
-
Cedric Roux authored
dlsim_tm4 was crashing on massive. It was a problem of misalignment of variables. The generated code by the compiler was using 'movdqa' which requires alignment to 16 bytes. Let's put 32, just in case, for avx2 maybe (maybe not necessary but should not hurt).
-
Elena_Lukashova authored
-
Elena_Lukashova authored
-
Elena_Lukashova authored
-
- 20 Mar, 2017 13 commits
-
-
Elena_Lukashova authored
-
Cedric Roux authored
Develop integration w11 Summary of changes: - bug fixes - RCC/RRU in automatic test setup - more work on UE/MIMO - LimeSDR support (5/10MHz) - compilation under ubuntu 16.04, in particular kernel modules (nasmesh, ue_ip) See merge request !148
-
Cedric Roux authored
We'll need to to do it in a separate thread/process. To be done. In the meantime, put it back. It impacts oaisim.
-
Cedric Roux authored
Not sure of this one, to be checked by TCL.
-
Cedric Roux authored
the argument 'coded_bits_per_codeword' has to be an array in case of several codewords. The calling sites have been adapted. Today, only the first index is used, so calling sites where 'coded_bits_per_codeword' is an integer pass the address of it. It is expected that 'dump_dlsch2' will check in the future that there is one or two codewords and only access 'coded_bits_per_codeword[1]' when it's sure there are really two codewords.
-
Cedric Roux authored
- pucchsim - prachsim - pdcchsim - pbchsim - mbmssim Mostly, add and initialize the variable 'cpuf'. Also, pdcchsim was calling rx_pdcch with wrong arguments.
-
Cedric Roux authored
-
Cedric Roux authored
Same as previous commit 41dda3d3 but for dlsim.
-
Cedric Roux authored
The variables that were duplicated per processing thread were adapted. 'cpuf' was defined and initialized.
-
Cedric Roux authored
-
gabrielC authored
-
gabrielC authored
-
Elena_Lukashova authored
for DCI format 2. Temporaryly going back to the previous version of code. 2. Enabling rate adaptation with multiple HARQ rounds. (no change inside the rounds).
-
- 19 Mar, 2017 1 commit
-
-
Elena_Lukashova authored
-
- 17 Mar, 2017 7 commits
-
-
Cedric Roux authored
-
Cedric Roux authored
One check introduced by previous commit was not necessary.
-
Cedric Roux authored
-
Cedric Roux authored
-
Cedric Roux authored
- README.txt modified - tests added in test_case_list.xml (only for test setup v2) - python code modified - configuration files added
-
Cedric Roux authored
-
fnabet authored
-
- 16 Mar, 2017 7 commits
-
-
Florian Kaltenberger authored
-
Cedric Roux authored
-
Cedric Roux authored
-
Cedric Roux authored
-
Cedric Roux authored
-
Cedric Roux authored
-
gabrielC authored
-