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OpenXG
OpenXG-AIEngine
Commits
e533a8c0
Commit
e533a8c0
authored
Jan 27, 2021
by
wangdong
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fix
parent
30feed86
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1
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1 changed file
with
171 additions
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21 deletions
+171
-21
openair2/LAYER2/MAC/slicing/slicing.c
openair2/LAYER2/MAC/slicing/slicing.c
+171
-21
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openair2/LAYER2/MAC/slicing/slicing.c
View file @
e533a8c0
...
...
@@ -565,6 +565,8 @@ void static_dl(module_id_t mod_id,
LOG_D
(
MAC
,
"%4d.%d DL scheduler allocation list: %s
\n
"
,
frame
,
subframe
,
t
);
}
void
static_ul
(
module_id_t
mod_id
,
int
CC_id
,
frame_t
frame
,
...
...
@@ -833,12 +835,13 @@ int addmod_scn19_slice_dl(slice_info_t *si,
void
*
slice_params_dl
)
{
LOG_I
(
FLEXRAN_AGENT
,
"Begin addmod_static_slice_dl in Static Slicing Implementation
\n
"
);
scn19_slice_param_t
*
dl
=
slice_params_dl
;
//static
if
(
dl
->
typeid
==
1
){
if
(
dl
->
typeid
==
1
){
LOG_I
(
FLEXRAN_AGENT
,
"Begin addmod_static_slice_dl in Static Slicing Implementation
\n
"
);
if
(
dl
&&
dl
->
posLow
>
dl
->
posHigh
)
RET_FAIL
(
-
1
,
"%s(): slice id %d posLow > posHigh
\n
"
,
__func__
,
id
);
...
...
@@ -850,6 +853,7 @@ int addmod_scn19_slice_dl(slice_info_t *si,
for
(
int
s
=
0
;
s
<
si
->
num
;
++
s
)
{
scn19_slice_param_t
*
sd
=
dl
&&
si
->
s
[
s
]
->
id
==
id
?
dl
:
si
->
s
[
s
]
->
algo_data
;
if
(
sd
->
typeid
!=
1
)
continue
;
for
(
int
i
=
sd
->
posLow
;
i
<=
sd
->
posHigh
;
++
i
)
{
if
(
rbgMap
[
i
])
RET_FAIL
(
-
33
,
"%s(): overlap of slices detected at RBG %d
\n
"
,
__func__
,
i
);
...
...
@@ -872,6 +876,8 @@ int addmod_scn19_slice_dl(slice_info_t *si,
free
(
s
->
algo_data
);
s
->
algo_data
=
dl
;
}
LOG_I
(
FLEXRAN_AGENT
,
"Updating %d
\n
"
,
index
);
return
index
;
}
...
...
@@ -882,6 +888,7 @@ int addmod_scn19_slice_dl(slice_info_t *si,
RET_FAIL
(
-
2
,
"%s(): cannot have more than %d slices
\n
"
,
__func__
,
MAX_STATIC_SLICES
);
for
(
int
s
=
0
;
s
<
si
->
num
;
++
s
)
{
scn19_slice_param_t
*
sd
=
si
->
s
[
s
]
->
algo_data
;
if
(
sd
->
typeid
!=
1
)
continue
;
for
(
int
i
=
sd
->
posLow
;
i
<=
sd
->
posHigh
;
++
i
)
rbgMap
[
i
]
=
1
;
}
...
...
@@ -906,8 +913,8 @@ int addmod_scn19_slice_dl(slice_info_t *si,
return
si
->
num
-
1
;
}
//dynamic
if
(
dl
->
typeid
==
2
){
if
(
dl
->
typeid
==
2
){
LOG_I
(
FLEXRAN_AGENT
,
"Begin addmod_dynamic_slice_dl in dynamic dynamic Implementation
\n
"
);
if
(
dl
&&
dl
->
kpsRequired
>
dl
->
kpsReference
)
...
...
@@ -918,18 +925,15 @@ int addmod_scn19_slice_dl(slice_info_t *si,
if
(
index
>=
0
)
{
LOG_I
(
FLEXRAN_AGENT
,
"Updating addmod_dynamic_slice_dl in dynamic dynamic Implementation
\n
"
);
//
for (int s = 0; s < si->num; ++s) {
//
scn19_slice_param_t *sd = dl && si->s[s]->id == id ? dl : si->s[s]->algo_data;
//
for (int i = sd->posLow; i <= sd->posHigh; ++i) {
//
if (rbgMap[i])
//
RET_FAIL(-33, "%s(): overlap of slices detected at RBG %d\n", __func__, i);
//
rbgMap[i] = 1;
//
}
//
}
for
(
int
s
=
0
;
s
<
si
->
num
;
++
s
)
{
scn19_slice_param_t
*
sd
=
dl
&&
si
->
s
[
s
]
->
id
==
id
?
dl
:
si
->
s
[
s
]
->
algo_data
;
for
(
int
i
=
sd
->
posLow
;
i
<=
sd
->
posHigh
;
++
i
)
{
if
(
rbgMap
[
i
])
RET_FAIL
(
-
33
,
"%s(): overlap of slices detected at RBG %d
\n
"
,
__func__
,
i
);
rbgMap
[
i
]
=
1
;
}
}
/* no problem, can allocate */
dl
->
fexp
=
dl
->
kpsRequired
;
dl
->
rbs
=
0
;
dl
->
eff
=
(
dl
->
kpsReference
/
RB_NUMS
);
slice_t
*
s
=
si
->
s
[
index
];
if
(
label
)
{
if
(
s
->
label
)
free
(
s
->
label
);
...
...
@@ -984,17 +988,18 @@ int addmod_scn19_slice_dl(slice_info_t *si,
return
si
->
num
-
1
;
}
//ondemand
//ondemand
if
(
dl
->
typeid
==
3
){
LOG_I
(
FLEXRAN_AGENT
,
"Begin addmod_ondemand_slice_dl in
dynamic dynamic
Implementation
\n
"
);
if
(
dl
&&
!
(((
dl
->
tmax
*
RB_NUMS
)
%
1
)
>
0
.
001
))
RET_FAIL
(
-
1
,
"%s(): slice id %d tmax of OnDemand slice not on RB boundary
\n
"
,
__func__
,
id
);
LOG_I
(
FLEXRAN_AGENT
,
"Begin addmod_ondemand_slice_dl in
OnDemand
Implementation
\n
"
);
//
if (dl && !(((dl->tmax * RB_NUMS)%1)>0.001))
//
RET_FAIL(-1, "%s(): slice id %d tmax of OnDemand slice not on RB boundary\n", __func__, id);
uint8_t
rbgMap
[
25
]
=
{
0
};
int
index
=
_exists_slice
(
si
->
num
,
si
->
s
,
id
);
if
(
index
>=
0
)
{
LOG_I
(
FLEXRAN_AGENT
,
"Updating addmod_
dynamic_slice_dl in dynamic dynamic
Implementation
\n
"
);
LOG_I
(
FLEXRAN_AGENT
,
"Updating addmod_
OnDemand_slice_dl in OnDemand
Implementation
\n
"
);
// for (int s = 0; s < si->num; ++s) {
// scn19_slice_param_t *sd = dl && si->s[s]->id == id ? dl : si->s[s]->algo_data;
...
...
@@ -1060,15 +1065,160 @@ int addmod_scn19_slice_dl(slice_info_t *si,
if
(
!
ns
->
dl_algo
.
data
)
ns
->
dl_algo
.
data
=
ns
->
dl_algo
.
setup
();
ns
->
algo_data
=
dl
;
LOG_I
(
FLEXRAN_AGENT
,
"End addmod_
dynamic_slice_dl in dynamic dynamic
Implementation
\n
"
);
LOG_I
(
FLEXRAN_AGENT
,
"End addmod_
OnDemand_slice_dl in OnDemand
Implementation
\n
"
);
return
si
->
num
-
1
;
}
}
void
scn19_dl
(
module_id_t
mod_id
,
int
CC_id
,
frame_t
frame
,
sub_frame_t
subframe
)
{
/* Begin gathering some nessceary scheduling information */
UE_info_t
*
UE_info
=
&
RC
.
mac
[
mod_id
]
->
UE_info
;
store_dlsch_buffer
(
mod_id
,
CC_id
,
frame
,
subframe
);
for
(
int
UE_id
=
UE_info
->
list
.
head
;
UE_id
>=
0
;
UE_id
=
UE_info
->
list
.
next
[
UE_id
])
{
UE_sched_ctrl_t
*
ue_sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
/* initialize per-UE scheduling information */
ue_sched_ctrl
->
pre_nb_available_rbs
[
CC_id
]
=
0
;
ue_sched_ctrl
->
dl_pow_off
[
CC_id
]
=
2
;
memset
(
ue_sched_ctrl
->
rballoc_sub_UE
[
CC_id
],
0
,
sizeof
(
ue_sched_ctrl
->
rballoc_sub_UE
[
CC_id
]));
ue_sched_ctrl
->
pre_dci_dl_pdu_idx
=
-
1
;
}
const
int
N_RBG
=
to_rbg
(
RC
.
mac
[
mod_id
]
->
common_channels
[
CC_id
].
mib
->
message
.
dl_Bandwidth
);
const
int
RBGsize
=
get_min_rb_unit
(
mod_id
,
CC_id
);
uint8_t
*
vrb_map
=
RC
.
mac
[
mod_id
]
->
common_channels
[
CC_id
].
vrb_map
;
uint8_t
rbgalloc_mask
[
N_RBG_MAX
];
for
(
int
i
=
0
;
i
<
N_RBG
;
i
++
)
{
// calculate mask: init to one + "AND" with vrb_map:
// if any RB in vrb_map is blocked (1), the current RBG will be 0
rbgalloc_mask
[
i
]
=
1
;
for
(
int
j
=
0
;
j
<
RBGsize
;
j
++
)
rbgalloc_mask
[
i
]
&=
!
vrb_map
[
RBGsize
*
i
+
j
];
}
/* Ending gathering some nessceary scheduling information */
//get slicing infos
slice_info_t
*
s
=
RC
.
mac
[
mod_id
]
->
pre_processor_dl
.
slices
;
int
max_num_ue
;
switch
(
s
->
num
)
{
case
1
:
max_num_ue
=
4
;
break
;
case
2
:
max_num_ue
=
2
;
break
;
default:
max_num_ue
=
1
;
break
;
}
/** calculating the weight of ondemand and dynamic slices*/
/**
* A. Based on the SLA of fixed slices, first allocate the dedicated requested
* resources.
* B. Then, following the QoS requirements of on-demand slices, we allocate
* necessary resources.
* C. Finally, we schedule resources for dynamic slices.
*/
// A. Based on the SLA of fixed slices, first allocate the dedicated requested resources
for
(
int
i
=
0
;
i
<
s
->
num
;
++
i
)
{
if
(
s
->
s
[
i
]
->
UEs
.
head
<
0
)
continue
;
uint8_t
rbgalloc_slice_mask
[
N_RBG_MAX
];
memset
(
rbgalloc_slice_mask
,
0
,
sizeof
(
rbgalloc_slice_mask
));
scn19_slice_param_t
*
p
=
s
->
s
[
i
]
->
algo_data
;
if
(
p
->
typeid
!=
1
)
continue
;
int
n_rbg_sched
=
0
;
for
(
int
rbg
=
p
->
posLow
;
rbg
<=
p
->
posHigh
&&
rbg
<=
N_RBG
;
++
rbg
)
{
rbgalloc_slice_mask
[
rbg
]
=
rbgalloc_mask
[
rbg
];
n_rbg_sched
+=
rbgalloc_mask
[
rbg
];
}
s
->
s
[
i
]
->
dl_algo
.
run
(
mod_id
,
CC_id
,
frame
,
subframe
,
&
s
->
s
[
i
]
->
UEs
,
max_num_ue
,
// max_num_ue
n_rbg_sched
,
rbgalloc_slice_mask
,
s
->
s
[
i
]
->
dl_algo
.
data
);
}
// the following block is meant for validation of the pre-processor to check
// whether all UE allocations are non-overlapping and is not necessary for
// scheduling functionality
char
t
[
26
]
=
"_________________________"
;
t
[
N_RBG
]
=
0
;
for
(
int
i
=
0
;
i
<
N_RBG
;
i
++
)
for
(
int
j
=
0
;
j
<
RBGsize
;
j
++
)
if
(
vrb_map
[
RBGsize
*
i
+
j
]
!=
0
)
t
[
i
]
=
'x'
;
int
print
=
0
;
for
(
int
UE_id
=
UE_info
->
list
.
head
;
UE_id
>=
0
;
UE_id
=
UE_info
->
list
.
next
[
UE_id
])
{
const
UE_sched_ctrl_t
*
ue_sched_ctrl
=
&
UE_info
->
UE_sched_ctrl
[
UE_id
];
if
(
ue_sched_ctrl
->
pre_nb_available_rbs
[
CC_id
]
==
0
)
continue
;
LOG_D
(
MAC
,
"%4d.%d UE%d %d RBs allocated, pre MCS %d
\n
"
,
frame
,
subframe
,
UE_id
,
ue_sched_ctrl
->
pre_nb_available_rbs
[
CC_id
],
UE_info
->
eNB_UE_stats
[
CC_id
][
UE_id
].
dlsch_mcs1
);
print
=
1
;
for
(
int
i
=
0
;
i
<
N_RBG
;
i
++
)
{
if
(
!
ue_sched_ctrl
->
rballoc_sub_UE
[
CC_id
][
i
])
continue
;
for
(
int
j
=
0
;
j
<
RBGsize
;
j
++
)
{
if
(
vrb_map
[
RBGsize
*
i
+
j
]
!=
0
)
{
LOG_I
(
MAC
,
"%4d.%d DL scheduler allocation list: %s
\n
"
,
frame
,
subframe
,
t
);
LOG_I
(
MAC
,
"%4d.%d: UE %d allocated at locked RB %d/RBG %d
\n
"
,
frame
,
subframe
,
UE_id
,
RBGsize
*
i
+
j
,
i
);
}
vrb_map
[
RBGsize
*
i
+
j
]
=
1
;
}
t
[
i
]
=
'0'
+
UE_id
;
}
}
if
(
print
)
LOG_D
(
MAC
,
"%4d.%d DL scheduler allocation list: %s
\n
"
,
frame
,
subframe
,
t
);
}
/************************ SVN19 Slicing Implementation ************************/
/**
* On-demand Slices:
...
...
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