Commit 1f98f05a authored by Florian Kaltenberger's avatar Florian Kaltenberger

Merge branch 'nr-fix-ue-usrp' into 'develop-nr'

Nr fix ue usrp

See merge request oai/openairinterface5g!436
parents 0a375aff 17e868ca
......@@ -2142,6 +2142,9 @@ if (${XFORMS})
set(XFORMS_SOURCE
${OPENAIR1_DIR}/PHY/TOOLS/lte_phy_scope.c
)
set(XFORMS_SOURCE_NR
${OPENAIR1_DIR}/PHY/TOOLS/nr_phy_scope.c
)
set(XFORMS_SOURCE_SOFTMODEM
${OPENAIR_TARGETS}/RT/USER/stats.c
)
......@@ -2444,7 +2447,7 @@ add_executable(nr-uesoftmodem
${OPENAIR3_DIR}/NAS/UE/nas_ue_task.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${XFORMS_SOURCE}
${XFORMS_SOURCE_NR}
${XFORMS_SOURCE_SOFTMODEM}
${T_SOURCE}
${CONFIG_SOURCES}
......@@ -2478,7 +2481,7 @@ add_executable(nr-uesoftmodem-nos1
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${XFORMS_SOURCE}
${XFORMS_SOURCE_NR}
${XFORMS_SOURCE_SOFTMODEM}
${T_SOURCE}
${CONFIG_SOURCES}
......
......@@ -419,7 +419,7 @@ void nr_phy_config_request(NR_PHY_Config_t *phy_config)
gNB_config->rf_config.ul_carrier_bandwidth.value = phy_config->cfg->rf_config.ul_carrier_bandwidth.value;//106;
gNB_config->sch_config.half_frame_index.value = 0;
gNB_config->sch_config.ssb_subcarrier_offset.value = phy_config->cfg->sch_config.ssb_subcarrier_offset.value;//0;
gNB_config->sch_config.n_ssb_crb.value = 86;
gNB_config->sch_config.n_ssb_crb.value = (phy_config->cfg->rf_config.dl_carrier_bandwidth.value-20)>>1;
gNB_config->sch_config.physical_cell_id.value = phy_config->cfg->sch_config.physical_cell_id.value;
if (phy_config->cfg->subframe_config.duplex_mode.value == 0) {
......
......@@ -156,6 +156,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
// FK: added N_RB_DL paramter here as this function shares code with the gNB where it is needed. We should rewrite this function for the UE.
nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,fp->N_RB_DL,n_ssb_crb,0);
LOG_D(PHY,"nr_initial sync ue RB_DL %d\n", fp->N_RB_DL);
/*
write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*fp->samples_per_subframe,1,1);
exit(-1);
......@@ -196,7 +197,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
#endif
/* check that SSS/PBCH block is continuous inside the received buffer */
if (sync_pos < (10*fp->slots_per_subframe*fp->samples_per_subframe - (NB_SYMBOLS_PBCH * fp->ofdm_symbol_size))) {
if (sync_pos < (NR_NUMBER_OF_SUBFRAMES_PER_FRAME*fp->samples_per_subframe - (NB_SYMBOLS_PBCH * fp->ofdm_symbol_size))) {
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"Calling sss detection (normal CP)\n");
......
......@@ -838,14 +838,15 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
/* Search pss in the received buffer each 4 samples which ensures a memory alignment on 128 bits (32 bits x 4 ) */
/* This is required by SIMD (single instruction Multiple Data) Extensions of Intel processors. */
/* Correlation computation is based on a a dot product which is realized thank to SIMS extensions */
for (int pss_index = 0; pss_index < NUMBER_PSS_SEQUENCE; pss_index++) avg[pss_index]=0;
for (int pss_index = 0; pss_index < NUMBER_PSS_SEQUENCE; pss_index++) {
avg[pss_index]=0;
memset(pss_corr_ue[pss_index],0,length*sizeof(int64_t));
}
for (n=0; n < length; n+=4) {
for (n=0; n < length; n+=4) { //
for (int pss_index = 0; pss_index < NUMBER_PSS_SEQUENCE; pss_index++) {
pss_corr_ue[pss_index][n] = 0; /* clean correlation for position n */
if ( n < (length - frame_parms->ofdm_symbol_size)) {
/* calculate dot product of primary_synchro_time_nr and rxdata[ar][n] (ar=0..nb_ant_rx) and store the sum in temp[n]; */
......@@ -886,24 +887,19 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
LOG_I(PHY,"[UE] nr_synchro_time: Sync source = %d, Peak found at pos %d, val = %llu (%d dB) avg %d dB\n", pss_source, peak_position, (unsigned long long)peak_value, dB_fixed64(peak_value),dB_fixed64(avg[pss_source]));
//#ifdef DEBUG_PSS_NR
#define PSS_DETECTION_FLOOR_NR (31)
if (peak_value < 5*avg[pss_source]) { //PSS_DETECTION_FLOOR_NR)
if (peak_value < 5*avg[pss_source])
return(-1);
}
//#endif
#ifdef DBG_PSS_NR
static debug_cnt = 0;
static int debug_cnt = 0;
if (debug_cnt == 0) {
/* LOG_M("pss_corr_ue0.m","pss_corr_ue0",pss_corr_ue[0],length,1,6);
LOG_M("pss_corr_ue0.m","pss_corr_ue0",pss_corr_ue[0],length,1,6);
LOG_M("pss_corr_ue1.m","pss_corr_ue1",pss_corr_ue[1],length,1,6);
LOG_M("pss_corr_ue2.m","pss_corr_ue2",pss_corr_ue[2],length,1,6);
LOG_M("rxdata0.m","rxd0",rxdata[0],length,1,1); */
LOG_M("rxdata0.m","rxd0",rxdata[0],length,1,1);
} else {
debug_cnt++;
}
......
This diff is collapsed.
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* Header file generated by fdesign on Tue Nov 13 09:42:50 2012 */
#ifndef FD_lte_scope_h_
#define FD_lte_scope_h_
#include <forms.h>
//#include "PHY/defs_eNB.h"
//#include "PHY/defs_UE.h"
//#include "PHY/impl_defs_top.h"
#include "PHY/defs_nr_UE.h"
/* Forms and Objects */
typedef struct {
FL_FORM * lte_phy_scope_enb;
FL_OBJECT * rxsig_t;
FL_OBJECT * chest_f;
FL_OBJECT * chest_t;
FL_OBJECT * pusch_comp;
FL_OBJECT * pucch_comp;
FL_OBJECT * pucch_comp1;
FL_OBJECT * pusch_llr;
FL_OBJECT * pusch_tput;
FL_OBJECT * button_0;
} FD_lte_phy_scope_enb;
typedef struct {
FL_FORM * lte_phy_scope_ue;
FL_OBJECT * rxsig_t;
FL_OBJECT * chest_f;
FL_OBJECT * chest_t;
FL_OBJECT * pbch_comp;
FL_OBJECT * pbch_llr;
FL_OBJECT * pdcch_comp;
FL_OBJECT * pdcch_llr;
FL_OBJECT * pdsch_comp;
FL_OBJECT * pdsch_llr;
FL_OBJECT * pdsch_comp1;
FL_OBJECT * pdsch_llr1;
FL_OBJECT * pdsch_tput;
FL_OBJECT * button_0;
} FD_lte_phy_scope_ue;
FD_lte_phy_scope_enb * create_lte_phy_scope_enb( void );
FD_lte_phy_scope_ue * create_lte_phy_scope_ue( void );
/*
void phy_scope_eNB(FD_lte_phy_scope_enb *form,
PHY_VARS_gNB *phy_vars_enb,
int UE_id);
*/
void phy_scope_UE(FD_lte_phy_scope_ue *form,
PHY_VARS_NR_UE *phy_vars_ue,
int eNB_id,
int UE_id,
uint8_t subframe);
#endif /* FD_lte_scope_h_ */
......@@ -379,7 +379,7 @@ int main(int argc, char **argv)
exit(-1);
}
frame_length_complex_samples = frame_parms->samples_per_subframe;
frame_length_complex_samples = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
s_re = malloc(2*sizeof(double*));
......@@ -432,34 +432,47 @@ int main(int argc, char **argv)
gNB->pbch_configured = 1;
for (int i=0;i<4;i++) gNB->pbch_pdu[i]=i+1;
nr_common_signal_procedures (gNB,frame,subframe);
}
/*
LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
if (gNB->frame_parms.nb_antennas_tx>1)
LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);
*/
//TODO: loop over slots
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
txdata[aa],
frame_parms->ofdm_symbol_size,
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
} else {
nr_normal_prefix_mod(gNB->common_vars.txdataF[aa],
txdata[aa],
14,
frame_parms);
/*
LOG_M("txsigF0.m","txsF0", gNB->common_vars.txdataF[0],frame_length_complex_samples_no_prefix,1,1);
if (gNB->frame_parms.nb_antennas_tx>1)
LOG_M("txsigF1.m","txsF1", gNB->common_vars.txdataF[1],frame_length_complex_samples_no_prefix,1,1);
*/
//TODO: loop over slots
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
if (gNB_config->subframe_config.dl_cyclic_prefix_type.value == 1) {
PHY_ofdm_mod(gNB->common_vars.txdataF[aa],
txdata[aa],
frame_parms->ofdm_symbol_size,
12,
frame_parms->nb_prefix_samples,
CYCLIC_PREFIX);
} else {
nr_normal_prefix_mod(gNB->common_vars.txdataF[aa],
txdata[aa],
14,
frame_parms);
}
}
} else {
printf("Reading %d samples from file to antenna buffer %d\n",frame_length_complex_samples,0);
if (fread(txdata[0],
sizeof(int32_t),
frame_length_complex_samples,
input_fd) != frame_length_complex_samples) {
printf("error reading from file\n");
exit(-1);
}
}
/*
LOG_M("txsig0.m","txs0", txdata[0],frame_length_complex_samples,1,1);
if (gNB->frame_parms.nb_antennas_tx>1)
LOG_M("txsig1.m","txs1", txdata[1],frame_length_complex_samples,1,1);
*/
if (output_fd)
fwrite(txdata[0],sizeof(int32_t),frame_length_complex_samples,output_fd);
int txlev = signal_energy(&txdata[0][5*frame_parms->ofdm_symbol_size + 4*frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0],
frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
......@@ -568,9 +581,12 @@ int main(int argc, char **argv)
free(r_im);
free(txdata);
if (write_output_file)
if (output_fd)
fclose(output_fd);
if (input_fd)
fclose(input_fd);
return(n_errors);
}
......
This diff is collapsed.
......@@ -80,7 +80,7 @@ unsigned short config_frames[4] = {2,9,11,13};
#include "system.h"
#include "stats.h"
#ifdef XFORMS
#include "PHY/TOOLS/lte_phy_scope.h"
#include "PHY/TOOLS/nr_phy_scope.h"
//#include "stats.h"
// current status is that every UE has a DL scope for a SINGLE eNB (eNB_id=0)
// at eNB 0, an UL scope for every UE
......@@ -111,11 +111,10 @@ volatile int oai_exit = 0;
static clock_source_t clock_source = internal;
static int wait_for_sync = 0;
static char UE_flag=0;
unsigned int mmapped_dma=0;
int single_thread_flag=1;
unsigned int mmapped_dma=0;
int single_thread_flag=1;
static char threequarter_fs=0;
int threequarter_fs=0;
uint32_t downlink_frequency[MAX_NUM_CCs][4];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
......@@ -149,7 +148,7 @@ double rx_gain_off = 0.0;
double sample_rate=30.72e6;
double bw = 10.0e6;
static int tx_max_power[MAX_NUM_CCs]; /* = {0,0}*/;
static int tx_max_power[MAX_NUM_CCs] = {0};
char rf_config_file[1024];
......@@ -175,7 +174,7 @@ int rx_input_level_dBm;
#ifdef XFORMS
extern int otg_enabled;
static char do_forms=0;
int do_forms=0;
#else
int otg_enabled;
#endif
......@@ -415,22 +414,20 @@ static void *scope_thread(void *arg) {
#endif
while (!oai_exit) {
if (UE_flag==1) {
//len = dump_ue_stats (PHY_vars_UE_g[0][0], &PHY_vars_UE_g[0][0]->proc.proc_rxtx[0],stats_buffer, 0, mode,rx_input_level_dBm);
//fl_set_object_label(form_stats->stats_text, stats_buffer);
fl_clear_browser(form_stats->stats_text);
fl_add_browser_line(form_stats->stats_text, stats_buffer);
/*phy_scope_UE(form_ue[0],
PHY_vars_UE_g[0][0],
0,
0,7);*/
}
//printf("doing forms\n");
//usleep(100000); // 100 ms
sleep(1);
//len = dump_ue_stats (PHY_vars_UE_g[0][0], &PHY_vars_UE_g[0][0]->proc.proc_rxtx[0],stats_buffer, 0, mode,rx_input_level_dBm);
//fl_set_object_label(form_stats->stats_text, stats_buffer);
fl_clear_browser(form_stats->stats_text);
fl_add_browser_line(form_stats->stats_text, stats_buffer);
if (PHY_vars_UE_g[0][0]->is_synchronized == 1)
phy_scope_UE(form_ue[0],
PHY_vars_UE_g[0][0],
0,0,7);
//else it is done in the synch thread
//printf("doing forms\n");
//usleep(100000); // 100 ms
sleep(1);
}
// printf("%s",stats_buffer);
......@@ -502,7 +499,7 @@ static void get_options(void) {
int CC_id;
int tddflag, nonbiotflag;
char *loopfile=NULL;
int dumpframe;
int dumpframe=0;
uint32_t online_log_messages;
uint32_t glog_level, glog_verbosity;
uint32_t start_telnetsrv;
......@@ -615,10 +612,6 @@ static void get_options(void) {
uecap_xer_in=1;
} /* UE with config file */
#if defined(OAI_USRP) || defined(CPRIGW) || defined(OAI_ADRV9371_ZC706)
int clock_src;
#endif
}
#if T_TRACER
......@@ -1002,8 +995,6 @@ int main( int argc, char **argv ) {
UE[CC_id]->pdcch_vars[1][0]->crnti = 0x1235;
}
rx_gain[CC_id][0] = 81;
tx_max_power[CC_id] = -40;
UE[CC_id]->rx_total_gain_dB = (int)rx_gain[CC_id][0] + rx_gain_off;
UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
......@@ -1120,11 +1111,14 @@ int main( int argc, char **argv ) {
#ifdef XFORMS
int UE_id;
int fl_argc=1;
if (do_forms==1) {
fl_initialize (&argc, argv, NULL, 0, 0);
form_stats = create_form_stats_form();
// fl_initialize messes with argv and argc, so pretend to not pass any options
fl_initialize (&fl_argc, argv, NULL, 0, 0);
// restore the original command line args
// argv = fl_get_cmdline_args( &argc );
form_stats = create_form_stats_form();
fl_show_form (form_stats->stats_form, FL_PLACE_HOTSPOT, FL_FULLBORDER, "stats");
UE_id = 0;
form_ue[UE_id] = create_lte_phy_scope_ue();
......@@ -1155,48 +1149,34 @@ int main( int argc, char **argv ) {
rt_sleep_ns(10*100000000ULL);
// start the main thread
//if (UE_flag == 1) {
init_UE(1);
number_of_cards = 1;
init_UE(1);
number_of_cards = 1;
for(CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
PHY_vars_UE_g[0][CC_id]->rf_map.card=0;
PHY_vars_UE_g[0][CC_id]->rf_map.chain=CC_id+chain_offset;
}
//}
// connect the TX/RX buffers
//if (UE_flag==1) {
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
#if defined(OAI_USRP) || defined(OAI_ADRV9371_ZC706)
UE[CC_id]->hw_timing_advance = timing_advance;
#else
UE[CC_id]->hw_timing_advance = 160;
#endif
}
if (setup_ue_buffers(UE,&openair0_cfg[0])!=0) {
printf("Error setting up eNB buffer\n");
exit(-1);
}
if (input_fd) {
printf("Reading in from file to antenna buffer %d\n",0);
if (fread(UE[0]->common_vars.rxdata[0],
sizeof(int32_t),
frame_parms[0]->samples_per_subframe*10,
input_fd) != frame_parms[0]->samples_per_subframe*10)
printf("error reading from file\n");
}
if (input_fd) {
printf("Reading in from file to antenna buffer %d\n",0);
if (fread(UE[0]->common_vars.rxdata[0],
sizeof(int32_t),
frame_parms[0]->samples_per_subframe*10,
input_fd) != frame_parms[0]->samples_per_subframe*10)
printf("error reading from file\n");
}
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
//}
sleep(3);
......@@ -1211,16 +1191,18 @@ int main( int argc, char **argv ) {
printf("TYPE <CTRL-C> TO TERMINATE\n");
//getchar();
/*
#if defined(ENABLE_ITTI)
printf("Entering ITTI signals handler\n");
itti_wait_tasks_end();
oai_exit=1;
#else
*/
while (oai_exit==0)
rt_sleep_ns(100000000ULL);
#endif
//#endif
// stop threads
#ifdef XFORMS
......
......@@ -136,7 +136,7 @@
{"ue-nb-ant-tx", CONFIG_HLP_UENANTT, 0, u8ptr:&nb_antenna_tx, defuintval:1, TYPE_UINT8, 0}, \
{"ue-scan-carrier", CONFIG_HLP_UESCAN, PARAMFLAG_BOOL, iptr:&UE_scan_carrier, defintval:0, TYPE_INT, 0}, \
{"ue-max-power", NULL, 0, iptr:&(tx_max_power[0]), defintval:90, TYPE_INT, 0}, \
{"r" , CONFIG_HLP_PRB, 0, u8ptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT8, 0}, \
{"r" , CONFIG_HLP_PRB, 0, iptr:&(frame_parms[0]->N_RB_DL), defintval:25, TYPE_UINT, 0}, \
{"dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, iptr:(int32_t *)&dlsch_demod_shift, defintval:0, TYPE_INT, 0}, \
{"usrp-args", CONFIG_HLP_USRP_ARGS, 0, strptr:(char **)&usrp_args, defstrval:"type=b200", TYPE_STRING, 0}, \
{"usrp-clksrc", CONFIG_HLP_USRP_CLK_SRC,0, strptr:(char **)&usrp_clksrc, defstrval:"internal", TYPE_STRING, 0} \
......@@ -167,8 +167,8 @@
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"C" , CONFIG_HLP_DLF, 0, uptr:&(downlink_frequency[0][0]), defuintval:2680000000, TYPE_UINT, 0}, \
{"a" , CONFIG_HLP_CHOFF, 0, iptr:&chain_offset, defintval:0, TYPE_INT, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, uptr:(uint32_t *)&do_forms, defintval:0, TYPE_INT8, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
{"d" , CONFIG_HLP_SOFTS, PARAMFLAG_BOOL, iptr:&do_forms, defintval:0, TYPE_INT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, iptr:&threequarter_fs, defintval:0, TYPE_INT, 0}, \
{"K" , CONFIG_HLP_ITTIL, PARAMFLAG_NOFREE, strptr:&itti_dump_file, defstrval:"/tmp/itti.dump", TYPE_STRING, 0}, \
{"m" , CONFIG_HLP_DLMCS, 0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS, 0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
......
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