Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG UE
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
OpenXG
OpenXG UE
Commits
41c09628
Commit
41c09628
authored
May 16, 2021
by
hardy
Browse files
Options
Browse Files
Download
Plain Diff
Merge remote-tracking branch 'origin/develop-CCE' into integration_2021_wk20_a
parents
78bf7dd1
815145da
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
64 additions
and
56 deletions
+64
-56
openair1/PHY/NR_TRANSPORT/nr_dci.c
openair1/PHY/NR_TRANSPORT/nr_dci.c
+39
-37
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
+5
-5
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+20
-14
No files found.
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @
41c09628
...
@@ -181,62 +181,64 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
...
@@ -181,62 +181,64 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
}
}
/*Mapping the encoded DCI along with the DMRS */
/*Mapping the encoded DCI along with the DMRS */
for
(
int
cce_count
=
0
;
cce_count
<
dci_pdu
->
AggregationLevel
;
cce_count
++
)
{
for
(
int
symbol_idx
=
0
;
symbol_idx
<
pdcch_pdu_rel15
->
DurationSymbols
;
symbol_idx
++
)
{
for
(
int
cce_count
=
0
;
cce_count
<
dci_pdu
->
AggregationLevel
;
cce_count
+=
pdcch_pdu_rel15
->
DurationSymbols
)
{
int8_t
cce_idx
=
reg_list_order
[
cce_count
];
int8_t
cce_idx
=
reg_list_order
[
cce_count
];
for
(
int
reg_in_cce_idx
=
0
;
reg_in_cce_idx
<
NR_NB_REG_PER_CCE
;
reg_in_cce_idx
++
)
{
for
(
int
reg_in_cce_idx
=
0
;
reg_in_cce_idx
<
NR_NB_REG_PER_CCE
;
reg_in_cce_idx
++
)
{
k
=
cset_start_sc
+
gNB
->
cce_list
[
d
][
cce_idx
].
reg_list
[
reg_in_cce_idx
].
start_sc_idx
;
k
=
cset_start_sc
+
gNB
->
cce_list
[
d
][
cce_idx
].
reg_list
[
reg_in_cce_idx
].
start_sc_idx
;
if
(
k
>=
frame_parms
.
ofdm_symbol_size
)
if
(
k
>=
frame_parms
.
ofdm_symbol_size
)
k
-=
frame_parms
.
ofdm_symbol_size
;
k
-=
frame_parms
.
ofdm_symbol_size
;
l
=
cset_start_symb
+
gNB
->
cce_list
[
d
][
cce_idx
].
reg_list
[
reg_in_cce_idx
].
symb
_idx
;
l
=
cset_start_symb
+
symbol
_idx
;
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
// dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
if
(
pdcch_pdu_rel15
->
CoreSetType
==
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
)
if
(
pdcch_pdu_rel15
->
CoreSetType
==
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
)
dmrs_idx
=
(
gNB
->
cce_list
[
d
][
cce_idx
].
reg_list
[
reg_in_cce_idx
].
reg_idx
/
pdcch_pdu_rel15
->
DurationSymbols
)
*
3
;
dmrs_idx
=
(
gNB
->
cce_list
[
d
][
cce_idx
].
reg_list
[
reg_in_cce_idx
].
reg_idx
)
*
3
;
else
else
dmrs_idx
=
(
gNB
->
cce_list
[
d
][
cce_idx
].
reg_list
[
reg_in_cce_idx
].
reg_idx
/
pdcch_pdu_rel15
->
DurationSymbols
+
rb_offset
)
*
3
;
dmrs_idx
=
(
gNB
->
cce_list
[
d
][
cce_idx
].
reg_list
[
reg_in_cce_idx
].
reg_idx
+
rb_offset
)
*
3
;
k_prime
=
0
;
k_prime
=
0
;
for
(
int
m
=
0
;
m
<
NR_NB_SC_PER_RB
;
m
++
)
{
for
(
int
m
=
0
;
m
<
NR_NB_SC_PER_RB
;
m
++
)
{
if
(
m
==
(
k_prime
<<
2
)
+
1
)
{
// DMRS if not already mapped
if
(
m
==
(
k_prime
<<
2
)
+
1
)
{
// DMRS if not already mapped
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
amp
*
mod_dmrs
[
l
][
dmrs_idx
<<
1
])
>>
15
;
(
amp
*
mod_dmrs
[
l
][
dmrs_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
(
amp
*
mod_dmrs
[
l
][(
dmrs_idx
<<
1
)
+
1
])
>>
15
;
(
amp
*
mod_dmrs
[
l
][(
dmrs_idx
<<
1
)
+
1
])
>>
15
;
#ifdef DEBUG_PDCCH_DMRS
#ifdef DEBUG_PDCCH_DMRS
printf
(
"PDCCH DMRS: l %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
],
printf
(
"PDCCH DMRS: l %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
],
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
#endif
#endif
dmrs_idx
++
;
dmrs_idx
++
;
k_prime
++
;
k_prime
++
;
}
else
{
// DCI payload
}
else
{
// DCI payload
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
amp
*
mod_dci
[
dci_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
]
=
(
amp
*
mod_dci
[
dci_idx
<<
1
])
>>
15
;
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]
=
(
amp
*
mod_dci
[(
dci_idx
<<
1
)
+
1
])
>>
15
;
(
amp
*
mod_dci
[(
dci_idx
<<
1
)
+
1
])
>>
15
;
#ifdef DEBUG_DCI
#ifdef DEBUG_DCI
printf
(
"PDCCH: l %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
],
printf
(
"PDCCH: l %d position %d => (%d,%d)
\n
"
,
l
,
k
,((
int16_t
*
)
txdataF
)[(
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
],
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
((
int16_t
*
)
txdataF
)[((
l
*
frame_parms
.
ofdm_symbol_size
+
k
)
<<
1
)
+
1
]);
#endif
#endif
dci_idx
++
;
dci_idx
++
;
}
}
k
++
;
k
++
;
if
(
k
>=
frame_parms
.
ofdm_symbol_size
)
if
(
k
>=
frame_parms
.
ofdm_symbol_size
)
k
-=
frame_parms
.
ofdm_symbol_size
;
k
-=
frame_parms
.
ofdm_symbol_size
;
}
// m
}
// m
}
// reg_in_cce_idx
}
// reg_in_cce_idx
}
// cce_count
}
// cce_count
}
// symbol_idx
LOG_D
(
PHY
,
LOG_D
(
PHY
,
"DCI: payloadSize = %d | payload = %llx
\n
"
,
"DCI: payloadSize = %d | payload = %llx
\n
"
,
...
...
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
View file @
41c09628
...
@@ -136,7 +136,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
...
@@ -136,7 +136,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
get_coreset_rballoc
(
pdcch_pdu_rel15
->
FreqDomainResource
,
&
n_rb
,
&
rb_offset
);
int
N_reg
=
n_rb
*
pdcch_pdu_rel15
->
DurationSymbols
;
int
N_reg
=
n_rb
;
int
C
=-
1
;
int
C
=-
1
;
AssertFatal
(
N_reg
>
0
,
"N_reg cannot be 0
\n
"
);
AssertFatal
(
N_reg
>
0
,
"N_reg cannot be 0
\n
"
);
...
@@ -174,8 +174,8 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
...
@@ -174,8 +174,8 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
for
(
uint8_t
reg_idx
=
0
;
reg_idx
<
bsize
;
reg_idx
++
)
{
for
(
uint8_t
reg_idx
=
0
;
reg_idx
<
bsize
;
reg_idx
++
)
{
reg
=
&
cce
->
reg_list
[
reg_idx
];
reg
=
&
cce
->
reg_list
[
reg_idx
];
reg
->
reg_idx
=
bsize
*
idx
+
reg_idx
;
reg
->
reg_idx
=
bsize
*
idx
+
reg_idx
;
reg
->
start_sc_idx
=
(
reg
->
reg_idx
/
pdcch_pdu_rel15
->
DurationSymbols
)
*
NR_NB_SC_PER_RB
;
reg
->
start_sc_idx
=
reg
->
reg_idx
*
NR_NB_SC_PER_RB
;
reg
->
symb_idx
=
reg
->
reg_idx
%
pdcch_pdu_rel15
->
DurationSymbols
;
reg
->
symb_idx
=
0
;
LOG_D
(
PHY
,
"reg %d symbol %d start subcarrier %d
\n
"
,
reg
->
reg_idx
,
reg
->
symb_idx
,
reg
->
start_sc_idx
);
LOG_D
(
PHY
,
"reg %d symbol %d start subcarrier %d
\n
"
,
reg
->
reg_idx
,
reg
->
symb_idx
,
reg
->
start_sc_idx
);
}
}
}
}
...
@@ -185,8 +185,8 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
...
@@ -185,8 +185,8 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m, nfapi_nr_dl_tti_pdcch_pdu_r
for
(
uint8_t
reg_idx
=
0
;
reg_idx
<
NR_NB_REG_PER_CCE
;
reg_idx
++
)
{
for
(
uint8_t
reg_idx
=
0
;
reg_idx
<
NR_NB_REG_PER_CCE
;
reg_idx
++
)
{
reg
=
&
cce
->
reg_list
[
reg_idx
];
reg
=
&
cce
->
reg_list
[
reg_idx
];
reg
->
reg_idx
=
cce
->
cce_idx
*
NR_NB_REG_PER_CCE
+
reg_idx
;
reg
->
reg_idx
=
cce
->
cce_idx
*
NR_NB_REG_PER_CCE
+
reg_idx
;
reg
->
start_sc_idx
=
(
reg
->
reg_idx
/
pdcch_pdu_rel15
->
DurationSymbols
)
*
NR_NB_SC_PER_RB
;
reg
->
start_sc_idx
=
reg
->
reg_idx
*
NR_NB_SC_PER_RB
;
reg
->
symb_idx
=
reg
->
reg_idx
%
pdcch_pdu_rel15
->
DurationSymbols
;
reg
->
symb_idx
=
0
;
LOG_D
(
PHY
,
"reg %d symbol %d start subcarrier %d
\n
"
,
reg
->
reg_idx
,
reg
->
symb_idx
,
reg
->
start_sc_idx
);
LOG_D
(
PHY
,
"reg %d symbol %d start subcarrier %d
\n
"
,
reg
->
reg_idx
,
reg
->
symb_idx
,
reg
->
start_sc_idx
);
}
}
...
...
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @
41c09628
...
@@ -132,7 +132,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
...
@@ -132,7 +132,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
if
(
reg_bundle_size_L
!=
0
)
{
// interleaving will be done only if reg_bundle_size_L != 0
if
(
reg_bundle_size_L
!=
0
)
{
// interleaving will be done only if reg_bundle_size_L != 0
coreset_interleaved
=
1
;
coreset_interleaved
=
1
;
coreset_C
=
(
uint32_t
)
(
(
coreset_nbr_rb
*
coreset_time_dur
)
/
(
coreset_interleaver_size_R
*
reg_bundle_size_L
));
coreset_C
=
(
uint32_t
)
(
coreset_nbr_rb
/
(
coreset_interleaver_size_R
*
reg_bundle_size_L
));
}
else
{
}
else
{
reg_bundle_size_L
=
6
;
reg_bundle_size_L
=
6
;
}
}
...
@@ -140,7 +140,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
...
@@ -140,7 +140,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
int
f_bundle_j_list
[
NR_MAX_PDCCH_AGG_LEVEL
]
=
{};
int
f_bundle_j_list
[
NR_MAX_PDCCH_AGG_LEVEL
]
=
{};
for
(
int
reg
=
0
;
reg
<
((
coreset_nbr_rb
*
coreset_time_dur
))
;
reg
++
)
{
for
(
int
reg
=
0
;
reg
<
coreset_nbr_rb
;
reg
++
)
{
if
((
reg
%
reg_bundle_size_L
)
==
0
)
{
if
((
reg
%
reg_bundle_size_L
)
==
0
)
{
if
(
r
==
coreset_interleaver_size_R
)
{
if
(
r
==
coreset_interleaver_size_R
)
{
r
=
0
;
r
=
0
;
...
@@ -148,7 +148,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
...
@@ -148,7 +148,7 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
}
}
bundle_j
=
(
c
*
coreset_interleaver_size_R
)
+
r
;
bundle_j
=
(
c
*
coreset_interleaver_size_R
)
+
r
;
f_bundle_j
=
((
r
*
coreset_C
)
+
c
+
n_shift
)
%
(
(
coreset_nbr_rb
*
coreset_time_dur
)
/
reg_bundle_size_L
);
f_bundle_j
=
((
r
*
coreset_C
)
+
c
+
n_shift
)
%
(
coreset_nbr_rb
/
reg_bundle_size_L
);
if
(
coreset_interleaved
==
0
)
f_bundle_j
=
bundle_j
;
if
(
coreset_interleaved
==
0
)
f_bundle_j
=
bundle_j
;
...
@@ -174,22 +174,28 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
...
@@ -174,22 +174,28 @@ void nr_pdcch_demapping_deinterleaving(uint32_t *llr,
}
}
}
}
for
(
int
reg
=
0
;
reg
<
((
coreset_nbr_rb
*
coreset_time_dur
));
reg
++
)
{
int
rb
=
0
;
for
(
int
c_id
=
0
;
c_id
<
number_of_candidates
;
c_id
++
)
{
for
(
int
symbol_idx
=
0
;
symbol_idx
<
coreset_time_dur
;
symbol_idx
++
)
{
for
(
int
cce_count
=
CCE
[
c_id
/
coreset_time_dur
]
+
c_id
%
coreset_time_dur
;
cce_count
<
CCE
[
c_id
/
coreset_time_dur
]
+
c_id
%
coreset_time_dur
+
L
[
c_id
];
cce_count
+=
coreset_time_dur
)
{
for
(
int
reg_in_cce_idx
=
0
;
reg_in_cce_idx
<
NR_NB_REG_PER_CCE
;
reg_in_cce_idx
++
)
{
f_reg
=
(
f_bundle_j_list_ord
[
reg
/
6
]
*
reg_bundle_size_L
)
+
(
reg
%
reg_bundle_size_L
)
;
f_reg
=
(
f_bundle_j_list_ord
[
cce_count
]
*
reg_bundle_size_L
)
+
reg_in_cce_idx
;
index_z
=
9
*
reg
;
index_z
=
9
*
rb
;
index_llr
=
9
*
((
uint16_t
)
floor
(
f_reg
/
coreset_time_dur
)
+
((
f_reg
%
coreset_time_dur
)
*
(
coreset_nbr_rb
)))
;
index_llr
=
(
uint16_t
)
(
f_reg
+
symbol_idx
*
coreset_nbr_rb
)
*
9
;
for
(
int
i
=
0
;
i
<
9
;
i
++
)
{
for
(
int
i
=
0
;
i
<
9
;
i
++
)
{
z
[
index_z
+
i
]
=
llr
[
index_llr
+
i
];
z
[
index_z
+
i
]
=
llr
[
index_llr
+
i
];
#ifdef NR_PDCCH_DCI_DEBUG
#ifdef NR_PDCCH_DCI_DEBUG
LOG_D
(
PHY
,
"[reg=%d,bundle_j
=%d] z[%d]=(%d,%d) <->
\t
[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d)
\n
"
,
LOG_I
(
PHY
,
"[cce_count=%d,reg_in_cce_idx=%d,bundle_j=%d,symbol_idx=%d,candidate
=%d] z[%d]=(%d,%d) <->
\t
[f_reg=%d,fbundle_j=%d] llr[%d]=(%d,%d)
\n
"
,
reg
,
bundle_j
,(
index_z
+
i
),
*
(
int16_t
*
)
&
z
[
index_z
+
i
],
*
(
1
+
(
int16_t
*
)
&
z
[
index_z
+
i
]),
cce_count
,
reg_in_cce_idx
,
bundle_j
,
symbol_idx
,
c_id
,(
index_z
+
i
),
*
(
int16_t
*
)
&
z
[
index_z
+
i
],
*
(
1
+
(
int16_t
*
)
&
z
[
index_z
+
i
]),
f_reg
,
f_bundle_j
,(
index_llr
+
i
),
*
(
int16_t
*
)
&
llr
[
index_llr
+
i
],
*
(
1
+
(
int16_t
*
)
&
llr
[
index_llr
+
i
]));
f_reg
,
f_bundle_j
,(
index_llr
+
i
),
*
(
int16_t
*
)
&
llr
[
index_llr
+
i
],
*
(
1
+
(
int16_t
*
)
&
llr
[
index_llr
+
i
]));
#endif
#endif
}
rb
++
;
}
}
}
}
if
((
reg
%
reg_bundle_size_L
)
==
0
)
r
++
;
}
}
}
}
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment