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OpenXG
OpenXG UE
Commits
6c925e59
Commit
6c925e59
authored
Aug 20, 2018
by
Calvin HSU
Browse files
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Plain Diff
UE: Add DCI interpretation in L2, finish part of the DL_CONFIG_REQ for L1 DL-SCH procedures.
parent
3a1121ba
Changes
10
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10 changed files
with
257 additions
and
54 deletions
+257
-54
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
+4
-0
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+31
-6
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+7
-7
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+6
-0
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+2
-4
openair2/LAYER2/NR_MAC_UE/mac_extern.h
openair2/LAYER2/NR_MAC_UE/mac_extern.h
+8
-2
openair2/LAYER2/NR_MAC_UE/mac_proto.h
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+1
-1
openair2/LAYER2/NR_MAC_UE/mac_vars.c
openair2/LAYER2/NR_MAC_UE/mac_vars.c
+44
-1
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+131
-8
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+23
-25
No files found.
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
View file @
6c925e59
...
...
@@ -49,5 +49,9 @@
/// UL_CONFIG_REQ
#define FAPI_NR_UL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_PRACH 0x01
#define FAPI_NR_DL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_DL_CONFIG_TYPE_PUSCH 0x03
#endif
\ No newline at end of file
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
6c925e59
...
...
@@ -103,6 +103,8 @@ typedef struct {
uint8_t
reserved_nr_dci
;
// 55 RESERVED_NR_DCI
}
fapi_nr_dci_pdu_rel15_t
;
typedef
struct
{
uint8_t
uci_format
;
uint8_t
uci_channel
;
...
...
@@ -147,7 +149,7 @@ typedef struct {
typedef
struct
{
uint16_t
rnti
;
uint8_t
dci_
type
;
uint8_t
dci_
format
;
fapi_nr_dci_pdu_rel15_t
dci
;
}
fapi_nr_dci_indication_pdu_t
;
...
...
@@ -187,13 +189,13 @@ typedef struct {
fapi_nr_mib_pdu_t
mib_pdu
;
fapi_nr_sib_pdu_t
sib_pdu
;
};
}
fapi_nr_rx_
request
_body_t
;
}
fapi_nr_rx_
indication
_body_t
;
///
typedef
struct
{
uint32_t
sfn_slot
;
uint16_t
number_pdus
;
fapi_nr_rx_
request_body_t
*
rx_request
_body
;
fapi_nr_rx_
indication_body_t
*
rx_indication
_body
;
}
fapi_nr_rx_indication_t
;
typedef
struct
{
...
...
@@ -224,11 +226,25 @@ typedef struct {
}
fapi_nr_ul_config_pucch_pdu
;
typedef
struct
{
uint16_t
number_rbs
;
uint16_t
start_rb
;
uint16_t
number_symbols
;
uint16_t
start_symbol
;
uint8_t
mcs
;
}
fapi_nr_ul_config_pusch_pdu_rel15_t
;
typedef
struct
{
uint16_t
rnti
;
fapi_nr_ul_config_pusch_pdu_rel15_t
ulsch_pdu_rel15
;
}
fapi_nr_ul_config_pusch_pdu
;
typedef
struct
{
uint8_t
pdu_type
;
union
{
fapi_nr_ul_config_rach_pdu
rach_pdu
;
fapi_nr_ul_config_pucch_pdu
pucch_pdu
;
fapi_nr_ul_config_rach_pdu
prach_config_pdu
;
fapi_nr_ul_config_pucch_pdu
pucch_config_pdu
;
fapi_nr_ul_config_pusch_pdu
ulsch_config_pdu
;
};
}
fapi_nr_ul_config_request_pdu_t
;
...
...
@@ -257,7 +273,16 @@ typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t
dci_config_rel15
;
}
fapi_nr_dl_config_dci_pdu
;
typedef
fapi_nr_dci_pdu_rel15_t
fapi_nr_dl_config_dlsch_pdu_rel15_t
;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef
struct
{
uint16_t
number_rbs
;
uint16_t
start_rb
;
uint16_t
number_symbols
;
uint16_t
start_symbol
;
uint8_t
mcs
;
uint8_t
rv
;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
}
fapi_nr_dl_config_dlsch_pdu_rel15_t
;
typedef
struct
{
uint16_t
rnti
;
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @
6c925e59
...
...
@@ -703,13 +703,13 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
ue
->
dl_indication
.
rx_ind
=
&
ue
->
rx_ind
;
// hang on rx_ind instance
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue
->
rx_ind
.
number_pdus
=
ue
->
rx_ind
.
number_pdus
+
1
;
ue
->
rx_ind
.
rx_
request_body
=
(
fapi_nr_rx_request_body_t
*
)
malloc
(
sizeof
(
fapi_nr_rx_request
_body_t
));
ue
->
rx_ind
.
rx_
request
_body
->
pdu_type
=
FAPI_NR_RX_PDU_TYPE_MIB
;
ue
->
rx_ind
.
rx_
request
_body
->
mib_pdu
.
pdu
=
&
decoded_output
[
1
];
ue
->
rx_ind
.
rx_
request
_body
->
mib_pdu
.
additional_bits
=
decoded_output
[
0
];
ue
->
rx_ind
.
rx_
request
_body
->
mib_pdu
.
ssb_index
=
ssb_index
;
// confirm with TCL
ue
->
rx_ind
.
rx_
request
_body
->
mib_pdu
.
ssb_length
=
Lmax
;
// confirm with TCL
ue
->
rx_ind
.
rx_
request
_body
->
mib_pdu
.
cell_id
=
frame_parms
->
Nid_cell
;
// confirm with TCL
ue
->
rx_ind
.
rx_
indication_body
=
(
fapi_nr_rx_indication_body_t
*
)
malloc
(
sizeof
(
fapi_nr_rx_indication
_body_t
));
ue
->
rx_ind
.
rx_
indication
_body
->
pdu_type
=
FAPI_NR_RX_PDU_TYPE_MIB
;
ue
->
rx_ind
.
rx_
indication
_body
->
mib_pdu
.
pdu
=
&
decoded_output
[
1
];
ue
->
rx_ind
.
rx_
indication
_body
->
mib_pdu
.
additional_bits
=
decoded_output
[
0
];
ue
->
rx_ind
.
rx_
indication
_body
->
mib_pdu
.
ssb_index
=
ssb_index
;
// confirm with TCL
ue
->
rx_ind
.
rx_
indication
_body
->
mib_pdu
.
ssb_length
=
Lmax
;
// confirm with TCL
ue
->
rx_ind
.
rx_
indication
_body
->
mib_pdu
.
cell_id
=
frame_parms
->
Nid_cell
;
// confirm with TCL
ue
->
if_inst
->
dl_indication
(
&
ue
->
dl_indication
);
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
View file @
6c925e59
...
...
@@ -282,6 +282,12 @@ typedef struct {
uint32_t
G
;
/// Current Number of RBs
uint16_t
nb_rb
;
/// Starting RB number
uint16_t
start_rb
;
/// Number of Symbols
uint16_t
nb_symbols
;
/// Starting Symbol number
uint16_t
start_symbol
;
/// Current subband PMI allocation
uint16_t
pmi_alloc
;
/// Current RB allocation (even slots)
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
6c925e59
...
...
@@ -3508,10 +3508,8 @@ int nr_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *
crc_scrambled_values
,
&
nr_dci_info_extracted
);
//ue->dci_ind.dci_list = (fapi_nr_dci_indication_pdu_t *)malloc(num_dci * sizeof(fapi_nr_dci_indication_pdu_t));
ue
->
dci_ind
.
dci_list
[
i
].
rnti
=
0x0000
;
ue
->
dci_ind
.
dci_list
[
i
].
dci_type
=
0
;
ue
->
dci_ind
.
dci_list
[
i
].
rnti
=
dci_alloc_rx
[
i
].
rnti
;
ue
->
dci_ind
.
dci_list
[
i
].
dci_format
=
dci_alloc_rx
[
i
].
format
;
memcpy
(
&
ue
->
dci_ind
.
dci_list
[
i
].
dci
,
&
nr_dci_info_extracted
,
sizeof
(
fapi_nr_dci_pdu_rel15_t
)
);
// TODO: check where should we send up this message.
...
...
openair2/LAYER2/NR_MAC_UE/mac_extern.h
View file @
6c925e59
...
...
@@ -30,7 +30,7 @@
* \warning
*/
// Type0-PDCCH search space
extern
const
int32_t
table_38213_13_1_c2
[
16
];
extern
const
int32_t
table_38213_13_1_c3
[
16
];
extern
const
int32_t
table_38213_13_1_c4
[
16
];
...
...
@@ -80,4 +80,10 @@ extern const float table_38213_13_12_c1[16];
extern
const
int32_t
table_38213_13_12_c2
[
16
];
extern
const
float
table_38213_13_12_c3
[
16
];
extern
const
int32_t
table_38213_10_1_1_c2
[
5
];
\ No newline at end of file
extern
const
int32_t
table_38213_10_1_1_c2
[
5
];
// DCI extraction
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
extern
uint8_t
table_6_1_2_1_1_2_time_dom_res_alloc_A
[
16
][
3
];
// for PDSCH from TS 38.214 subclause 5.1.2.1.1
extern
uint8_t
table_5_1_2_1_1_2_time_dom_res_alloc_A
[
16
][
3
];
\ No newline at end of file
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @
6c925e59
...
...
@@ -113,7 +113,7 @@ uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t
eNB_id
,
rnti_t
rnti
,
sub_frame_t
subframe
);
int8_t
nr_ue_process_dci
(
module_id_t
module_id
,
int
cc_id
,
uint8_t
gNB_index
,
fapi_nr_dci_pdu_rel15_t
*
dci
,
uint16_t
rnti
,
uint32_t
dci_
type
);
int8_t
nr_ue_process_dci
(
module_id_t
module_id
,
int
cc_id
,
uint8_t
gNB_index
,
fapi_nr_dci_pdu_rel15_t
*
dci
,
uint16_t
rnti
,
uint32_t
dci_
format
);
uint32_t
get_ssb_frame
(
uint32_t
test
);
uint32_t
get_ssb_slot
(
uint32_t
ssb_index
);
...
...
openair2/LAYER2/NR_MAC_UE/mac_vars.c
View file @
6c925e59
...
...
@@ -88,4 +88,47 @@ const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7
const
int32_t
table_38213_13_12_c2
[
16
]
=
{
1
,
2
,
1
,
2
,
1
,
2
,
2
,
2
,
2
,
1
,
2
,
2
,
1
,
1
,
reserved
,
reserved
};
// index 14-15 reserved
const
float
table_38213_13_12_c3
[
16
]
=
{
1
,
0
.
5
f
,
1
,
0
.
5
f
,
1
,
0
.
5
f
,
0
.
5
f
,
0
.
5
f
,
0
.
5
f
,
1
,
0
.
5
f
,
0
.
5
f
,
1
,
1
,
reserved
,
reserved
};
// M, index 14-15 reserved
const
int32_t
table_38213_10_1_1_c2
[
5
]
=
{
0
,
0
,
4
,
2
,
1
};
\ No newline at end of file
const
int32_t
table_38213_10_1_1_c2
[
5
]
=
{
0
,
0
,
4
,
2
,
1
};
#define mu_pusch 1
// definition table j Table 6.1.2.1.1-4
#define j ((mu_pusch==3)?3:(mu_pusch==2)?2:1)
uint8_t
table_6_1_2_1_1_2_time_dom_res_alloc_A
[
16
][
3
]
=
{
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
{
j
,
0
,
14
},
// row index 1
{
j
,
0
,
12
},
// row index 2
{
j
,
0
,
10
},
// row index 3
{
j
,
2
,
10
},
// row index 4
{
j
,
4
,
10
},
// row index 5
{
j
,
4
,
8
},
// row index 6
{
j
,
4
,
6
},
// row index 7
{
j
+
1
,
0
,
14
},
// row index 8
{
j
+
1
,
0
,
12
},
// row index 9
{
j
+
1
,
0
,
10
},
// row index 10
{
j
+
2
,
0
,
14
},
// row index 11
{
j
+
2
,
0
,
12
},
// row index 12
{
j
+
2
,
0
,
10
},
// row index 13
{
j
,
8
,
6
},
// row index 14
{
j
+
3
,
0
,
14
},
// row index 15
{
j
+
3
,
0
,
10
}
// row index 16
};
#define dmrs_typeA_pos 2
uint8_t
table_5_1_2_1_1_2_time_dom_res_alloc_A
[
16
][
3
]
=
{
// for PDSCH from TS 38.214 subclause 5.1.2.1.1
{
0
,(
dmrs_typeA_pos
==
2
)
?
2
:
3
,
(
dmrs_typeA_pos
==
2
)
?
12
:
11
},
// row index 1
{
0
,(
dmrs_typeA_pos
==
2
)
?
2
:
3
,
(
dmrs_typeA_pos
==
2
)
?
10
:
9
},
// row index 2
{
0
,(
dmrs_typeA_pos
==
2
)
?
2
:
3
,
(
dmrs_typeA_pos
==
2
)
?
9
:
8
},
// row index 3
{
0
,(
dmrs_typeA_pos
==
2
)
?
2
:
3
,
(
dmrs_typeA_pos
==
2
)
?
7
:
6
},
// row index 4
{
0
,(
dmrs_typeA_pos
==
2
)
?
2
:
3
,
(
dmrs_typeA_pos
==
2
)
?
5
:
4
},
// row index 5
{
0
,(
dmrs_typeA_pos
==
2
)
?
9
:
10
,(
dmrs_typeA_pos
==
2
)
?
4
:
4
},
// row index 6
{
0
,(
dmrs_typeA_pos
==
2
)
?
4
:
6
,
(
dmrs_typeA_pos
==
2
)
?
4
:
4
},
// row index 7
{
0
,
5
,
7
},
// row index 8
{
0
,
5
,
2
},
// row index 9
{
0
,
9
,
2
},
// row index 10
{
0
,
12
,
2
},
// row index 11
{
0
,
1
,
13
},
// row index 12
{
0
,
1
,
6
},
// row index 13
{
0
,
2
,
4
},
// row index 14
{
0
,
4
,
7
},
// row index 15
{
0
,
8
,
4
}
// row index 16
};
\ No newline at end of file
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
6c925e59
...
...
@@ -34,6 +34,7 @@
#include "mac_extern.h"
#include "RRC/NR_UE/rrc_proto.h"
#include "assertions.h"
#include "PHY/defs_nr_UE.h"
#include <stdio.h>
#include <math.h>
...
...
@@ -83,7 +84,7 @@ int8_t nr_ue_decode_mib(
}
}
#if
0
#if
def DEBUG_MIB
printf
(
"system frame number(6 MSB bits): %d
\n
"
,
mac
->
mib
->
systemFrameNumber
.
buf
[
0
]);
printf
(
"system frame number(with LSB): %d
\n
"
,
(
int
)
frame
);
printf
(
"subcarrier spacing: %d
\n
"
,
(
int
)
mac
->
mib
->
subCarrierSpacingCommon
);
...
...
@@ -269,12 +270,8 @@ int8_t nr_ue_decode_mib(
uint32_t
first_symbol_index
;
uint32_t
search_space_duration
;
// element of search space
uint32_t
coreset_duration
;
// element of coreset
// 38.213 table 10.1-1
/// MUX PATTERN 1
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
1
&&
frequency_range
==
FR1
){
...
...
@@ -315,7 +312,6 @@ int8_t nr_ue_decode_mib(
search_space_duration
=
2
;
}
/// MUX PATTERN 2
if
(
mac
->
type0_pdcch_ss_mux_pattern
==
2
){
...
...
@@ -423,7 +419,6 @@ int8_t nr_ue_decode_mib(
mac
->
type0_pdcch_ss_sfn_c
=
sfn_c
;
mac
->
type0_pdcch_ss_n_c
=
n_c
;
// fill in the elements in config request inside P5 message
mac
->
phy_config
.
config_req
.
pbch_config
.
system_frame_number
=
frame
;
// after calculation
mac
->
phy_config
.
config_req
.
pbch_config
.
subcarrier_spacing_common
=
mac
->
mib
->
subCarrierSpacingCommon
;
...
...
@@ -543,9 +538,137 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
return
CONNECTION_OK
;
}
int8_t
nr_ue_process_dci
(
module_id_t
module_id
,
int
cc_id
,
uint8_t
gNB_index
,
fapi_nr_dci_pdu_rel15_t
*
dci
,
uint16_t
rnti
,
uint32_t
dci_
type
){
int8_t
nr_ue_process_dci
(
module_id_t
module_id
,
int
cc_id
,
uint8_t
gNB_index
,
fapi_nr_dci_pdu_rel15_t
*
dci
,
uint16_t
rnti
,
uint32_t
dci_
format
){
NR_UE_MAC_INST_t
*
mac
=
get_mac_inst
(
module_id
);
fapi_nr_dl_config_request_t
*
dl_config
=
&
mac
->
dl_config_request
;
fapi_nr_ul_config_request_t
*
ul_config
=
&
mac
->
ul_config_request
;
const
uint16_t
n_RB_ULBWP
=
106
;
const
uint16_t
n_RB_DLBWP
=
106
;
uint32_t
k_offset
;
uint32_t
sliv_S
;
uint32_t
sliv_L
;
uint32_t
l_RB
;
uint32_t
start_RB
;
uint32_t
tmp_RIV
;
switch
(
dci_format
){
case
format0_0
:
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// 0, 1, 2, 3, or 4 bits as defined in:
// Subclause 6.1.2.1 of [6, TS 38.214] for formats format0_0,format0_1
// Subclause 5.1.2.1 of [6, TS 38.214] for formats format1_0,format1_1
// The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
k_offset
=
table_6_1_2_1_1_2_time_dom_res_alloc_A
[
dci
->
time_dom_resource_assignment
][
0
];
sliv_S
=
table_6_1_2_1_1_2_time_dom_res_alloc_A
[
dci
->
time_dom_resource_assignment
][
1
];
sliv_L
=
table_6_1_2_1_1_2_time_dom_res_alloc_A
[
dci
->
time_dom_resource_assignment
][
2
];
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
// At the moment we are supporting only format 1_0 (and not format 1_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_ULBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_ULBWP/2)
// RIV = n_RB_ULBWP * (n_RB_ULBWP - l_RB + 1) + (n_RB_ULBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_ULBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_ULBWP/2)
l_RB
=
floor
(
dci
->
freq_dom_resource_assignment_DL
/
n_RB_ULBWP
)
+
1
;
start_RB
=
dci
->
freq_dom_resource_assignment_DL
%
n_RB_ULBWP
;
// if (l_RB - 1) > floor (n_RB_ULBWP/2) we need to recalculate them using the following lines
tmp_RIV
=
n_RB_ULBWP
*
(
l_RB
-
1
)
+
start_RB
;
if
(
tmp_RIV
!=
dci
->
freq_dom_resource_assignment_DL
)
{
// then (l_RB - 1) > floor (n_RB_ULBWP/2) and we need to recalculate l_RB and start_RB
l_RB
=
n_RB_ULBWP
-
l_RB
+
2
;
start_RB
=
n_RB_ULBWP
-
start_RB
-
1
;
}
// UL_CONFIG_REQ
ul_config
->
ul_config_list
[
ul_config
->
number_pdus
].
pdu_type
=
FAPI_NR_DL_CONFIG_TYPE_PUSCH
;
ul_config
->
ul_config_list
[
ul_config
->
number_pdus
].
ulsch_config_pdu
.
rnti
=
rnti
;
fapi_nr_ul_config_pusch_pdu_rel15_t
*
ulsch_config_pdu
=
&
ul_config
->
ul_config_list
[
ul_config
->
number_pdus
].
ulsch_config_pdu
.
ulsch_pdu_rel15
;
ulsch_config_pdu
->
number_rbs
=
l_RB
;
ulsch_config_pdu
->
start_rb
=
start_RB
;
ulsch_config_pdu
->
number_symbols
=
sliv_L
;
ulsch_config_pdu
->
start_symbol
=
sliv_S
;
ulsch_config_pdu
->
mcs
=
dci
->
mcs
;
//ulsch0->harq_processes[dci->harq_process_number]->first_rb = start_RB;
//ulsch0->harq_processes[dci->harq_process_number]->nb_rb = l_RB;
//ulsch0->harq_processes[dci->harq_process_number]->mcs = dci->mcs;
//ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi= nr_pdci_info_extracted->ndi;
break
;
case
format0_1
:
break
;
case
format1_0
:
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// Subclause 5.1.2.1 of [6, TS 38.214]
// the Time domain resource assignment field of the DCI provides a row index of a higher layer configured table pdsch-symbolAllocation
// FIXME! To clarify which parameters to update after reception of row index
k_offset
=
table_5_1_2_1_1_2_time_dom_res_alloc_A
[
dci
->
time_dom_resource_assignment
][
0
];
sliv_S
=
table_5_1_2_1_1_2_time_dom_res_alloc_A
[
dci
->
time_dom_resource_assignment
][
1
];
sliv_L
=
table_5_1_2_1_1_2_time_dom_res_alloc_A
[
dci
->
time_dom_resource_assignment
][
2
];
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
// only uplink resource allocation type 1
// At the moment we are supporting only format 0_0 (and not format 0_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_DLBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_DLBWP/2)
// RIV = n_RB_DLBWP * (n_RB_DLBWP - l_RB + 1) + (n_RB_DLBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_DLBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_DLBWP/2)
l_RB
=
floor
(
dci
->
freq_dom_resource_assignment_DL
/
n_RB_DLBWP
)
+
1
;
start_RB
=
dci
->
freq_dom_resource_assignment_DL
%
n_RB_DLBWP
;
// if (l_RB - 1) > floor (n_RB_DLBWP/2) we need to recalculate them using the following lines
tmp_RIV
=
n_RB_DLBWP
*
(
l_RB
-
1
)
+
start_RB
;
if
(
tmp_RIV
!=
dci
->
freq_dom_resource_assignment_DL
)
{
// then (l_RB - 1) > floor (n_RB_DLBWP/2) and we need to recalculate l_RB and start_RB
l_RB
=
n_RB_DLBWP
-
l_RB
+
2
;
start_RB
=
n_RB_DLBWP
-
start_RB
-
1
;
}
// DL_CONFIG_REQ
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
pdu_type
=
FAPI_NR_DL_CONFIG_TYPE_DLSCH
;
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
dlsch_config_pdu
.
rnti
=
rnti
;
fapi_nr_dl_config_dlsch_pdu_rel15_t
*
dlsch_config_pdu
=
&
dl_config
->
dl_config_list
[
dl_config
->
number_pdus
].
dlsch_config_pdu
.
dlsch_config_rel15
;
dlsch_config_pdu
->
number_rbs
=
l_RB
;
dlsch_config_pdu
->
start_rb
=
start_RB
;
dlsch_config_pdu
->
number_symbols
=
sliv_L
;
dlsch_config_pdu
->
start_symbol
=
sliv_S
;
dlsch_config_pdu
->
mcs
=
dci
->
mcs
;
//pdlsch0_harq->nb_rb = l_RB;
//pdlsch0->current_harq_pid = dci->harq_process_number;
//pdlsch0->active = 1;
//pdlsch0->rnti = rnti;
//pdlsch0_harq->mcs = nr_pdci_info_extracted->mcs;
//pdlsch0_harq->DCINdi = nr_pdci_info_extracted->ndi;
dl_config
->
number_pdus
=
dl_config
->
number_pdus
+
1
;
break
;
case
format1_1
:
break
;
case
format2_0
:
break
;
case
format2_1
:
break
;
case
format2_2
:
break
;
case
format2_3
:
break
;
default:
break
;
}
if
(
rnti
==
SI_RNTI
){
...
...
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @
6c925e59
...
...
@@ -112,20 +112,20 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
if
(
dl_info
->
rx_ind
!=
NULL
){
printf
(
"[L2][IF MODULE][DL INDICATION][RX_IND]
\n
"
);
for
(
i
=
0
;
i
<
dl_info
->
rx_ind
->
number_pdus
;
++
i
){
switch
(
dl_info
->
rx_ind
->
rx_
request
_body
[
i
].
pdu_type
){
switch
(
dl_info
->
rx_ind
->
rx_
indication
_body
[
i
].
pdu_type
){
case
FAPI_NR_RX_PDU_TYPE_MIB
:
ret_mask
|=
(
handle_bcch_bch
(
dl_info
->
module_id
,
dl_info
->
cc_id
,
dl_info
->
gNB_index
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
mib_pdu
.
pdu
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
mib_pdu
.
additional_bits
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
mib_pdu
.
ssb_index
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
mib_pdu
.
ssb_length
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
mib_pdu
.
cell_id
))
<<
FAPI_NR_RX_PDU_TYPE_MIB
;
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
mib_pdu
.
pdu
,
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
mib_pdu
.
additional_bits
,
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
mib_pdu
.
ssb_index
,
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
mib_pdu
.
ssb_length
,
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
mib_pdu
.
cell_id
))
<<
FAPI_NR_RX_PDU_TYPE_MIB
;
break
;
case
FAPI_NR_RX_PDU_TYPE_SIB
:
ret_mask
|=
(
handle_bcch_dlsch
(
dl_info
->
module_id
,
dl_info
->
cc_id
,
dl_info
->
gNB_index
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
sib_pdu
.
sibs_mask
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
sib_pdu
.
pdu
,
(
dl_info
->
rx_ind
->
rx_
request
_body
+
i
)
->
sib_pdu
.
pdu_length
))
<<
FAPI_NR_RX_PDU_TYPE_SIB
;
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
sib_pdu
.
sibs_mask
,
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
sib_pdu
.
pdu
,
(
dl_info
->
rx_ind
->
rx_
indication
_body
+
i
)
->
sib_pdu
.
pdu_length
))
<<
FAPI_NR_RX_PDU_TYPE_SIB
;
break
;
case
FAPI_NR_RX_PDU_TYPE_DLSCH
:
ret_mask
|=
(
0
)
<<
FAPI_NR_RX_PDU_TYPE_DLSCH
;
...
...
@@ -138,13 +138,23 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
}
}
fapi_nr_dl_config_request_t
*
dl_config
=
&
mac
->
dl_config_request
;
if
(
dl_info
->
dci_ind
!=
NULL
){
printf
(
"[L2][IF MODULE][DL INDICATION][DCI_IND]
\n
"
);
for
(
i
=
0
;
dl_info
->
dci_ind
->
number_of_dcis
;
++
i
){
fapi_nr_dci_pdu_rel15_t
*
dci
=
&
dl_info
->
dci_ind
->
dci_list
[
i
].
dci
;
switch
((
dl_info
->
dci_ind
->
dci_list
+
i
)
->
dci_type
){
ret_mask
|=
(
handle_dci
(
dl_info
->
module_id
,
dl_info
->
cc_id
,
dl_info
->
gNB_index
,
dci
,
(
dl_info
->
dci_ind
->
dci_list
+
i
)
->
rnti
,
(
dl_info
->
dci_ind
->
dci_list
+
i
)
->
dci_format
))
<<
FAPI_NR_DCI_IND
;
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0:
case FAPI_NR_DCI_TYPE_0_1:
case FAPI_NR_DCI_TYPE_1_1:
...
...
@@ -161,19 +171,7 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
// mapping into DL_CONFIG_REQ for DL-SCH
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
/*dlsch_config_pdu->format_indicator = dci->dci_format;
dlsch_config_pdu->frequency_domain_assignment = dci->frequency_domain_resouce_assignment;
dlsch_config_pdu->time_domain_assignment = dci->time_domain_resource_assignment;
dlsch_config_pdu->vrb_to_prb_mapping = dci->vrb_to_prb_mapping;
dlsch_config_pdu->mcs = dci->mcs;
dlsch_config_pdu->ndi = dci->new_data_indication;
dlsch_config_pdu->rv = dci->redundancy_version;
dlsch_config_pdu->harq_pid = dci->harq_process;
dlsch_config_pdu->dai = dci->downlink_assignment_index;
dlsch_config_pdu->tpc = dci->tpc_command;
dlsch_config_pdu->pucch_resource_indicator = dci->pucch_resource_indicator;
dlsch_config_pdu->pdsch_to_harq_feedback_timing_indicator = dci->pdsch_to_harq_feedback_timing_indicator;
*/
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = 0x0000; // TX RNTI: UE-spec
memcpy(dlsch_config_pdu, dci, sizeof(fapi_nr_dci_pdu_rel15_t));
...
...
@@ -193,7 +191,7 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
default:
break;
}
}
*/
//(dl_info->dci_list+i)->rnti
...
...
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