Commit bd677b74 authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/NR_MAC_Multi_Rach_GlobalEdge' into integration_2021_wk08

parents 98ebbc3d 441c8259
...@@ -715,8 +715,10 @@ typedef struct { ...@@ -715,8 +715,10 @@ typedef struct {
uint16_t prgSize; uint16_t prgSize;
/// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255 /// Number of STD ant ports (parallel streams) feeding into the digBF Value: 0->255
uint8_t digBFInterfaces; uint8_t digBFInterfaces;
// Depends on numPRGs
uint16_t PMIdx[275]; uint16_t PMIdx[275];
uint16_t *beamIdx[275]; // Depends on digBFInterfaces
uint16_t beamIdx[256];
} nfapi_nr_tx_precoding_and_beamforming_t; } nfapi_nr_tx_precoding_and_beamforming_t;
//table 3-37 //table 3-37
......
...@@ -401,21 +401,37 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -401,21 +401,37 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
const int UE_id = add_new_nr_ue(Mod_idP, rnti, secondaryCellGroup); const int UE_id = add_new_nr_ue(Mod_idP, rnti, secondaryCellGroup);
LOG_I(PHY,"Added new UE_id %d/%x with initial secondaryCellGroup\n",UE_id,rnti); LOG_I(PHY,"Added new UE_id %d/%x with initial secondaryCellGroup\n",UE_id,rnti);
} else if (add_ue == 1 && !get_softmodem_params()->phy_test) { } else if (add_ue == 1 && !get_softmodem_params()->phy_test) {
/* TODO: should check for free RA process */
const int CC_id = 0; const int CC_id = 0;
NR_RA_t *ra = &RC.nrmac[Mod_idP]->common_channels[CC_id].ra[0]; NR_COMMON_channels_t *cc = &RC.nrmac[Mod_idP]->common_channels[CC_id];
ra->state = RA_IDLE; uint8_t ra_index = 0;
/* checking for free RA process */
for(; ra_index < NR_NB_RA_PROC_MAX; ra_index++) {
if((cc->ra[ra_index].state == RA_IDLE) && (!cc->ra[ra_index].cfra)) break;
}
if (ra_index == NR_NB_RA_PROC_MAX) {
LOG_E(MAC, "%s() %s:%d RA processes are not available for CFRA RNTI :%x\n", __FUNCTION__, __FILE__, __LINE__, rnti);
return -1;
}
NR_RA_t *ra = &cc->ra[ra_index];
ra->secondaryCellGroup = secondaryCellGroup; ra->secondaryCellGroup = secondaryCellGroup;
if (secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated!=NULL) { if (secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated!=NULL) {
if (secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra != NULL) { if (secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra != NULL) {
ra->cfra = true; ra->cfra = true;
ra->rnti = rnti; ra->rnti = rnti;
struct NR_CFRA cfra = *secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra; struct NR_CFRA *cfra = secondaryCellGroup->spCellConfig->reconfigurationWithSync->rach_ConfigDedicated->choice.uplink->cfra;
uint8_t num_preamble = cfra.resources.choice.ssb->ssb_ResourceList.list.count; uint8_t num_preamble = cfra->resources.choice.ssb->ssb_ResourceList.list.count;
ra->preambles.num_preambles = num_preamble; ra->preambles.num_preambles = num_preamble;
ra->preambles.preamble_list = (uint8_t *) malloc(num_preamble*sizeof(uint8_t)); ra->preambles.preamble_list = (uint8_t *) malloc(num_preamble*sizeof(uint8_t));
for (int i = 0; i < num_preamble; i++) for(int i=0; i<cc->num_active_ssb; i++) {
ra->preambles.preamble_list[i] = cfra.resources.choice.ssb->ssb_ResourceList.list.array[i]->ra_PreambleIndex; for(int j=0; j<num_preamble; j++) {
if (cc->ssb_index[i] == cfra->resources.choice.ssb->ssb_ResourceList.list.array[j]->ssb) {
// one dedicated preamble for each beam
ra->preambles.preamble_list[i] =
cfra->resources.choice.ssb->ssb_ResourceList.list.array[j]->ra_PreambleIndex;
break;
}
}
}
} }
} }
LOG_I(PHY,"Added new RA process for UE RNTI %04x with initial secondaryCellGroup\n", rnti); LOG_I(PHY,"Added new RA process for UE RNTI %04x with initial secondaryCellGroup\n", rnti);
......
...@@ -245,7 +245,9 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP, ...@@ -245,7 +245,9 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
TX_req->PDU_index = nr_mac->pdu_index[CC_id]++; TX_req->PDU_index = nr_mac->pdu_index[CC_id]++;
TX_req->num_TLV = 1; TX_req->num_TLV = 1;
TX_req->TLVs[0].length = 8; TX_req->TLVs[0].length = 8;
memcpy((void*)&TX_req->TLVs[0].value.direct[0],(void*)&cc[CC_id].RAR_pdu.payload[0],TX_req->TLVs[0].length); // why do we copy from RAR_pdu here? Shouldn't we fill some more or less
// meaningful data, e.g., padding + random data?
//memcpy((void *)&TX_req->TLVs[0].value.direct[0], (void *)&cc[CC_id].RAR_pdu[0].payload[0], TX_req->TLVs[0].length);
nr_mac->TX_req[CC_id].Number_of_PDUs++; nr_mac->TX_req[CC_id].Number_of_PDUs++;
nr_mac->TX_req[CC_id].SFN=frameP; nr_mac->TX_req[CC_id].SFN=frameP;
nr_mac->TX_req[CC_id].Slot=slotP; nr_mac->TX_req[CC_id].Slot=slotP;
......
...@@ -864,7 +864,7 @@ void nr_schedule_ulsch(module_id_t module_id, ...@@ -864,7 +864,7 @@ void nr_schedule_ulsch(module_id_t module_id,
/* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each /* a PDCCH PDU groups DCIs per BWP and CORESET. Save a pointer to each
* allocated PDCCH so we can easily allocate UE's DCIs independent of any * allocated PDCCH so we can easily allocate UE's DCIs independent of any
* CORESET order */ * CORESET order */
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_bwp_coreset[MAX_NUM_BWP][MAX_NUM_CORESET] = {0}; nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_bwp_coreset[MAX_NUM_BWP][MAX_NUM_CORESET] = {{0}};
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info; NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
......
...@@ -346,11 +346,7 @@ void config_nr_mib(int Mod_idP, ...@@ -346,11 +346,7 @@ void config_nr_mib(int Mod_idP,
int cellBarred, int cellBarred,
int intraFreqReselection); int intraFreqReselection);
void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra);
void nr_generate_Msg2(module_id_t module_idP,
int CC_id,
frame_t frameP,
sub_frame_t slotP);
void nr_process_mac_pdu( void nr_process_mac_pdu(
module_id_t module_idP, module_id_t module_idP,
......
...@@ -194,8 +194,6 @@ typedef struct { ...@@ -194,8 +194,6 @@ typedef struct {
uint32_t PCCH_alloc_pdu; uint32_t PCCH_alloc_pdu;
/// Outgoing PCCH pdu for PHY /// Outgoing PCCH pdu for PHY
PCCH_PDU PCCH_pdu; PCCH_PDU PCCH_pdu;
/// Outgoing RAR pdu for PHY
RAR_PDU RAR_pdu;
/// Template for RA computations /// Template for RA computations
NR_RA_t ra[NR_NB_RA_PROC_MAX]; NR_RA_t ra[NR_NB_RA_PROC_MAX];
/// VRB map for common channels /// VRB map for common channels
...@@ -215,6 +213,8 @@ typedef struct { ...@@ -215,6 +213,8 @@ typedef struct {
uint8_t max_association_period; uint8_t max_association_period;
//SSB index //SSB index
uint8_t ssb_index[MAX_NUM_OF_SSB]; uint8_t ssb_index[MAX_NUM_OF_SSB];
//CB preambles for each SSB
uint8_t cb_preambles_per_ssb;
} NR_COMMON_channels_t; } NR_COMMON_channels_t;
......
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