MR !1079 / MR !1108:
1. Read slots from config file and schedules all slots *except* for slots 0 and 10. This is not a problem, since currently we cannot allocate more than six HARQ feedbacks in a slot, but we might have up to 7 with current configuration

2. phytest mode is configurable. From `nr-softmodem -h`:

   -m: Set the downlink MCS for PHYTEST mode
   -t: Set the uplink MCS for PHYTEST mode
   -M: Set the downlink banwdwidth (in PRBs) for PHYTEST mode
   -T: Set the uplink banwdwidth (in PRBs) for PHYTEST mode
   -D: Bitmap for DLSCH slots (slot 0 starts at LSB)
   -U: Bitmap for ULSCH slots (slot 0 starts at LSB)

3. Scheduler prints more information: UE PHR, PUCCH SNR, PUSCH SNR, RSSI
4. The scheduler learned to scheduler DLSCH/ULSCH in mixed slots (if the time domain allocation matches the mixed slot)
5. The scheduler expects
   * PDSCH Time Domain allocation index 0 to be the DL slot allocation
   * PDSCH TDA index 1 for Mixed DL slot
   * PUSCH TDA index 0 for UL slot
   * PUSCH TDA index 1 for Mixed UL slot
   * PUSCH TDA index 2 for Msg.3
6. Some more cleanup, e.g., separate PDSCH/PUSCH data structures into "semi-static" data (e.g., TDA allocation to use, since it changes seldomly) and "dynamic" data (e.g., RB allocation per slot, which changes every slot)


MR !1137 : Benetel config files fix

MR !1129 : gnb-realtime-hotfix
-Hotfix for realtime performance issue
-Enabled L1 and scheduler timing statistics
-Changed order of UL Indication. L1 Rx -> UL Ind -> L1 Tx

MR !1123 : [CI] ci_phytest
-new 5G NR phy test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106

MR !1128 : [CI] ci_add_runtime_stats
-adding L1 processing stats

MR !1132 : [CI] ci_add_uldlharq_stats
-additonal ulsch/dlsch stat

no MR : hotfix branch fixgtpu 
-revert default values for 5GS
-fix T_IDs.h build

	- Procedure get_l_prime is modified
	- Single and double symbol DMRS are handled in Type A and Type B

Segmentation fault observed in case the address for mod_dmrs[dmrssymbol] is not 16byte aligned.

LocationandBandwidth adjusted according to the location of SSB and Controlresourceset 0
For example for 106RBs configuration files -
	- AbsoluteFrequencySSB = 641032 = RB43 (1032/24) - points to Subcarrier 0 of RB10 of SSB block
	- Hence SSB is located from RB33-RB53
	- Coresetzero sent in MIB is 0 which means offset 0, RBsize 24 from Start of SSB according to table 13.4 in Spec 38.213
	- InitialBWP should start from RB 33 (offset is 0 from SSB) and should be a size of minimum 24 RBs.
	- SLIV = 275 * (24-1) + 33 = 6358
Controlresourceset value wrongly configured to 12 , changed to 0 as sent in MIB.

Procedure fill_dmrs_mask is modified.
	- PDSCH Mapping Type B is supported
	- Modified according to sections 5.1.6.2 of Spec 38.214
	- Single and double symbol DMRS are handled in Type A and Type B

Mapping type according to the time domain allocation from DCI should be used to get the values of DMRS config
For sending sib1 - DCI FORMAT 1_0 will be used with SI_RNTI, UE should perform these actions
according to sections 5.1.6.2 of Spec 38.214

Additional DMRS set to pos2 in case of msg2 reception, msg3 transmission.

Mapping type B is added to RRC reconfig.
	- nr_dlsim updated to test typeA and typeB. Verified the changes.
	- RFSIM Validation of PDSCH Mapping TypeB  by changing timedomainallocation in configuration files.

reverting some changes in benetel-5g config files that were introduced in anticipation of MR 1079, but which has not been merged yet.

Fix SA SIB1 segmentation fault

- No warning in RRC
- Ethernet lib fix: correct include
- fixes Msg.4
- fixes conf: the UE cannot handle mixed slots