Commit 1f86c34f authored by Mohsen Ahadi's avatar Mohsen Ahadi

Update nr_init.c

parent 98994a0b
...@@ -209,45 +209,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB, ...@@ -209,45 +209,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
} }
} }
void nr_init_prs(PHY_VARS_gNB* gNB, uint32_t Nid, uint32_t slotnum, uint32_t symNum) nr_init_prs(gNB);
{
unsigned int x1, x2;
uint16_t Nid, i_ssb, i_ssb2;
unsigned char Lmax, l, n_hf, N_hf;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint8_t reset;
Nid = cfg->cell_config.phy_cell_id.value;
Lmax = fp->Lmax;
N_hf = (Lmax == 4)? 2:1;
for (n_hf = 0; n_hf < N_hf; n_hf++) {
for (l = 0; l < Lmax ; l++) {
i_ssb = l & (Lmax-1);
i_ssb2 = i_ssb + (n_hf<<2);
reset = 1;
// initial x2 for prs as 38.211
uint32_t c_init1, c_init2, c_init3;
uint32_t pow22=1<<22;
uint32_t pow10=1<<10;
c_init1 = pow22*ceil(Nid/1024);
c_init2 = pow10*(slotnum+symNum+1)*(2*(Nid%1024)+1);
c_init3 = Nid%1024;
x2 = c_init1 + c_init2 + c_init3;
for (uint8_t n=0; n<NR_PBCH_DMRS_LENGTH_DWORD; n++) {
gNB->nr_gold_prs[n_hf][l][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
/* Generate low PAPR type 1 sequences for PUSCH DMRS, these are used if transform precoding is enabled. */ /* Generate low PAPR type 1 sequences for PUSCH DMRS, these are used if transform precoding is enabled. */
......
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