Commit 65cbcec5 authored by francescomani's avatar francescomani

fixes to allow FR2 dlsim test

parent 3bfb9529
...@@ -168,7 +168,8 @@ ...@@ -168,7 +168,8 @@
(Test4: HARQ test 25% TP 4 rounds), (Test4: HARQ test 25% TP 4 rounds),
(Test5: HARQ test 33% TP 3 rounds), (Test5: HARQ test 33% TP 3 rounds),
(Test6: HARQ test 50% TP 2 rounds), (Test6: HARQ test 50% TP 2 rounds),
(Test7: 25 PRBs, 15 kHz SCS)</desc> (Test7: 25 PRBs, 15 kHz SCS),
(Test8: 32 PRBs, 120 kHz SCS)</desc>
<main_exec>nr_dlsim</main_exec> <main_exec>nr_dlsim</main_exec>
<main_exec_args>-n100 -R106 -b106 -s5 <main_exec_args>-n100 -R106 -b106 -s5
-n100 -R217 -b217 -s5 -n100 -R217 -b217 -s5
...@@ -176,8 +177,9 @@ ...@@ -176,8 +177,9 @@
-n100 -s1 -S2 -t25 -n100 -s1 -S2 -t25
-n100 -s1 -S2 -t33 -n100 -s1 -S2 -t33
-n100 -s5 -S7 -t50 -n100 -s5 -S7 -t50
-n100 -m0 -e0 -R25 -b25 -i 2 1 0</main_exec_args> -n100 -m0 -e0 -R25 -b25 -i 2 1 0
<tags>test1 test2 test3 test4 test5 test6 test7</tags> -n100 -s5 -m3 -R32 -b32</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7 test8</tags>
<search_expr_true>PDSCH test OK</search_expr_true> <search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false> <search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns> <nruns>3</nruns>
......
...@@ -423,9 +423,7 @@ int get_supported_bw_mhz(frequency_range_t frequency_range, int bw_index) ...@@ -423,9 +423,7 @@ int get_supported_bw_mhz(frequency_range_t frequency_range, int bw_index)
{ {
if (frequency_range == FR1) { if (frequency_range == FR1) {
int bandwidth_index_to_mhz[] = {5, 10, 15, 20, 25, 30, 40, 50, 60, 80, 90, 100}; int bandwidth_index_to_mhz[] = {5, 10, 15, 20, 25, 30, 40, 50, 60, 80, 90, 100};
AssertFatal(bw_index >= 0 && bw_index <= sizeofArray(bandwidth_index_to_mhz), AssertFatal(bw_index >= 0 && bw_index <= sizeofArray(bandwidth_index_to_mhz), "Bandwidth index %d is invalid\n", bw_index);
"Bandwidth index %d is invalid\n",
bw_index);
return bandwidth_index_to_mhz[bw_index]; return bandwidth_index_to_mhz[bw_index];
} else { } else {
int bandwidth_index_to_mhz[] = {50, 100, 200, 400}; int bandwidth_index_to_mhz[] = {50, 100, 200, 400};
......
...@@ -147,10 +147,9 @@ extern void fix_scd(NR_ServingCellConfig_t *scd);// forward declaration ...@@ -147,10 +147,9 @@ extern void fix_scd(NR_ServingCellConfig_t *scd);// forward declaration
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs/nrOfLayers from command line of dlsim */ /* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs/nrOfLayers from command line of dlsim */
int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1, g_nrOfLayers = 1, g_pmi = 0; int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1, g_nrOfLayers = 1, g_pmi = 0;
void nr_dlsim_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot) {
void nr_dlsim_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot)
{
NR_UE_info_t *UE_info = RC.nrmac[module_id]->UE_info.list[0]; NR_UE_info_t *UE_info = RC.nrmac[module_id]->UE_info.list[0];
AssertFatal(RC.nrmac[module_id]->UE_info.list[1]==NULL, "can have only a single UE\n"); AssertFatal(RC.nrmac[module_id]->UE_info.list[1]==NULL, "can have only a single UE\n");
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl;
......
...@@ -274,15 +274,29 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N ...@@ -274,15 +274,29 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N
scc->dmrs_TypeA_Position = NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2; scc->dmrs_TypeA_Position = NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2;
*scc->ssbSubcarrierSpacing = mu_dl; *scc->ssbSubcarrierSpacing = mu_dl;
struct NR_FrequencyInfoDL *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL; NR_FrequencyInfoDL_t *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL;
if (mu_dl == 0) { NR_TDD_UL_DL_ConfigCommon_t *tdd_UL_DL_Config = scc->tdd_UL_DL_ConfigurationCommon;
*frequencyInfoDL->absoluteFrequencySSB = 520432; switch (mu_dl) {
*frequencyInfoDL->frequencyBandList.list.array[0] = 38; case 0 :
frequencyInfoDL->absoluteFrequencyPointA = 520000; *frequencyInfoDL->absoluteFrequencySSB = 520432;
} else { *frequencyInfoDL->frequencyBandList.list.array[0] = 38;
*frequencyInfoDL->absoluteFrequencySSB = 641032; frequencyInfoDL->absoluteFrequencyPointA = 520000;
*frequencyInfoDL->frequencyBandList.list.array[0] = 78; tdd_UL_DL_Config->pattern1.dl_UL_TransmissionPeriodicity = NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms10;
frequencyInfoDL->absoluteFrequencyPointA = 640000; break;
case 1 :
*frequencyInfoDL->absoluteFrequencySSB = 641032;
*frequencyInfoDL->frequencyBandList.list.array[0] = 78;
frequencyInfoDL->absoluteFrequencyPointA = 640000;
tdd_UL_DL_Config->pattern1.dl_UL_TransmissionPeriodicity = NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5;
break;
case 3 :
*frequencyInfoDL->absoluteFrequencySSB = 2071387;
*frequencyInfoDL->frequencyBandList.list.array[0] = 257;
frequencyInfoDL->absoluteFrequencyPointA = 2071003;
tdd_UL_DL_Config->pattern1.dl_UL_TransmissionPeriodicity = NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms1p25;
break;
default :
AssertFatal(false, "Numerolgy %d not supported\n", mu_dl);
} }
*frequencyInfoDL->scs_SpecificCarrierList.list.array[0] = configure_scs_carrier(mu_dl, N_RB_DL); *frequencyInfoDL->scs_SpecificCarrierList.list.array[0] = configure_scs_carrier(mu_dl, N_RB_DL);
...@@ -306,7 +320,19 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N ...@@ -306,7 +320,19 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N
timedomainresourceallocation1); timedomainresourceallocation1);
struct NR_FrequencyInfoUL *frequencyInfoUL = scc->uplinkConfigCommon->frequencyInfoUL; struct NR_FrequencyInfoUL *frequencyInfoUL = scc->uplinkConfigCommon->frequencyInfoUL;
*frequencyInfoUL->frequencyBandList->list.array[0] = mu_ul ? 78 : 38; switch (mu_ul) {
case 0 :
*frequencyInfoUL->frequencyBandList->list.array[0] = 38;
break;
case 1 :
*frequencyInfoUL->frequencyBandList->list.array[0] = 78;
break;
case 3 :
*frequencyInfoUL->frequencyBandList->list.array[0] = 257;
break;
default :
AssertFatal(false, "Numerolgy %d not supported\n", mu_ul);
}
*frequencyInfoUL->absoluteFrequencyPointA = -1; *frequencyInfoUL->absoluteFrequencyPointA = -1;
*frequencyInfoUL->scs_SpecificCarrierList.list.array[0] = configure_scs_carrier(mu_ul, N_RB_UL); *frequencyInfoUL->scs_SpecificCarrierList.list.array[0] = configure_scs_carrier(mu_ul, N_RB_UL);
*frequencyInfoUL->p_Max = 20; *frequencyInfoUL->p_Max = 20;
...@@ -348,18 +374,15 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N ...@@ -348,18 +374,15 @@ void fill_scc_sim(NR_ServingCellConfigCommon_t *scc, uint64_t *ssb_bitmap, int N
scc->ssb_PositionsInBurst->present = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap; scc->ssb_PositionsInBurst->present = NR_ServingCellConfigCommon__ssb_PositionsInBurst_PR_mediumBitmap;
*ssb_bitmap = 0xff; *ssb_bitmap = 0xff;
struct NR_TDD_UL_DL_ConfigCommon *tdd_UL_DL_ConfigurationCommon = scc->tdd_UL_DL_ConfigurationCommon; tdd_UL_DL_Config->referenceSubcarrierSpacing = mu_dl;
tdd_UL_DL_ConfigurationCommon->referenceSubcarrierSpacing = mu_dl;
NR_TDD_UL_DL_Pattern_t *p1 = &tdd_UL_DL_ConfigurationCommon->pattern1; NR_TDD_UL_DL_Pattern_t *p1 = &tdd_UL_DL_Config->pattern1;
p1->dl_UL_TransmissionPeriodicity = (mu_dl == 0) ? NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms10
: NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5;
p1->nrofDownlinkSlots = 7; p1->nrofDownlinkSlots = 7;
p1->nrofDownlinkSymbols = 6; p1->nrofDownlinkSymbols = 6;
p1->nrofUplinkSlots = 2; p1->nrofUplinkSlots = 2;
p1->nrofUplinkSymbols = 4; p1->nrofUplinkSymbols = 4;
struct NR_TDD_UL_DL_Pattern *p2 = tdd_UL_DL_ConfigurationCommon->pattern2; struct NR_TDD_UL_DL_Pattern *p2 = tdd_UL_DL_Config->pattern2;
if (p2) { if (p2) {
p2->dl_UL_TransmissionPeriodicity = 321; p2->dl_UL_TransmissionPeriodicity = 321;
p2->nrofDownlinkSlots = -1; p2->nrofDownlinkSlots = -1;
......
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