Commit 677ad429 authored by Masayuki HARADA's avatar Masayuki HARADA

Devide source file of scheduler

parent 0ffd0ffe
...@@ -934,7 +934,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, ...@@ -934,7 +934,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nb_rb); nb_rb);
//#endif //#endif
#ifndef UE_EXPANSION #ifndef UE_EXPANSION // TODO check this modified
if (ulsch_harq->round == 0) { if (ulsch_harq->round == 0) {
#endif #endif
// This is a new packet, so compute quantities regarding segmentation // This is a new packet, so compute quantities regarding segmentation
......
...@@ -637,9 +637,8 @@ typedef struct { ...@@ -637,9 +637,8 @@ typedef struct {
uint16_t phich_reg[MAX_NUM_PHICH_GROUPS][3]; uint16_t phich_reg[MAX_NUM_PHICH_GROUPS][3];
struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[MAX_MBSFN_AREA]; struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[MAX_MBSFN_AREA];
#ifdef UE_EXPANSION /// for fair RR scheduler
uint32_t ue_multiple_max; uint32_t ue_multiple_max;
#endif
} LTE_DL_FRAME_PARMS; } LTE_DL_FRAME_PARMS;
typedef enum { typedef enum {
......
...@@ -166,9 +166,7 @@ typedef struct RrcConfigurationReq_s { ...@@ -166,9 +166,7 @@ typedef struct RrcConfigurationReq_s {
long ue_TimersAndConstants_n310[MAX_NUM_CCs]; long ue_TimersAndConstants_n310[MAX_NUM_CCs];
long ue_TimersAndConstants_n311[MAX_NUM_CCs]; long ue_TimersAndConstants_n311[MAX_NUM_CCs];
long ue_TransmissionMode[MAX_NUM_CCs]; long ue_TransmissionMode[MAX_NUM_CCs];
#ifdef UE_EXPANSION
long ue_multiple_max[MAX_NUM_CCs]; long ue_multiple_max[MAX_NUM_CCs];
#endif
} RrcConfigurationReq; } RrcConfigurationReq;
// UE: NAS -> RRC messages // UE: NAS -> RRC messages
......
...@@ -868,21 +868,10 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) { ...@@ -868,21 +868,10 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
RC.config_file_name, i, prach_zero_correlation); RC.config_file_name, i, prach_zero_correlation);
RRC_CONFIGURATION_REQ (msg_p).prach_freq_offset[j] = prach_freq_offset; RRC_CONFIGURATION_REQ (msg_p).prach_freq_offset[j] = prach_freq_offset;
#ifndef UE_EXPANSION
if ((prach_freq_offset <0) || (prach_freq_offset > 94)) if ((prach_freq_offset <0) || (prach_freq_offset > 94))
AssertFatal (0, AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for prach_freq_offset choice: 0..94!\n", "Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for prach_freq_offset choice: 0..94!\n",
RC.config_file_name, i, prach_freq_offset); RC.config_file_name, i, prach_freq_offset);
#else
if ((N_RB_DL == 25) && (prach_freq_offset != 2))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for prach_freq_offset choice: 2(N_RB_DL %d)!\n",
RC.config_file_name, i, prach_freq_offset,N_RB_DL);
if (((N_RB_DL == 50) || (N_RB_DL == 100)) && (prach_freq_offset < 3))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for prach_freq_offset choice: 3,4(N_RB_DL %d)!\n",
RC.config_file_name, i, prach_freq_offset,N_RB_DL);
#endif
RRC_CONFIGURATION_REQ (msg_p).pucch_delta_shift[j] = pucch_delta_shift-1; RRC_CONFIGURATION_REQ (msg_p).pucch_delta_shift[j] = pucch_delta_shift-1;
...@@ -1768,7 +1757,6 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) { ...@@ -1768,7 +1757,6 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
break; break;
} }
#ifdef UE_EXPANSION
RRC_CONFIGURATION_REQ (msg_p).ue_multiple_max[j] = ue_multiple_max; RRC_CONFIGURATION_REQ (msg_p).ue_multiple_max[j] = ue_multiple_max;
switch (N_RB_DL) { switch (N_RB_DL) {
...@@ -1779,15 +1767,15 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) { ...@@ -1779,15 +1767,15 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
RC.config_file_name, i, ue_multiple_max); RC.config_file_name, i, ue_multiple_max);
break; break;
case 50: case 50:
if ((ue_multiple_max < 1) || (ue_multiple_max > 6)) if ((ue_multiple_max < 1) || (ue_multiple_max > 8))
AssertFatal (0, AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..6!\n", "Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..8!\n",
RC.config_file_name, i, ue_multiple_max); RC.config_file_name, i, ue_multiple_max);
break; break;
case 100: case 100:
if ((ue_multiple_max < 1) || (ue_multiple_max > 10)) if ((ue_multiple_max < 1) || (ue_multiple_max > 16))
AssertFatal (0, AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..10!\n", "Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..16!\n",
RC.config_file_name, i, ue_multiple_max); RC.config_file_name, i, ue_multiple_max);
break; break;
default: default:
...@@ -1796,7 +1784,6 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) { ...@@ -1796,7 +1784,6 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
RC.config_file_name, i, N_RB_DL); RC.config_file_name, i, N_RB_DL);
break; break;
} }
#endif
} }
} }
char srb1path[MAX_OPTNAME_SIZE*2 + 8]; char srb1path[MAX_OPTNAME_SIZE*2 + 8];
......
...@@ -1361,47 +1361,6 @@ typedef struct { ...@@ -1361,47 +1361,6 @@ typedef struct {
uint8_t n_adj_cells; uint8_t n_adj_cells;
} neigh_cell_id_t; } neigh_cell_id_t;
#ifdef UE_EXPANSION
enum SCH_UE_PRIORITY {
SCH_PRIORITY_NONE,
SCH_DL_SI,
SCH_DL_PAGING,
SCH_DL_MSG2,
SCH_DL_MSG4,
SCH_UL_PRACH,
SCH_UL_MSG3,
SCH_DL_RETRANS,
SCH_UL_RETRANS,
SCH_DL_FIRST,
SCH_UL_FIRST,
SCH_UL_INACTIVE
};
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
rnti_t rnti;
uint16_t nb_rb;
} DLSCH_UE_INFO;
typedef struct {
uint16_t ue_num;
DLSCH_UE_INFO list[20];
} DLSCH_UE_SELECT;
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
uint8_t start_rb;
uint8_t nb_rb;
uint16_t ul_total_buffer;
} ULSCH_UE_INFO;
typedef struct {
uint8_t ue_num;
ULSCH_UE_INFO list[20];
} ULSCH_UE_SELECT;
#endif
typedef struct { typedef struct {
volatile uint8_t flag; volatile uint8_t flag;
......
...@@ -59,6 +59,9 @@ ...@@ -59,6 +59,9 @@
#include "flexran_agent_mac_proto.h" #include "flexran_agent_mac_proto.h"
#endif #endif
/* for fair round robin SCHED */
#include "eNB_scheduler_fairRR.h"
#if defined(ENABLE_ITTI) #if defined(ENABLE_ITTI)
#include "intertask_interface.h" #include "intertask_interface.h"
#endif #endif
...@@ -806,16 +809,25 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP, ...@@ -806,16 +809,25 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
copy_ulreq(module_idP, frameP, subframeP); copy_ulreq(module_idP, frameP, subframeP);
// This schedules SRS in subframeP // This schedules SRS in subframeP
schedule_SRS(module_idP, frameP, subframeP); schedule_SRS(module_idP, frameP, subframeP);
#ifdef UE_EXPANSION
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch_fairRR(module_idP, frameP, subframeP);
#else
// This schedules ULSCH in subframeP (dci0) // This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP, frameP, subframeP); schedule_ulsch(module_idP, frameP, subframeP);
#endif
// This schedules UCI_SR in subframeP // This schedules UCI_SR in subframeP
schedule_SR(module_idP, frameP, subframeP); schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP // This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP); schedule_CSI(module_idP, frameP, subframeP);
#ifdef UE_EXPANSION
// This schedules DLSCH in subframeP
schedule_ue_spec_fairRR(module_idP, frameP, subframeP, mbsfn_status);
#else
// This schedules DLSCH in subframeP // This schedules DLSCH in subframeP
schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status); schedule_ue_spec(module_idP, frameP, subframeP, mbsfn_status);
#endif
// Allocate CCEs for good after scheduling is done // Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++){ for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++){
......
...@@ -64,7 +64,22 @@ ...@@ -64,7 +64,22 @@
#include "SIMULATION/TOOLS/defs.h" // for taus #include "SIMULATION/TOOLS/defs.h" // for taus
#include "T.h" #include "T.h"
#ifdef UE_EXPANSION
enum SCH_UE_PRIORITY {
SCH_PRIORITY_NONE,
SCH_DL_SI,
SCH_DL_PAGING,
SCH_DL_MSG2,
SCH_DL_MSG4,
SCH_UL_PRACH,
SCH_UL_MSG3,
SCH_DL_RETRANS,
SCH_UL_RETRANS,
SCH_DL_FIRST,
SCH_UL_FIRST,
SCH_UL_INACTIVE
};
#endif
extern uint8_t nfapi_mode; extern uint8_t nfapi_mode;
extern int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req); extern int oai_nfapi_hi_dci0_req(nfapi_hi_dci0_request_t *hi_dci0_req);
...@@ -582,11 +597,7 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -582,11 +597,7 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
cc[CC_idP].RAR_pdu.payload; cc[CC_idP].RAR_pdu.payload;
mac->TX_req[CC_idP].tx_request_body.number_of_pdus++; mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
#ifdef UE_EXPANSION #ifdef UE_EXPANSION
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = SCH_DL_MSG2; set_dl_ue_select(CC_idP, SCH_DL_MSG2, 4, -1, ra->rnti);
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = 4;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = -1;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = ra->rnti;
dlsch_ue_select[CC_idP].ue_num++;
#endif #endif
} }
} }
...@@ -720,11 +731,7 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -720,11 +731,7 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
cc[CC_idP].RAR_pdu.payload; cc[CC_idP].RAR_pdu.payload;
mac->TX_req[CC_idP].tx_request_body.number_of_pdus++; mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
#ifdef UE_EXPANSION #ifdef UE_EXPANSION
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = SCH_DL_MSG2; set_dl_ue_select(CC_idP, SCH_DL_MSG2, 4, -1, ra->rnti);
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = 4;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = -1;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = ra->rnti;
dlsch_ue_select[CC_idP].ue_num++;
#endif #endif
} // PDCCH CCE allocation is feasible } // PDCCH CCE allocation is feasible
} // Msg2 frame/subframe condition } // Msg2 frame/subframe condition
...@@ -1212,11 +1219,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -1212,11 +1219,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
rrc_sdu_length); rrc_sdu_length);
} }
#ifdef UE_EXPANSION #ifdef UE_EXPANSION
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = SCH_DL_MSG4; set_dl_ue_select(CC_idP, SCH_DL_MSG4, 4, UE_id, ra->rnti);
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = 4;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = UE_id;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = ra->rnti;
dlsch_ue_select[CC_idP].ue_num++;
#endif #endif
} // Msg4 frame/subframe } // Msg4 frame/subframe
} // msg4_mpdcch_repetition_count } // msg4_mpdcch_repetition_count
...@@ -1420,11 +1423,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP, ...@@ -1420,11 +1423,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
rrc_sdu_length); rrc_sdu_length);
} }
#ifdef UE_EXPANSION #ifdef UE_EXPANSION
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = SCH_DL_MSG4; set_dl_ue_select(CC_idP, SCH_DL_MSG4, 4, UE_id, ra->rnti);
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = 4;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = UE_id;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = ra->rnti;
dlsch_ue_select[CC_idP].ue_num++;
#endif #endif
} // CCE Allocation feasible } // CCE Allocation feasible
} // msg4 frame/subframe } // msg4 frame/subframe
...@@ -1570,11 +1569,7 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP, ...@@ -1570,11 +1569,7 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP,
1, // num_bf_prb_per_subband 1, // num_bf_prb_per_subband
1); // num_bf_vector 1); // num_bf_vector
#ifdef UE_EXPANSION #ifdef UE_EXPANSION
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].ue_priority = SCH_DL_MSG4; set_dl_ue_select(CC_idP, SCH_DL_MSG4, 4, UE_id, ra->rnti);
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].nb_rb = 4;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].UE_id = UE_id;
dlsch_ue_select[CC_idP].list[dlsch_ue_select[CC_idP].ue_num].rnti = ra->rnti;
dlsch_ue_select[CC_idP].ue_num++;
#endif #endif
} else } else
LOG_D(MAC, LOG_D(MAC,
......
...@@ -413,10 +413,6 @@ set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP, ...@@ -413,10 +413,6 @@ set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP,
} }
#ifdef PHY_TX_THREAD
extern volatile int16_t phy_tx_txdataF_end;
extern int oai_exit;
#endif
// changes to pre-processor for eMTC // changes to pre-processor for eMTC
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
...@@ -561,53 +557,6 @@ schedule_ue_spec(module_id_t module_idP, ...@@ -561,53 +557,6 @@ schedule_ue_spec(module_id_t module_idP,
if (mbsfn_flag[CC_id]>0) if (mbsfn_flag[CC_id]>0)
continue; continue;
#ifdef UE_EXPANSION
for (i = 0; i < dlsch_ue_select[CC_id].ue_num; i++) {
if(dlsch_ue_select[CC_id].list[i].ue_priority == SCH_DL_MSG2){
continue;
}
if(dlsch_ue_select[CC_id].list[i].ue_priority == SCH_DL_MSG4){
continue;
}
UE_id = dlsch_ue_select[CC_id].list[i].UE_id;
rnti = UE_RNTI(module_idP,UE_id);
if (rnti==NOT_A_RNTI) {
LOG_E(MAC,"Cannot find rnti for UE_id %d (num_UEs %d)\n",UE_id,UE_list->num_UEs);
continue;
}
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
switch(get_tmode(module_idP,CC_id,UE_id)){
case 1:
case 2:
case 7:
aggregation = get_aggregation(get_bw_index(module_idP,CC_id),
ue_sched_ctl->dl_cqi[CC_id],
format1);
break;
case 3:
aggregation = get_aggregation(get_bw_index(module_idP,CC_id),
ue_sched_ctl->dl_cqi[CC_id],
format2A);
break;
default:
LOG_W(MAC,"Unsupported transmission mode %d\n", get_tmode(module_idP,CC_id,UE_id));
aggregation = 2;
break;
}
if (cc[CC_id].tdd_Config != NULL) { //TDD
set_ue_dai (subframeP,
UE_id,
CC_id,
cc[CC_id].tdd_Config->subframeAssignment,
UE_list);
// update UL DAI after DLSCH scheduling
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP);
}
#else
for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) { for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
continue_flag=0; // reset the flag to allow allocation for the remaining UEs continue_flag=0; // reset the flag to allow allocation for the remaining UEs
...@@ -672,7 +621,6 @@ schedule_ue_spec(module_id_t module_idP, ...@@ -672,7 +621,6 @@ schedule_ue_spec(module_id_t module_idP,
CC_id, UE_id, subframeP, S_DL_NONE); CC_id, UE_id, subframeP, S_DL_NONE);
continue; continue;
} }
#endif
#warning RK->CR This old API call has to be revisited for FAPI, or logic must be changed #warning RK->CR This old API call has to be revisited for FAPI, or logic must be changed
#if 0 #if 0
/* add "fake" DCI to have CCE_allocation_infeasible work properly for next allocations */ /* add "fake" DCI to have CCE_allocation_infeasible work properly for next allocations */
...@@ -1112,11 +1060,7 @@ schedule_ue_spec(module_id_t module_idP, ...@@ -1112,11 +1060,7 @@ schedule_ue_spec(module_id_t module_idP,
header_len_dtch = 0; header_len_dtch = 0;
header_len_dtch_last = 0; // the header length of the last mac sdu header_len_dtch_last = 0; // the header length of the last mac sdu
// lcid has to be sorted before the actual allocation (similar struct as ue_list). // lcid has to be sorted before the actual allocation (similar struct as ue_list).
#if defined(UE_EXPANSION) || defined(UE_EXPANSION_SIM2)
for (lcid = DTCH; lcid >= DTCH; lcid--) {
#else
for (lcid = NB_RB_MAX - 1; lcid >= DTCH; lcid--) { for (lcid = NB_RB_MAX - 1; lcid >= DTCH; lcid--) {
#endif
// TBD: check if the lcid is active // TBD: check if the lcid is active
header_len_dtch += 3; header_len_dtch += 3;
...@@ -1207,15 +1151,12 @@ schedule_ue_spec(module_id_t module_idP, ...@@ -1207,15 +1151,12 @@ schedule_ue_spec(module_id_t module_idP,
} }
mcs = eNB_UE_stats->dlsch_mcs1; mcs = eNB_UE_stats->dlsch_mcs1;
#ifdef UE_EXPANSION
nb_rb = min_rb_unit[CC_id];
#else
if (mcs == 0) { if (mcs == 0) {
nb_rb = 4; // don't let the TBS get too small nb_rb = 4; // don't let the TBS get too small
} else { } else {
nb_rb = min_rb_unit[CC_id]; nb_rb = min_rb_unit[CC_id];
} }
#endif
TBS = get_TBS_DL(mcs, nb_rb); TBS = get_TBS_DL(mcs, nb_rb);
while (TBS < while (TBS <
...@@ -1320,16 +1261,6 @@ schedule_ue_spec(module_id_t module_idP, ...@@ -1320,16 +1261,6 @@ schedule_ue_spec(module_id_t module_idP,
post_padding = TBS - sdu_length_total - header_len_dcch - header_len_dtch - ta_len; // 1 is for the postpadding header post_padding = TBS - sdu_length_total - header_len_dcch - header_len_dtch - ta_len; // 1 is for the postpadding header
} }
#ifdef PHY_TX_THREAD
struct timespec time_req, time_rem;
time_req.tv_sec = 0;
time_req.tv_nsec = 10000;
while((!oai_exit)&&(phy_tx_txdataF_end == 0)){
nanosleep(&time_req,&time_rem);
continue;
}
#endif
offset = generate_dlsch_header((unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], num_sdus, //num_sdus offset = generate_dlsch_header((unsigned char *) UE_list->DLSCH_pdu[CC_id][0][UE_id].payload[0], num_sdus, //num_sdus
sdu_lengths, // sdu_lengths, //
sdu_lcids, 255, // no drx sdu_lcids, 255, // no drx
...@@ -1531,9 +1462,6 @@ schedule_ue_spec(module_id_t module_idP, ...@@ -1531,9 +1462,6 @@ schedule_ue_spec(module_id_t module_idP,
eNB->pdu_index[CC_id]++; eNB->pdu_index[CC_id]++;
program_dlsch_acknak(module_idP,CC_id,UE_id,frameP,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx); program_dlsch_acknak(module_idP,CC_id,UE_id,frameP,subframeP,dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.cce_idx);
#ifdef UE_EXPANSION
last_dlsch_ue_id[CC_id] = UE_id;
#endif
} }
else { else {
LOG_W(MAC,"Frame %d, Subframe %d: Dropping DLSCH allocation for UE %d/%x, infeasible CCE allocations\n", LOG_W(MAC,"Frame %d, Subframe %d: Dropping DLSCH allocation for UE %d/%x, infeasible CCE allocations\n",
...@@ -1586,9 +1514,6 @@ fill_DLSCH_dci( ...@@ -1586,9 +1514,6 @@ fill_DLSCH_dci(
int N_RBG; int N_RBG;
int N_RB_DL; int N_RB_DL;
COMMON_channels_t *cc; COMMON_channels_t *cc;
#ifdef UE_EXPANSION
int j;
#endif
start_meas(&eNB->fill_DLSCH_dci); start_meas(&eNB->fill_DLSCH_dci);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI,VCD_FUNCTION_IN); VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI,VCD_FUNCTION_IN);
...@@ -1603,18 +1528,7 @@ fill_DLSCH_dci( ...@@ -1603,18 +1528,7 @@ fill_DLSCH_dci(
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth); N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
// UE specific DCIs // UE specific DCIs
#ifdef UE_EXPANSION
for (j = 0; j < dlsch_ue_select[CC_id].ue_num; j++) {
if(dlsch_ue_select[CC_id].list[j].ue_priority == SCH_DL_MSG2){
continue;
}
if(dlsch_ue_select[CC_id].list[j].ue_priority == SCH_DL_MSG4){
continue;
}
UE_id = dlsch_ue_select[CC_id].list[j].UE_id;
#else
for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) { for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
#endif
LOG_T(MAC,"CC_id %d, UE_id: %d => status %d\n",CC_id,UE_id,eNB_dlsch_info[module_idP][CC_id][UE_id].status); LOG_T(MAC,"CC_id %d, UE_id: %d => status %d\n",CC_id,UE_id,eNB_dlsch_info[module_idP][CC_id][UE_id].status);
if (eNB_dlsch_info[module_idP][CC_id][UE_id].status == S_DL_SCHEDULED) { if (eNB_dlsch_info[module_idP][CC_id][UE_id].status == S_DL_SCHEDULED) {
......
This source diff could not be displayed because it is too large. You can view the blob instead.
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file eNB_scheduler_fairRR.h
* \brief eNB scheduler fair round robin header
* \author Masayuki Harada
* \date 2018
* \email masayuki.harada@jp.fujitsu.com
* \version 1.0
* @ingroup _mac
*/
#ifndef __LAYER2_MAC_ENB_SCHEDULER_FAIRRR_H__
#define __LAYER2_MAC_ENB_SCHEDULER_FAIRRR_H__
/* define */
enum SCH_UE_PRIORITY {
SCH_PRIORITY_NONE,
SCH_DL_SI,
SCH_DL_PAGING,
SCH_DL_MSG2,
SCH_DL_MSG4,
SCH_UL_PRACH,
SCH_UL_MSG3,
SCH_DL_RETRANS,
SCH_UL_RETRANS,
SCH_DL_FIRST,
SCH_UL_FIRST,
SCH_UL_INACTIVE
};
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
rnti_t rnti;
uint16_t nb_rb;
} DLSCH_UE_INFO;
typedef struct {
uint16_t ue_num;
DLSCH_UE_INFO list[20];
} DLSCH_UE_SELECT;
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
uint8_t start_rb;
uint8_t nb_rb;
uint16_t ul_total_buffer;
} ULSCH_UE_INFO;
typedef struct {
uint8_t ue_num;
ULSCH_UE_INFO list[20];
} ULSCH_UE_SELECT;
/* proto */
void set_dl_ue_select(int CC_idP, enum SCH_UE_PRIORITY ue_priority,uint16_t nb_rb, int UE_id, rnti_t rnti);
void dlsch_scheduler_pre_ue_select_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int* mbsfn_flag,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs]);
void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
frame_t frameP,
sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag);
void fill_DLSCH_dci_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int* mbsfn_flagP);
void schedule_ue_spec_fairRR(module_id_t module_idP,
frame_t frameP, sub_frame_t subframeP, int *mbsfn_flag);
void ulsch_scheduler_pre_ue_select_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
sub_frame_t subframeP);
void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
/* extern */
extern DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs];
extern int last_dlsch_ue_id[MAX_NUM_CCs];
extern int last_ulsch_ue_id[MAX_NUM_CCs];
#endif
This diff is collapsed.
...@@ -97,12 +97,6 @@ extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu1; ...@@ -97,12 +97,6 @@ extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu1;
extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2; extern DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
extern DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E; extern DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#ifdef UE_EXPANSION
extern DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs];
extern int last_dlsch_ue_id[MAX_NUM_CCs];
extern int last_ulsch_ue_id[MAX_NUM_CCs];
#endif
#if defined(PRE_SCD_THREAD) #if defined(PRE_SCD_THREAD)
extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX]; extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
extern uint8_t dlsch_ue_select_tbl_in_use; extern uint8_t dlsch_ue_select_tbl_in_use;
...@@ -110,5 +104,6 @@ extern uint8_t new_dlsch_ue_select_tbl_in_use; ...@@ -110,5 +104,6 @@ extern uint8_t new_dlsch_ue_select_tbl_in_use;
extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX]; extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX];
extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX]; extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif #endif
extern mac_rlc_am_muilist_t rlc_am_mui; extern mac_rlc_am_muilist_t rlc_am_mui;
#endif //DEF_H #endif //DEF_H
This diff is collapsed.
...@@ -106,11 +106,7 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP, ...@@ -106,11 +106,7 @@ void schedule_ulsch(module_id_t module_idP, frame_t frameP,
@param subframe Subframe number on which to act @param subframe Subframe number on which to act
@param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup) @param sched_subframe Subframe number where PUSCH is transmitted (for DAI lookup)
*/ */
#ifndef UE_EXPANSION
void schedule_ulsch_rnti(module_id_t module_idP, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, uint16_t *first_rb); void schedule_ulsch_rnti(module_id_t module_idP, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, uint16_t *first_rb);
#else
void schedule_ulsch_rnti(module_id_t module_idP, frame_t frameP, sub_frame_t subframe, unsigned char sched_subframe, ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
#endif
/** \brief Second stage of DLSCH scheduling, after schedule_SI, schedule_RA and schedule_dlsch have been called. This routine first allocates random frequency assignments for SI and RA SDUs using distributed VRB allocations and adds the corresponding DCI SDU to the DCI buffer for PHY. It then loops over the UE specific DCIs previously allocated and fills in the remaining DCI fields related to frequency allocation. It assumes localized allocation of type 0 (DCI.rah=0). The allocation is done for tranmission modes 1,2,4. /** \brief Second stage of DLSCH scheduling, after schedule_SI, schedule_RA and schedule_dlsch have been called. This routine first allocates random frequency assignments for SI and RA SDUs using distributed VRB allocations and adds the corresponding DCI SDU to the DCI buffer for PHY. It then loops over the UE specific DCIs previously allocated and fills in the remaining DCI fields related to frequency allocation. It assumes localized allocation of type 0 (DCI.rah=0). The allocation is done for tranmission modes 1,2,4.
@param Mod_id Instance of eNB @param Mod_id Instance of eNB
...@@ -227,13 +223,6 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id, ...@@ -227,13 +223,6 @@ void dlsch_scheduler_pre_processor_allocate (module_id_t Mod_id,
unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX], unsigned char rballoc_sub[MAX_NUM_CCs][N_RBG_MAX],
unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]); unsigned char MIMO_mode_indicator[MAX_NUM_CCs][N_RBG_MAX]);
#if defined(PRE_SCD_THREAD)
void pre_scd_nb_rbs_required(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int min_rb_unit[MAX_NUM_CCs],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX]);
#endif
/* \brief Function to trigger the eNB scheduling procedure. It is called by PHY at the beginning of each subframe, \f$n$\f /* \brief Function to trigger the eNB scheduling procedure. It is called by PHY at the beginning of each subframe, \f$n$\f
and generates all DLSCH allocations for subframe \f$n\f$ and ULSCH allocations for subframe \f$n+k$\f. and generates all DLSCH allocations for subframe \f$n\f$ and ULSCH allocations for subframe \f$n+k$\f.
@param Mod_id Instance ID of eNB @param Mod_id Instance ID of eNB
...@@ -642,12 +631,8 @@ int UE_PCCID(module_id_t mod_idP, int ue_idP); ...@@ -642,12 +631,8 @@ int UE_PCCID(module_id_t mod_idP, int ue_idP);
rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP); rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
uint8_t find_rb_table_index(uint8_t average_rbs); uint8_t find_rb_table_index(uint8_t average_rbs);
#ifndef UE_EXPANSION
void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, unsigned char sched_subframeP,uint16_t *first_rb); void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, unsigned char sched_subframeP,uint16_t *first_rb);
#else
void ulsch_scheduler_pre_processor(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, sub_frame_t sched_subframeP,ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void ulsch_scheduler_pre_ue_select(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP,sub_frame_t sched_subframeP,ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
#endif
void void
set_ul_DAI( set_ul_DAI(
int module_idP, int module_idP,
...@@ -1174,6 +1159,13 @@ uint32_t from_earfcn(int eutra_bandP, uint32_t dl_earfcn); ...@@ -1174,6 +1159,13 @@ uint32_t from_earfcn(int eutra_bandP, uint32_t dl_earfcn);
int32_t get_uldl_offset(int eutra_bandP); int32_t get_uldl_offset(int eutra_bandP);
int l2_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active, int l2_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
uint8_t HO_active); uint8_t HO_active);
#if defined(PRE_SCD_THREAD)
void pre_scd_nb_rbs_required( module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int min_rb_unit[MAX_NUM_CCs],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX]);
#endif
#endif #endif
/** @}*/ /** @}*/
...@@ -142,18 +142,5 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2; ...@@ -142,18 +142,5 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E; DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
#ifdef UE_EXPANSION
DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs];
int last_dlsch_ue_id[MAX_NUM_CCs] = {-1};
int last_ulsch_ue_id[MAX_NUM_CCs] = {-1};
#endif
#if defined(PRE_SCD_THREAD)
uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
uint8_t dlsch_ue_select_tbl_in_use;
uint8_t new_dlsch_ue_select_tbl_in_use;
boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX];
eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif
mac_rlc_am_muilist_t rlc_am_mui; mac_rlc_am_muilist_t rlc_am_mui;
#endif #endif
...@@ -793,14 +793,6 @@ rrc_eNB_free_UE(const module_id_t enb_mod_idP,const struct rrc_eNB_ue_context_s* ...@@ -793,14 +793,6 @@ rrc_eNB_free_UE(const module_id_t enb_mod_idP,const struct rrc_eNB_ue_context_s*
(void)ue_module_id; (void)ue_module_id;
#endif #endif
rnti_t rnti = ue_context_pP->ue_context.rnti; rnti_t rnti = ue_context_pP->ue_context.rnti;
#ifndef UE_EXPANSION
int i, j , CC_id, pdu_number;
LTE_eNB_ULSCH_t *ulsch = NULL;
LTE_eNB_DLSCH_t *dlsch = NULL;
nfapi_ul_config_request_body_t *ul_req_tmp = NULL;
PHY_VARS_eNB *eNB_PHY = NULL;
eNB_MAC_INST *eNB_MAC = RC.mac[enb_mod_idP];
#endif
if (enb_mod_idP >= NB_eNB_INST) { if (enb_mod_idP >= NB_eNB_INST) {
LOG_I(RRC, "eNB inst invalid (%d/%d) for UE %x!\n",enb_mod_idP, NB_eNB_INST,rnti); LOG_I(RRC, "eNB inst invalid (%d/%d) for UE %x!\n",enb_mod_idP, NB_eNB_INST,rnti);
return; return;
...@@ -828,66 +820,9 @@ rrc_eNB_free_UE(const module_id_t enb_mod_idP,const struct rrc_eNB_ue_context_s* ...@@ -828,66 +820,9 @@ rrc_eNB_free_UE(const module_id_t enb_mod_idP,const struct rrc_eNB_ue_context_s*
return; return;
} }
#endif #endif
#ifndef UE_EXPANSION
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
eNB_PHY = RC.eNB[enb_mod_idP][CC_id];
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
ulsch = eNB_PHY->ulsch[i];
if((ulsch != NULL) && (ulsch->rnti == rnti)){
LOG_I(RRC, "clean_eNb_ulsch UE %x \n", rnti);
//clean_eNb_ulsch(ulsch);
ulsch->rnti = 0;
}
dlsch = eNB_PHY->dlsch[i][0];
if((dlsch != NULL) && (dlsch->rnti == rnti)){
LOG_I(RRC, "clean_eNb_dlsch UE %x \n", rnti);
clean_eNb_dlsch(dlsch);
}
if(eNB_PHY->uci_vars[i].rnti == rnti){
LOG_I(MAC, "clean eNb uci_vars[%d] UE %x \n",i, rnti);
memset(&eNB_PHY->uci_vars[i],0,sizeof(LTE_eNB_UCI));
}
}
ulsch = eNB_PHY->ulsch[i];
if((ulsch != NULL) && (ulsch->rnti == rnti)){
LOG_I(RRC, "clean_eNb_ulsch UE %x \n", rnti);
//clean_eNb_ulsch(ulsch);
ulsch->rnti = 0;
}
for(j = 0; j < 10; j++){
ul_req_tmp = &eNB_MAC->UL_req_tmp[CC_id][j].ul_config_request_body;
if(ul_req_tmp){
pdu_number = ul_req_tmp->number_of_pdus;
for(int pdu_index = pdu_number-1; pdu_index >= 0; pdu_index--){
if((ul_req_tmp->ul_config_pdu_list[pdu_index].ulsch_pdu.ulsch_pdu_rel8.rnti == rnti) ||
(ul_req_tmp->ul_config_pdu_list[pdu_index].uci_harq_pdu.ue_information.ue_information_rel8.rnti == rnti) ||
(ul_req_tmp->ul_config_pdu_list[pdu_index].uci_cqi_pdu.ue_information.ue_information_rel8.rnti == rnti) ||
(ul_req_tmp->ul_config_pdu_list[pdu_index].uci_sr_pdu.ue_information.ue_information_rel8.rnti == rnti) ||
(ul_req_tmp->ul_config_pdu_list[pdu_index].srs_pdu.srs_pdu_rel8.rnti == rnti)){
LOG_I(RRC, "remove UE %x from ul_config_pdu_list %d/%d\n", rnti, pdu_index, pdu_number);
if(pdu_index < pdu_number -1){
memcpy(&ul_req_tmp->ul_config_pdu_list[pdu_index], &ul_req_tmp->ul_config_pdu_list[pdu_index+1], (pdu_number-1-pdu_index) * sizeof(nfapi_ul_config_request_pdu_t));
}
ul_req_tmp->number_of_pdus--;
}
}
}
}
}
rrc_mac_remove_ue(enb_mod_idP,rnti);
rrc_rlc_remove_ue(&ctxt);
pdcp_remove_UE(&ctxt);
rrc_eNB_remove_ue_context(
&ctxt,
RC.rrc[enb_mod_idP],
(struct rrc_eNB_ue_context_s*) ue_context_pP);
#else
// add UE info to freeList // add UE info to freeList
LOG_I(RRC, "put UE %x into freeList\n", rnti); LOG_I(RRC, "put UE %x into freeList\n", rnti);
put_UE_in_freelist(enb_mod_idP, rnti, 1); put_UE_in_freelist(enb_mod_idP, rnti, 1);
#endif
} }
} }
......
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