Commit 9ad810ba authored by masayuki.harada's avatar masayuki.harada Committed by shono.takafumi

Fix ul_cqi and tpc filtering.

(cherry picked from commit 120ea0950e1f52c1c5dd1d0dd4f7080e66d7ee93)
parent fbd0156a
...@@ -815,6 +815,7 @@ typedef struct { ...@@ -815,6 +815,7 @@ typedef struct {
uint16_t pre_nb_available_rbs[MAX_NUM_CCs]; uint16_t pre_nb_available_rbs[MAX_NUM_CCs];
unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX]; unsigned char rballoc_sub_UE[MAX_NUM_CCs][N_RBG_MAX];
uint16_t ta_timer; uint16_t ta_timer;
double ta_update_f;
int16_t ta_update; int16_t ta_update;
uint16_t ul_consecutive_errors; uint16_t ul_consecutive_errors;
int32_t context_active_timer; int32_t context_active_timer;
...@@ -834,6 +835,7 @@ typedef struct { ...@@ -834,6 +835,7 @@ typedef struct {
uint8_t pucch2_snr[NFAPI_CC_MAX]; uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX]; uint8_t pucch3_snr[NFAPI_CC_MAX];
double pusch_cqi_f[NFAPI_CC_MAX];
uint8_t pusch_cqi[NFAPI_CC_MAX]; uint8_t pusch_cqi[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX];
uint8_t pusch_snr_avg[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX];
......
...@@ -821,6 +821,7 @@ schedule_ue_spec(module_id_t module_idP, ...@@ -821,6 +821,7 @@ schedule_ue_spec(module_id_t module_idP,
/* reset ta_update */ /* reset ta_update */
ue_sched_ctrl->ta_update = 31; ue_sched_ctrl->ta_update = 31;
ue_sched_ctrl->ta_update_f = 31.0;
} }
int ta_len = (ta_update != 31) ? 2 : 0; int ta_len = (ta_update != 31) ? 2 : 0;
...@@ -1366,6 +1367,7 @@ schedule_ue_spec_br(module_id_t module_idP, ...@@ -1366,6 +1367,7 @@ schedule_ue_spec_br(module_id_t module_idP,
/* Reset ta_update */ /* Reset ta_update */
ue_sched_ctl->ta_update = 31; ue_sched_ctl->ta_update = 31;
ue_sched_ctl->ta_update_f = 31.0;
} else { } else {
ta_update = 31; ta_update = 31;
} }
......
...@@ -1567,6 +1567,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP, ...@@ -1567,6 +1567,7 @@ schedule_ue_spec_fairRR(module_id_t module_idP,
/* reset ta_update */ /* reset ta_update */
ue_sched_ctl->ta_update = 31; ue_sched_ctl->ta_update = 31;
ue_sched_ctl->ta_update_f = 31.0;
} else { } else {
ta_update = 31; ta_update = 31;
} }
......
...@@ -2215,10 +2215,12 @@ add_new_ue(module_id_t mod_idP, ...@@ -2215,10 +2215,12 @@ add_new_ue(module_id_t mod_idP,
0, 0,
sizeof(eNB_UE_STATS)); sizeof(eNB_UE_STATS));
UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0; UE_info->UE_sched_ctrl[UE_id].ue_reestablishment_reject_timer = 0;
UE_info->UE_sched_ctrl[UE_id].ta_update_f = 31.0;
UE_info->UE_sched_ctrl[UE_id].ta_update = 31; UE_info->UE_sched_ctrl[UE_id].ta_update = 31;
UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_snr[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (RC.mac[mod_idP]->puSch10xSnr+640)/5; UE_info->UE_sched_ctrl[UE_id].pusch_cqi_f[cc_idP] = (eNB->puSch10xSnr+640)/5;
UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = RC.mac[mod_idP]->puSch10xSnr/10; UE_info->UE_sched_ctrl[UE_id].pusch_cqi[cc_idP] = (eNB->puSch10xSnr+640)/5;
UE_info->UE_sched_ctrl[UE_id].pusch_snr_avg[cc_idP] = eNB->puSch10xSnr/10;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_num_old[cc_idP] = 0;
UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0; UE_info->UE_sched_ctrl[UE_id].pusch_rx_error_num[cc_idP] = 0;
......
...@@ -167,7 +167,8 @@ rx_sdu(const module_id_t enb_mod_idP, ...@@ -167,7 +167,8 @@ rx_sdu(const module_id_t enb_mod_idP,
* lte_est_timing_advance_pusch, maybe it's not necessary? * lte_est_timing_advance_pusch, maybe it's not necessary?
* maybe it's even not correct at all? * maybe it's even not correct at all?
*/ */
UE_scheduling_control->ta_update = (UE_scheduling_control->ta_update * 3 + timing_advance) / 4; UE_scheduling_control->ta_update_f = ((double)UE_scheduling_control->ta_update_f * 3 + (double)timing_advance) / 4;
UE_scheduling_control->ta_update = (int)UE_scheduling_control->ta_update_f;
UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10; UE_scheduling_control->pusch_snr[CC_idP] = (5 * ul_cqi - 640) / 10;
if(UE_scheduling_control->pusch_snr[CC_idP] > 0 || UE_scheduling_control->pusch_snr[CC_idP] < 63) { if(UE_scheduling_control->pusch_snr[CC_idP] > 0 || UE_scheduling_control->pusch_snr[CC_idP] < 63) {
...@@ -175,7 +176,8 @@ rx_sdu(const module_id_t enb_mod_idP, ...@@ -175,7 +176,8 @@ rx_sdu(const module_id_t enb_mod_idP,
int snr_thres_tpc=30; int snr_thres_tpc=30;
int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP]; int diff = UE_scheduling_control->pusch_snr_avg[CC_idP] - UE_scheduling_control->pusch_snr[CC_idP];
if(abs(diff) < snr_thres_tpc) { if(abs(diff) < snr_thres_tpc) {
UE_scheduling_control->pusch_cqi[CC_idP] = (int)((double)UE_scheduling_control->pusch_cqi[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc)); UE_scheduling_control->pusch_cqi_f[CC_idP] = ((double)UE_scheduling_control->pusch_cqi_f[CC_idP] * snr_filter_tpc + (double)ul_cqi * (1-snr_filter_tpc));
UE_scheduling_control->pusch_cqi[CC_idP] = (int)UE_scheduling_control->pusch_cqi_f[CC_idP];
UE_scheduling_control->pusch_snr_avg[CC_idP] = (5 * UE_scheduling_control->pusch_cqi[CC_idP] - 640) / 10; UE_scheduling_control->pusch_snr_avg[CC_idP] = (5 * UE_scheduling_control->pusch_cqi[CC_idP] - 640) / 10;
} }
} }
......
...@@ -942,6 +942,7 @@ typedef struct { ...@@ -942,6 +942,7 @@ typedef struct {
unsigned char rballoc_sub_UE[NFAPI_CC_MAX][N_RBG_MAX]; unsigned char rballoc_sub_UE[NFAPI_CC_MAX][N_RBG_MAX];
int pre_dci_dl_pdu_idx; int pre_dci_dl_pdu_idx;
uint16_t ta_timer; uint16_t ta_timer;
double ta_update_f;
int16_t ta_update; int16_t ta_update;
uint16_t ul_consecutive_errors; uint16_t ul_consecutive_errors;
int32_t context_active_timer; int32_t context_active_timer;
...@@ -965,6 +966,7 @@ typedef struct { ...@@ -965,6 +966,7 @@ typedef struct {
uint8_t pucch2_snr[NFAPI_CC_MAX]; uint8_t pucch2_snr[NFAPI_CC_MAX];
uint8_t pucch3_cqi_update[NFAPI_CC_MAX]; uint8_t pucch3_cqi_update[NFAPI_CC_MAX];
uint8_t pucch3_snr[NFAPI_CC_MAX]; uint8_t pucch3_snr[NFAPI_CC_MAX];
double pusch_cqi_f[NFAPI_CC_MAX];
uint8_t pusch_cqi[NFAPI_CC_MAX]; uint8_t pusch_cqi[NFAPI_CC_MAX];
uint8_t pusch_snr[NFAPI_CC_MAX]; uint8_t pusch_snr[NFAPI_CC_MAX];
uint8_t pusch_snr_avg[NFAPI_CC_MAX]; uint8_t pusch_snr_avg[NFAPI_CC_MAX];
......
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