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OpenXG
OpenXG-RAN
Commits
af173505
Commit
af173505
authored
Apr 29, 2021
by
hardy
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Merge remote-tracking branch 'origin/NR_UE_CONFIG_REQ_FIXES' into integration_2021_wk17_b
parents
44672c4c
33101b27
Changes
3
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3 changed files
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93 additions
and
71 deletions
+93
-71
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+0
-6
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+18
-10
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+75
-55
No files found.
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
View file @
af173505
...
...
@@ -1058,12 +1058,6 @@ typedef struct {
fapi_nr_tdd_table_t
tdd_table
;
fapi_nr_prach_config_t
prach_config
;
fapi_nr_dl_bwp_common_config_t
dl_bwp_common
;
fapi_nr_dl_bwp_dedicated_config_t
dl_bwp_dedicated
;
fapi_nr_ul_bwp_common_config_t
ul_bwp_common
;
fapi_nr_ul_bwp_dedicated_config_t
ul_bwp_dedicated
;
}
fapi_nr_config_request_t
;
#endif
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @
af173505
...
...
@@ -817,7 +817,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
1
;
/* VRB_TO_PRB_MAPPING */
if
(
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
resource_allocation
!=
0
)
if
(
(
pdsch_config
->
resourceAllocation
==
1
)
&&
(
pdsch_config
->
vrb_ToPRB_Interleaver
!=
NULL
)
)
dlsch_config_pdu_1_1
->
vrb_to_prb_mapping
=
(
dci
->
vrb_to_prb_mapping
.
val
==
0
)
?
vrb_to_prb_mapping_non_interleaved
:
vrb_to_prb_mapping_interleaved
;
/* PRB_BUNDLING_SIZE_IND */
dlsch_config_pdu_1_1
->
prb_bundling_size_ind
=
dci
->
prb_bundling_size_indicator
.
val
;
...
...
@@ -876,11 +876,22 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* PDSCH_TO_HARQ_FEEDBACK_TIME_IND */
// according to TS 38.213 Table 9.2.3-1
NR_BWP_Id_t
ul_bwp_id
=
mac
->
UL_BWP_Id
;
dlsch_config_pdu_1_1
->
pdsch_to_harq_feedback_time_ind
=
mac
->
ULbwp
[
ul_bwp_id
-
1
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
dl_DataToUL_ACK
->
list
.
array
[
dci
->
pdsch_to_harq_feedback_timing_indicator
.
val
][
0
];
dlsch_config_pdu_1_1
->
pdsch_to_harq_feedback_time_ind
=
mac
->
ULbwp
[
ul_bwp_id
-
1
]
->
bwp_Dedicated
->
pucch_Config
->
choice
.
setup
->
dl_DataToUL_ACK
->
list
.
array
[
dci
->
pdsch_to_harq_feedback_timing_indicator
.
val
][
0
];
/* ANTENNA_PORTS */
uint8_t
n_codewords
=
1
;
// FIXME!!!
if
((
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
dmrs_type
==
1
)
&&
(
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
max_length
==
1
)){
long
*
max_length
=
NULL
;
long
*
dmrs_type
=
NULL
;
if
(
pdsch_config
->
dmrs_DownlinkForPDSCH_MappingTypeA
)
{
max_length
=
pdsch_config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
maxLength
;
dmrs_type
=
pdsch_config
->
dmrs_DownlinkForPDSCH_MappingTypeA
->
choice
.
setup
->
dmrs_Type
;
}
if
(
pdsch_config
->
dmrs_DownlinkForPDSCH_MappingTypeB
)
{
max_length
=
pdsch_config
->
dmrs_DownlinkForPDSCH_MappingTypeB
->
choice
.
setup
->
maxLength
;
dmrs_type
=
pdsch_config
->
dmrs_DownlinkForPDSCH_MappingTypeB
->
choice
.
setup
->
dmrs_Type
;
}
if
((
dmrs_type
==
NULL
)
&&
(
max_length
==
NULL
)){
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
0
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
0
]
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
1
];
...
...
@@ -888,8 +899,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1
->
dmrs_ports
[
2
]
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
3
];
dlsch_config_pdu_1_1
->
dmrs_ports
[
3
]
=
table_7_3_2_3_3_1
[
dci
->
antenna_ports
.
val
][
4
];
}
if
((
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
dmrs_type
==
1
)
&&
(
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
max_length
==
2
)){
if
((
dmrs_type
==
NULL
)
&&
(
max_length
!=
NULL
)){
// Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_2_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
...
...
@@ -912,8 +922,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1
->
n_front_load_symb
=
table_7_3_2_3_3_2_twoCodeword
[
dci
->
antenna_ports
.
val
][
9
];
}
}
if
((
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
dmrs_type
==
2
)
&&
(
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
max_length
==
1
)){
if
((
dmrs_type
!=
NULL
)
&&
(
max_length
==
NULL
)){
// Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_3_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
...
...
@@ -932,8 +941,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1
->
dmrs_ports
[
5
]
=
table_7_3_2_3_3_3_twoCodeword
[
dci
->
antenna_ports
.
val
][
6
];
}
}
if
((
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
dmrs_type
==
2
)
&&
(
mac
->
phy_config
.
config_req
.
dl_bwp_dedicated
.
pdsch_config_dedicated
.
dmrs_dl_for_pdsch_mapping_type_a
.
max_length
==
2
)){
if
((
dmrs_type
!=
NULL
)
&&
(
max_length
!=
NULL
)){
// Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2
if
(
n_codewords
==
1
)
{
dlsch_config_pdu_1_1
->
n_dmrs_cdm_groups
=
table_7_3_2_3_3_4_oneCodeword
[
dci
->
antenna_ports
.
val
][
0
];
...
...
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @
af173505
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