Commit b005f959 authored by Robert Schmidt's avatar Robert Schmidt

Statically allocate PUCCH F0 resource index 0 for AckNack

parent c2d16eb8
...@@ -372,14 +372,6 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP, ...@@ -372,14 +372,6 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL, AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL,
"could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL\n"); "could not allocate memory for RC.nrmac[]->common_channels[0].vrb_map_UL\n");
for (int i = 0; i < MAX_NUM_BWP; ++i) {
RC.nrmac[Mod_idP]->pucch_index_used[i] =
calloc(n, sizeof(*RC.nrmac[Mod_idP]->pucch_index_used));
AssertFatal(RC.nrmac[Mod_idP]->pucch_index_used[i],
"could not allocate memory for RC.nrmac[]->pucch_index_used[%d]\n",
i);
}
LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n"); LOG_I(MAC,"Configuring common parameters from NR ServingCellConfig\n");
config_common(Mod_idP, config_common(Mod_idP,
......
...@@ -1109,10 +1109,7 @@ bool nr_acknack_scheduling(int mod_id, ...@@ -1109,10 +1109,7 @@ bool nr_acknack_scheduling(int mod_id,
* * we do not multiplex with CSI, which is always in pucch_sched[2] * * we do not multiplex with CSI, which is always in pucch_sched[2]
* * SR uses format 0 and is allocated in the first UL (mixed) slot (and not * * SR uses format 0 and is allocated in the first UL (mixed) slot (and not
* later) * later)
* * that the PUCCH resource set 0 (for up to 2 bits) points to the first N * * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */
* PUCCH resources, where N is the number of resources in the PUCCH
* resource set. This is used in pucch_index_used, which counts the used
* resources by index, and not by their ID! */
NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id]; NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id];
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0]; NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
AssertFatal(pucch->csi_bits == 0, AssertFatal(pucch->csi_bits == 0,
...@@ -1198,12 +1195,6 @@ bool nr_acknack_scheduling(int mod_id, ...@@ -1198,12 +1195,6 @@ bool nr_acknack_scheduling(int mod_id,
/* we need to find a new PUCCH occasion */ /* we need to find a new PUCCH occasion */
NR_PUCCH_Config_t *pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
DevAssert(pucch_Config->resourceToAddModList->list.count > 0);
DevAssert(pucch_Config->resourceSetToAddModList->list.count > 0);
const int n_res = pucch_Config->resourceSetToAddModList->list.array[0]->resourceList.list.count;
int *pucch_index_used = RC.nrmac[mod_id]->pucch_index_used[sched_ctrl->active_ubwp->bwp_Id];
/* if time information is outdated (e.g., last PUCCH occasion in last frame), /* if time information is outdated (e.g., last PUCCH occasion in last frame),
* set to first possible UL occasion in this frame. Note that if such UE is * set to first possible UL occasion in this frame. Note that if such UE is
* scheduled a lot and used all AckNacks, pucch->frame might have been * scheduled a lot and used all AckNacks, pucch->frame might have been
...@@ -1217,22 +1208,6 @@ bool nr_acknack_scheduling(int mod_id, ...@@ -1217,22 +1208,6 @@ bool nr_acknack_scheduling(int mod_id,
pucch->ul_slot = first_ul_slot_tdd; pucch->ul_slot = first_ul_slot_tdd;
} }
// increase to first slot in which PUCCH resources are available
while (pucch_index_used[pucch->ul_slot] >= n_res) {
pucch->ul_slot++;
/* if there is no free resource anymore, abort search */
if ((pucch->frame == frame
&& pucch->ul_slot >= first_ul_slot_tdd + nr_ulmix_slots)
|| (pucch->frame == frame + 1)) {
LOG_E(MAC,
"%4d.%2d no free PUCCH resources anymore while searching for UE %d\n",
frame,
slot,
UE_id);
return false;
}
}
// advance ul_slot if it is not reachable by UE // advance ul_slot if it is not reachable by UE
pucch->ul_slot = max(pucch->ul_slot, slot + pdsch_to_harq_feedback[0]); pucch->ul_slot = max(pucch->ul_slot, slot + pdsch_to_harq_feedback[0]);
...@@ -1279,22 +1254,13 @@ bool nr_acknack_scheduling(int mod_id, ...@@ -1279,22 +1254,13 @@ bool nr_acknack_scheduling(int mod_id,
pucch->timing_indicator = i; // index in the list of timing indicators pucch->timing_indicator = i; // index in the list of timing indicators
pucch->dai_c++; pucch->dai_c++;
const int pucch_res = pucch_index_used[pucch->ul_slot]; pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources
pucch->resource_indicator = pucch_res;
pucch_index_used[pucch->ul_slot] += 1;
AssertFatal(pucch_index_used[pucch->ul_slot] <= n_res,
"UE %d in %4d.%2d: pucch_index_used is %d (%d available)\n",
UE_id,
pucch->frame,
pucch->ul_slot,
pucch_index_used[pucch->ul_slot],
n_res);
/* verify that at that slot and symbol, resources are free. We only do this /* verify that at that slot and symbol, resources are free. We only do this
* for initialCyclicShift 0 (we assume it always has that one), so other * for initialCyclicShift 0 (we assume it always has that one), so other
* initialCyclicShifts can overlap with ICS 0!*/ * initialCyclicShifts can overlap with ICS 0!*/
const NR_PUCCH_Resource_t *resource = const NR_PUCCH_Config_t *pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
pucch_Config->resourceToAddModList->list.array[pucch_res]; const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[pucch->resource_indicator];
DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0); DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
if (resource->format.choice.format0->initialCyclicShift == 0) { if (resource->format.choice.format0->initialCyclicShift == 0) {
uint16_t *vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE]; uint16_t *vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
......
...@@ -705,10 +705,6 @@ typedef struct gNB_MAC_INST_s { ...@@ -705,10 +705,6 @@ typedef struct gNB_MAC_INST_s {
int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE]; int cce_list[MAX_NUM_BWP][MAX_NUM_CORESET][MAX_NUM_CCE];
/// list of allocated beams per period /// list of allocated beams per period
int16_t *tdd_beam_association; int16_t *tdd_beam_association;
/// PUCCH: keep track of the resources has already been used by saving the
/// highest index not yet been used in a given slot. Dynamically allocated
/// so we can have it for every slot as a function of the numerology
int *pucch_index_used[MAX_NUM_BWP];
/// bitmap of DLSCH slots, can hold up to 160 slots /// bitmap of DLSCH slots, can hold up to 160 slots
uint64_t dlsch_slot_bitmap[3]; uint64_t dlsch_slot_bitmap[3];
......
...@@ -105,10 +105,6 @@ void handle_nr_uci(NR_UL_IND_t *UL_info) ...@@ -105,10 +105,6 @@ void handle_nr_uci(NR_UL_IND_t *UL_info)
} }
UL_info->uci_ind.num_ucis = 0; UL_info->uci_ind.num_ucis = 0;
// mark corresponding PUCCH resources as free
// NOTE: we just assume it is BWP ID 1, to be revised for multiple BWPs
RC.nrmac[mod_id]->pucch_index_used[1][slot] = 0;
} }
......
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