Merge remote-tracking branch 'beurdouc/enhancements_phy_test' into integration_2026_w30

PMI and MCS table index in phy-test (#182)

Add options to set PMI and MCS table index in phy-test:
- Precoding Matrix Index (PMI): -p <pmi>
- DL MCS table index: -n <index>
- UL MCS table index: -u <index>
Reviewed-by: default avatarRobert Schmidt <robert.schmidt@openairinterface.org>
Reviewed-by: default avatarLaurent THOMAS <laurent.thomas@open-cells.com>
parents 879179e7 436db360
...@@ -32,7 +32,9 @@ ...@@ -32,7 +32,9 @@
/* help strings definition for command line options, used in CMDLINE_XXX_DESC macros and printed when -h option is used */ /* help strings definition for command line options, used in CMDLINE_XXX_DESC macros and printed when -h option is used */
#define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n" #define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
#define CONFIG_HLP_DLMCST_PHYTEST "Set the downlink MCS table index for PHYTEST mode\n"
#define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n" #define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n"
#define CONFIG_HLP_DLPMI_PHYTEST "Set the downlink Precoding Matrix Index for PHYTEST mode\n"
#define CONFIG_HLP_ULNL_PHYTEST "Set the uplink nrOfLayers for PHYTEST mode\n" #define CONFIG_HLP_ULNL_PHYTEST "Set the uplink nrOfLayers for PHYTEST mode\n"
#define CONFIG_HLP_DLBW_PHYTEST "Set the number of PRBs used for DLSCH in PHYTEST mode\n" #define CONFIG_HLP_DLBW_PHYTEST "Set the number of PRBs used for DLSCH in PHYTEST mode\n"
#define CONFIG_HLP_ULBW_PHYTEST "Set the number of PRBs used for ULSCH in PHYTEST mode\n" #define CONFIG_HLP_ULBW_PHYTEST "Set the number of PRBs used for ULSCH in PHYTEST mode\n"
...@@ -52,7 +54,8 @@ ...@@ -52,7 +54,8 @@
#define CONFIG_HLP_PRB_SA "Set the number of PRBs for SA\n" #define CONFIG_HLP_PRB_SA "Set the number of PRBs for SA\n"
#define CONFIG_HLP_SSC "Set the start subcarrier \n" #define CONFIG_HLP_SSC "Set the start subcarrier \n"
#define CONFIG_HLP_DISABLETIMECORR "disable UE timing correction\n" #define CONFIG_HLP_DISABLETIMECORR "disable UE timing correction\n"
#define CONFIG_HLP_ULMCS_PHYTEST "Set the uplink MCS for PHYTEST mode\n" #define CONFIG_HLP_ULMCS_PHYTEST "Set the uplink MCS for PHYTEST mode\n"
#define CONFIG_HLP_ULMCST_PHYTEST "Set the uplink MCS table index for PHYTEST mode\n"
#define CONFIG_HLP_DLBW_PHYTEST "Set the number of PRBs used for DLSCH in PHYTEST mode\n" #define CONFIG_HLP_DLBW_PHYTEST "Set the number of PRBs used for DLSCH in PHYTEST mode\n"
#define CONFIG_HLP_ULBW_PHYTEST "Set the number of PRBs used for ULSCH in PHYTEST mode\n" #define CONFIG_HLP_ULBW_PHYTEST "Set the number of PRBs used for ULSCH in PHYTEST mode\n"
#define CONFIG_HLP_DLBM_PHYTEST "Bitmap for DLSCH slots in period (slot 0 starts at LSB)\n" #define CONFIG_HLP_DLBM_PHYTEST "Bitmap for DLSCH slots in period (slot 0 starts at LSB)\n"
......
...@@ -21,10 +21,13 @@ ...@@ -21,10 +21,13 @@
/*----------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ /*----------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
// clang-format off // clang-format off
#define CMDLINE_PARAMS_DESC_GNB { \ #define CMDLINE_PARAMS_DESC_GNB { \
{"m" , CONFIG_HLP_DLMCS_PHYTEST, 0, .uptr=&target_dl_mcs, .defintval=0, TYPE_UINT, 0}, \
{"l" , CONFIG_HLP_DLNL_PHYTEST, 0, .uptr=&target_dl_Nl, .defintval=0, TYPE_UINT, 0}, \ {"l" , CONFIG_HLP_DLNL_PHYTEST, 0, .uptr=&target_dl_Nl, .defintval=0, TYPE_UINT, 0}, \
{"L" , CONFIG_HLP_ULNL_PHYTEST, 0, .uptr=&target_ul_Nl, .defintval=0, TYPE_UINT, 0}, \ {"L" , CONFIG_HLP_ULNL_PHYTEST, 0, .uptr=&target_ul_Nl, .defintval=0, TYPE_UINT, 0}, \
{"p" , CONFIG_HLP_DLPMI_PHYTEST, 0, .uptr=&target_dl_pmi, .defintval=0, TYPE_UINT, 0}, \
{"m" , CONFIG_HLP_DLMCS_PHYTEST, 0, .uptr=&target_dl_mcs, .defintval=0, TYPE_UINT, 0}, \
{"n" , CONFIG_HLP_DLMCST_PHYTEST, 0, .uptr=&target_dl_mcs_table_index, .defintval=0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS_PHYTEST, 0, .uptr=&target_ul_mcs, .defintval=0, TYPE_UINT, 0}, \ {"t" , CONFIG_HLP_ULMCS_PHYTEST, 0, .uptr=&target_ul_mcs, .defintval=0, TYPE_UINT, 0}, \
{"u" , CONFIG_HLP_ULMCST_PHYTEST, 0, .uptr=&target_ul_mcs_table_index, .defintval=0, TYPE_UINT, 0}, \
{"M" , CONFIG_HLP_DLBW_PHYTEST, 0, .uptr=&target_dl_bw, .defintval=0, TYPE_UINT, 0}, \ {"M" , CONFIG_HLP_DLBW_PHYTEST, 0, .uptr=&target_dl_bw, .defintval=0, TYPE_UINT, 0}, \
{"T" , CONFIG_HLP_ULBW_PHYTEST, 0, .uptr=&target_ul_bw, .defintval=0, TYPE_UINT, 0}, \ {"T" , CONFIG_HLP_ULBW_PHYTEST, 0, .uptr=&target_ul_bw, .defintval=0, TYPE_UINT, 0}, \
{"D" , CONFIG_HLP_DLBM_PHYTEST, 0, .u64ptr=&dlsch_slot_bitmap, .defint64val=0, TYPE_UINT64, 0}, \ {"D" , CONFIG_HLP_DLBM_PHYTEST, 0, .u64ptr=&dlsch_slot_bitmap, .defint64val=0, TYPE_UINT64, 0}, \
...@@ -36,10 +39,13 @@ ...@@ -36,10 +39,13 @@
} }
// clang-format on // clang-format on
extern uint32_t target_dl_mcs;
extern uint32_t target_dl_Nl; extern uint32_t target_dl_Nl;
extern uint32_t target_ul_Nl; extern uint32_t target_ul_Nl;
extern uint32_t target_dl_pmi;
extern uint32_t target_dl_mcs;
extern uint32_t target_dl_mcs_table_index;
extern uint32_t target_ul_mcs; extern uint32_t target_ul_mcs;
extern uint32_t target_ul_mcs_table_index;
extern uint32_t target_dl_bw; extern uint32_t target_dl_bw;
extern uint32_t target_ul_bw; extern uint32_t target_ul_bw;
extern uint64_t dlsch_slot_bitmap; extern uint64_t dlsch_slot_bitmap;
......
...@@ -19,17 +19,6 @@ uint64_t downlink_frequency[MAX_NUM_CCs][4]; ...@@ -19,17 +19,6 @@ uint64_t downlink_frequency[MAX_NUM_CCs][4];
int64_t uplink_frequency_offset[MAX_NUM_CCs][4]; int64_t uplink_frequency_offset[MAX_NUM_CCs][4];
int cpu_meas_enabled; int cpu_meas_enabled;
THREAD_STRUCT thread_struct; THREAD_STRUCT thread_struct;
uint32_t target_ul_mcs = 9;
uint32_t target_dl_mcs = 9;
uint64_t dlsch_slot_bitmap = (1<<1);
uint64_t ulsch_slot_bitmap = (1<<8);
uint32_t target_ul_bw = 50;
uint32_t target_dl_bw = 50;
uint32_t target_dl_Nl;
uint32_t target_ul_Nl;
char *uecap_file;
uint32_t dlsch_slot_modval;
uint32_t ulsch_slot_modval;
#include <executables/nr-softmodem.h> #include <executables/nr-softmodem.h>
int read_recplayconfig(recplay_conf_t **recplay_conf, recplay_state_t **recplay_state) {return 0;} int read_recplayconfig(recplay_conf_t **recplay_conf, recplay_state_t **recplay_state) {return 0;}
...@@ -44,11 +33,9 @@ int main(int argc, char **argv) { ...@@ -44,11 +33,9 @@ int main(int argc, char **argv) {
setvbuf(stdout, NULL, _IONBF, 0); setvbuf(stdout, NULL, _IONBF, 0);
setvbuf(stderr, NULL, _IONBF, 0); setvbuf(stderr, NULL, _IONBF, 0);
logInit(); logInit();
paramdef_t cmdline_params[] = CMDLINE_PARAMS_DESC_GNB ;
CONFIG_SETRTFLAG(CONFIG_NOEXITONHELP); CONFIG_SETRTFLAG(CONFIG_NOEXITONHELP);
get_common_options(uniqCfg); get_common_options(uniqCfg);
config_process_cmdline(uniqCfg, cmdline_params, sizeofArray(cmdline_params), NULL);
CONFIG_CLEARRTFLAG(CONFIG_NOEXITONHELP); CONFIG_CLEARRTFLAG(CONFIG_NOEXITONHELP);
lock_memory_to_ram(); lock_memory_to_ram();
......
...@@ -34,7 +34,9 @@ static bool is_xlsch_in_slot(uint64_t bitmap, uint32_t modval, slot_t slot) ...@@ -34,7 +34,9 @@ static bool is_xlsch_in_slot(uint64_t bitmap, uint32_t modval, slot_t slot)
} }
uint32_t target_dl_mcs = 9; uint32_t target_dl_mcs = 9;
uint32_t target_dl_mcs_table_index = 0;
uint32_t target_dl_Nl = 1; uint32_t target_dl_Nl = 1;
uint32_t target_dl_pmi = 0;
uint32_t target_dl_bw = 50; uint32_t target_dl_bw = 50;
uint64_t dlsch_slot_bitmap = (1<<1); uint64_t dlsch_slot_bitmap = (1<<1);
uint32_t dlsch_slot_modval = 0; uint32_t dlsch_slot_modval = 0;
...@@ -55,6 +57,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch) ...@@ -55,6 +57,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch)
NR_ServingCellConfigCommon_t *scc = mac->common_channels[0].ServingCellConfigCommon; NR_ServingCellConfigCommon_t *scc = mac->common_channels[0].ServingCellConfigCommon;
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP; NR_UE_DL_BWP_t *dl_bwp = &UE->current_DL_BWP;
dl_bwp->mcsTableIdx = target_dl_mcs_table_index;
const int CC_id = 0; const int CC_id = 0;
/* return if all DL HARQ processes wait for feedback */ /* return if all DL HARQ processes wait for feedback */
...@@ -161,7 +164,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch) ...@@ -161,7 +164,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch)
// tbSize further below // tbSize further below
.dl_harq_pid = sched_ctrl->retrans_dl_harq.head, // PID of HARQ awaiting retransmission, or -1 otherwise .dl_harq_pid = sched_ctrl->retrans_dl_harq.head, // PID of HARQ awaiting retransmission, or -1 otherwise
.pucch_allocation = alloc, .pucch_allocation = alloc,
.pm_index = 0, .pm_index = target_dl_pmi,
.nrOfLayers = target_dl_Nl, .nrOfLayers = target_dl_Nl,
.bwp_info = get_pdsch_bwp_start_size(mac, UE), .bwp_info = get_pdsch_bwp_start_size(mac, UE),
.dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, target_dl_Nl), .dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, target_dl_Nl),
...@@ -207,6 +210,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch) ...@@ -207,6 +210,7 @@ void nr_preprocessor_phytest(gNB_MAC_INST *mac, post_process_pdsch_t *pp_pdsch)
} }
uint32_t target_ul_mcs = 9; uint32_t target_ul_mcs = 9;
uint32_t target_ul_mcs_table_index = 0;
uint32_t target_ul_bw = 50; uint32_t target_ul_bw = 50;
uint32_t target_ul_Nl = 1; uint32_t target_ul_Nl = 1;
uint64_t ulsch_slot_bitmap = (1 << 8); uint64_t ulsch_slot_bitmap = (1 << 8);
...@@ -230,6 +234,7 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p ...@@ -230,6 +234,7 @@ void nr_ul_preprocessor_phytest(gNB_MAC_INST *nr_mac, post_process_pusch_t *pp_p
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl; NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP; NR_UE_UL_BWP_t *ul_bwp = &UE->current_UL_BWP;
ul_bwp->mcs_table = target_ul_mcs_table_index;
/* return if all UL HARQ processes wait for feedback */ /* return if all UL HARQ processes wait for feedback */
if (sched_ctrl->retrans_ul_harq.head == -1 && sched_ctrl->available_ul_harq.head == -1) { if (sched_ctrl->retrans_ul_harq.head == -1 && sched_ctrl->available_ul_harq.head == -1) {
......
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