Commit cd052951 authored by Thomas Schlichter's avatar Thomas Schlichter

gNB: do not schedule DLSCH ACK/NACK reporting in PUCCH for harq pid where feedback is disabled

parent 3a014e19
...@@ -1861,17 +1861,6 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1861,17 +1861,6 @@ static void nr_generate_Msg4(module_id_t module_idP,
return; return;
} }
const int delta_PRI = 0;
int r_pucch = nr_get_pucch_resource(coreset, ra->UL_BWP.pucch_Config, CCEIndex);
LOG_D(NR_MAC, "Msg4 r_pucch %d (CCEIndex %d, delta_PRI %d)\n", r_pucch, CCEIndex, delta_PRI);
int alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, r_pucch, 1);
if (alloc < 0) {
LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n",frameP,slotP);
return;
}
// HARQ management // HARQ management
if (current_harq_pid < 0) { if (current_harq_pid < 0) {
AssertFatal(sched_ctrl->available_dl_harq.head >= 0, AssertFatal(sched_ctrl->available_dl_harq.head >= 0,
...@@ -1879,10 +1868,26 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1879,10 +1868,26 @@ static void nr_generate_Msg4(module_id_t module_idP,
current_harq_pid = sched_ctrl->available_dl_harq.head; current_harq_pid = sched_ctrl->available_dl_harq.head;
remove_front_nr_list(&sched_ctrl->available_dl_harq); remove_front_nr_list(&sched_ctrl->available_dl_harq);
} }
const int delta_PRI = 0;
int alloc = -1;
if (!get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, current_harq_pid)) {
int r_pucch = nr_get_pucch_resource(coreset, ra->UL_BWP.pucch_Config, CCEIndex);
LOG_D(NR_MAC, "Msg4 r_pucch %d (CCEIndex %d, delta_PRI %d)\n", r_pucch, CCEIndex, delta_PRI);
alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, r_pucch, 1);
if (alloc < 0) {
LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n",frameP,slotP);
return;
}
}
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid]; NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[alloc]; NR_sched_pucch_t *pucch = NULL;
DevAssert(!harq->is_waiting); DevAssert(!harq->is_waiting);
if (get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, current_harq_pid)) { if (alloc < 0) {
add_tail_nr_list(&sched_ctrl->available_dl_harq, current_harq_pid); add_tail_nr_list(&sched_ctrl->available_dl_harq, current_harq_pid);
harq->feedback_frame = -1; harq->feedback_frame = -1;
harq->feedback_slot = -1; harq->feedback_slot = -1;
...@@ -1890,6 +1895,7 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1890,6 +1895,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
harq->ndi ^= 1; harq->ndi ^= 1;
harq->round = 0; harq->round = 0;
} else { } else {
pucch = &sched_ctrl->sched_pucch[alloc];
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid); add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
harq->feedback_slot = pucch->ul_slot; harq->feedback_slot = pucch->ul_slot;
harq->feedback_frame = pucch->frame; harq->feedback_frame = pucch->frame;
...@@ -1976,9 +1982,7 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1976,9 +1982,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols); vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols);
} }
if (get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, current_harq_pid)) { if (pucch == NULL) {
LOG_I(NR_MAC,"UE %04x Generate msg4: feedback at %4d.%2d, payload %d bytes\n", ra->rnti, pucch->frame, pucch->ul_slot, harq->tb_size);
LOG_A(NR_MAC, "(UE RNTI 0x%04x) Skipping Ack of RA-Msg4. CBRA procedure succeeded!\n", ra->rnti); LOG_A(NR_MAC, "(UE RNTI 0x%04x) Skipping Ack of RA-Msg4. CBRA procedure succeeded!\n", ra->rnti);
UE->Msg4_ACKed = true; UE->Msg4_ACKed = true;
......
...@@ -556,14 +556,17 @@ static bool allocate_dl_retransmission(module_id_t module_id, ...@@ -556,14 +556,17 @@ static bool allocate_dl_retransmission(module_id_t module_id,
/* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH /* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH
* allocation after CCE alloc fail would be more complex) */ * allocation after CCE alloc fail would be more complex) */
int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, ul_bwp->pucch_Config, CCEIndex); int alloc = -1;
const int alloc = nr_acknack_scheduling(nr_mac, UE, frame, slot, r_pucch, 0); if (!get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, current_harq_pid)) {
if (alloc<0) { int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, ul_bwp->pucch_Config, CCEIndex);
LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find PUCCH for DL DCI retransmission\n", alloc = nr_acknack_scheduling(nr_mac, UE, frame, slot, r_pucch, 0);
UE->rnti, if (alloc<0) {
frame, LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find PUCCH for DL DCI retransmission\n",
slot); UE->rnti,
return false; frame,
slot);
return false;
}
} }
sched_ctrl->cce_index = CCEIndex; sched_ctrl->cce_index = CCEIndex;
...@@ -724,6 +727,8 @@ static void pf_dl(module_id_t module_id, ...@@ -724,6 +727,8 @@ static void pf_dl(module_id_t module_id,
iterator++; iterator++;
continue; continue;
} }
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
sched_pdsch->dl_harq_pid = sched_ctrl->available_dl_harq.head;
int CCEIndex = get_cce_index(mac, int CCEIndex = get_cce_index(mac,
CC_id, slot, iterator->UE->rnti, CC_id, slot, iterator->UE->rnti,
...@@ -744,16 +749,18 @@ static void pf_dl(module_id_t module_id, ...@@ -744,16 +749,18 @@ static void pf_dl(module_id_t module_id,
/* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH /* Find PUCCH occasion: if it fails, undo CCE allocation (undoing PUCCH
* allocation after CCE alloc fail would be more complex) */ * allocation after CCE alloc fail would be more complex) */
int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, ul_bwp->pucch_Config, CCEIndex); int alloc = -1;
const int alloc = nr_acknack_scheduling(mac, iterator->UE, frame, slot, r_pucch, 0); if (!get_FeedbackDisabled(iterator->UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, sched_pdsch->dl_harq_pid)) {
int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, ul_bwp->pucch_Config, CCEIndex);
if (alloc<0) { alloc = nr_acknack_scheduling(mac, iterator->UE, frame, slot, r_pucch, 0);
LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find PUCCH for DL DCI\n", if (alloc<0) {
rnti, LOG_D(NR_MAC, "[UE %04x][%4d.%2d] could not find PUCCH for DL DCI\n",
frame, rnti,
slot); frame,
iterator++; slot);
continue; iterator++;
continue;
}
} }
sched_ctrl->cce_index = CCEIndex; sched_ctrl->cce_index = CCEIndex;
...@@ -764,7 +771,6 @@ static void pf_dl(module_id_t module_id, ...@@ -764,7 +771,6 @@ static void pf_dl(module_id_t module_id,
sched_ctrl->aggregation_level); sched_ctrl->aggregation_level);
/* MCS has been set above */ /* MCS has been set above */
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
sched_pdsch->time_domain_allocation = get_dl_tda(mac, scc, slot); sched_pdsch->time_domain_allocation = get_dl_tda(mac, scc, slot);
AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n"); AssertFatal(sched_pdsch->time_domain_allocation>=0,"Unable to find PDSCH time domain allocation in list\n");
...@@ -999,9 +1005,9 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -999,9 +1005,9 @@ void nr_schedule_ue_spec(module_id_t module_id,
NR_tda_info_t *tda_info = &sched_pdsch->tda_info; NR_tda_info_t *tda_info = &sched_pdsch->tda_info;
NR_pdsch_dmrs_t *dmrs_parms = &sched_pdsch->dmrs_parms; NR_pdsch_dmrs_t *dmrs_parms = &sched_pdsch->dmrs_parms;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid]; NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[sched_pdsch->pucch_allocation]; NR_sched_pucch_t *pucch = NULL;
DevAssert(!harq->is_waiting); DevAssert(!harq->is_waiting);
if (get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, current_harq_pid)) { if (sched_pdsch->pucch_allocation < 0) {
add_tail_nr_list(&sched_ctrl->available_dl_harq, current_harq_pid); add_tail_nr_list(&sched_ctrl->available_dl_harq, current_harq_pid);
harq->feedback_frame = -1; harq->feedback_frame = -1;
harq->feedback_slot = -1; harq->feedback_slot = -1;
...@@ -1009,6 +1015,7 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1009,6 +1015,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
harq->ndi ^= 1; harq->ndi ^= 1;
harq->round = 0; harq->round = 0;
} else { } else {
pucch = &sched_ctrl->sched_pucch[sched_pdsch->pucch_allocation];
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid); add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
harq->feedback_frame = pucch->frame; harq->feedback_frame = pucch->frame;
harq->feedback_slot = pucch->ul_slot; harq->feedback_slot = pucch->ul_slot;
...@@ -1205,10 +1212,10 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -1205,10 +1212,10 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.rv = pdsch_pdu->rvIndex[0]; dci_payload.rv = pdsch_pdu->rvIndex[0];
dci_payload.harq_pid = current_harq_pid; dci_payload.harq_pid = current_harq_pid;
dci_payload.ndi = harq->ndi; dci_payload.ndi = harq->ndi;
dci_payload.dai[0].val = (pucch->dai_c-1)&3; dci_payload.dai[0].val = pucch ? (pucch->dai_c-1)&3 : 0;
dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213 dci_payload.tpc = sched_ctrl->tpc1; // TPC for PUCCH: table 7.2.1-1 in 38.213
dci_payload.pucch_resource_indicator = pucch->resource_indicator; dci_payload.pucch_resource_indicator = pucch ? pucch->resource_indicator : 0;
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch->timing_indicator; // PDSCH to HARQ TI dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0; // PDSCH to HARQ TI
dci_payload.antenna_ports.val = dmrs_parms->dmrs_ports_id; dci_payload.antenna_ports.val = dmrs_parms->dmrs_ports_id;
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID; dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
LOG_D(NR_MAC, LOG_D(NR_MAC,
......
...@@ -142,16 +142,23 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -142,16 +142,23 @@ void nr_preprocessor_phytest(module_id_t module_id,
__func__, __func__,
UE->rnti); UE->rnti);
int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, UE->current_UL_BWP.pucch_Config, CCEIndex); NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
const int alloc = nr_acknack_scheduling(RC.nrmac[module_id], UE, frame, slot, r_pucch, 0); if (sched_pdsch->dl_harq_pid == -1)
if (alloc < 0) { sched_pdsch->dl_harq_pid = sched_ctrl->available_dl_harq.head;
LOG_D(MAC,
"%s(): could not find PUCCH for UE %04x@%d.%d\n", int alloc = -1;
__func__, if (!get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, sched_pdsch->dl_harq_pid)) {
rnti, int r_pucch = nr_get_pucch_resource(sched_ctrl->coreset, UE->current_UL_BWP.pucch_Config, CCEIndex);
frame, alloc = nr_acknack_scheduling(RC.nrmac[module_id], UE, frame, slot, r_pucch, 0);
slot); if (alloc < 0) {
return; LOG_D(MAC,
"%s(): could not find PUCCH for UE %04x@%d.%d\n",
__func__,
rnti,
frame,
slot);
return;
}
} }
sched_ctrl->cce_index = CCEIndex; sched_ctrl->cce_index = CCEIndex;
...@@ -166,7 +173,6 @@ void nr_preprocessor_phytest(module_id_t module_id, ...@@ -166,7 +173,6 @@ void nr_preprocessor_phytest(module_id_t module_id,
// "could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n", // "could not find uplink slot for PUCCH (RNTI %04x@%d.%d)!\n",
// rnti, frame, slot); // rnti, frame, slot);
NR_sched_pdsch_t *sched_pdsch = &sched_ctrl->sched_pdsch;
sched_pdsch->pucch_allocation = alloc; sched_pdsch->pucch_allocation = alloc;
sched_pdsch->rbStart = rbStart; sched_pdsch->rbStart = rbStart;
sched_pdsch->rbSize = rbSize; sched_pdsch->rbSize = rbSize;
......
...@@ -437,7 +437,7 @@ typedef struct NR_sched_pdsch { ...@@ -437,7 +437,7 @@ typedef struct NR_sched_pdsch {
int8_t dl_harq_pid; int8_t dl_harq_pid;
// pucch format allocation // pucch format allocation
uint16_t pucch_allocation; int16_t pucch_allocation;
uint16_t pm_index; uint16_t pm_index;
uint8_t nrOfLayers; uint8_t nrOfLayers;
......
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