Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
promise
OpenXG-RAN
Commits
00f0e0cc
Commit
00f0e0cc
authored
Jan 14, 2020
by
Florian Kaltenberger
Committed by
Florian Kaltenberger
Jan 23, 2020
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
UL is now being scheduled but not decoded ok yet
parent
2605e3f1
Changes
11
Hide whitespace changes
Inline
Side-by-side
Showing
11 changed files
with
109 additions
and
80 deletions
+109
-80
executables/nr-gnb.c
executables/nr-gnb.c
+31
-24
executables/nr-ru.c
executables/nr-ru.c
+14
-11
executables/nr-ue.c
executables/nr-ue.c
+3
-4
openair1/PHY/INIT/nr_init.c
openair1/PHY/INIT/nr_init.c
+6
-1
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
+1
-1
openair1/SCHED_NR/phy_procedures_nr_gNB.c
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+16
-13
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+1
-1
openair1/SIMULATION/NR_PHY/ulsim.c
openair1/SIMULATION/NR_PHY/ulsim.c
+6
-4
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+18
-18
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+3
-1
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf
.../GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf
+10
-2
No files found.
executables/nr-gnb.c
View file @
00f0e0cc
...
@@ -151,10 +151,13 @@ extern void add_subframe(uint16_t *frameP, uint16_t *subframeP, int offset);
...
@@ -151,10 +151,13 @@ extern void add_subframe(uint16_t *frameP, uint16_t *subframeP, int offset);
static
inline
int
rxtx
(
PHY_VARS_gNB
*
gNB
,
int
frame_rx
,
int
slot_rx
,
int
frame_tx
,
int
slot_tx
,
char
*
thread_name
)
{
static
inline
int
rxtx
(
PHY_VARS_gNB
*
gNB
,
int
frame_rx
,
int
slot_rx
,
int
frame_tx
,
int
slot_tx
,
char
*
thread_name
)
{
nfapi_nr_config_request_scf_t
*
cfg
=
&
gNB
->
gNB_config
;
start_meas
(
&
softmodem_stats_rxtx_sf
);
start_meas
(
&
softmodem_stats_rxtx_sf
);
// *******************************************************************
// *******************************************************************
// NFAPI not yet supported for NR - this code has to be revised
if
(
nfapi_mode
==
1
)
{
if
(
nfapi_mode
==
1
)
{
// I am a PNF and I need to let nFAPI know that we have a (sub)frame tick
// I am a PNF and I need to let nFAPI know that we have a (sub)frame tick
//add_subframe(&frame, &subframe, 4);
//add_subframe(&frame, &subframe, 4);
...
@@ -180,20 +183,18 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
...
@@ -180,20 +183,18 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
frame_tx
,
slot_tx
);
frame_tx
,
slot_tx
);
}
}
}
}
/// NR disabling
// ****************************************
// ****************************************
// Common RX procedures subframe n
T
(
T_GNB_PHY_DL_TICK
,
T_INT
(
gNB
->
Mod_id
),
T_INT
(
frame_tx
),
T_INT
(
slot_tx
));
T
(
T_GNB_PHY_DL_TICK
,
T_INT
(
gNB
->
Mod_id
),
T_INT
(
frame_tx
),
T_INT
(
slot_tx
));
/*
/*
// if this is IF5 or 3GPP_gNB
// if this is IF5 or 3GPP_gNB
if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
if (gNB && gNB->RU_list && gNB->RU_list[0] && gNB->RU_list[0]->function < NGFI_RAU_IF4p5) {
wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->slot_rx);
wakeup_prach_gNB(gNB,NULL,proc->frame_rx,proc->slot_rx);
}
}
*/
// UE-specific RX processing for subframe n
// Call the scheduler
if (nfapi_mode == 0 || nfapi_mode == 1) */
pthread_mutex_lock
(
&
gNB
->
UL_INFO_mutex
);
pthread_mutex_lock
(
&
gNB
->
UL_INFO_mutex
);
gNB
->
UL_INFO
.
frame
=
frame_rx
;
gNB
->
UL_INFO
.
frame
=
frame_rx
;
gNB
->
UL_INFO
.
slot
=
slot_rx
;
gNB
->
UL_INFO
.
slot
=
slot_rx
;
...
@@ -201,22 +202,30 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
...
@@ -201,22 +202,30 @@ static inline int rxtx(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int frame_t
gNB
->
UL_INFO
.
CC_id
=
gNB
->
CC_id
;
gNB
->
UL_INFO
.
CC_id
=
gNB
->
CC_id
;
gNB
->
if_inst
->
NR_UL_indication
(
&
gNB
->
UL_INFO
);
gNB
->
if_inst
->
NR_UL_indication
(
&
gNB
->
UL_INFO
);
pthread_mutex_unlock
(
&
gNB
->
UL_INFO_mutex
);
pthread_mutex_unlock
(
&
gNB
->
UL_INFO_mutex
);
// RX processing
int
tx_slot_type
=
nr_slot_select
(
cfg
,
frame_tx
,
slot_tx
);
int
rx_slot_type
=
nr_slot_select
(
cfg
,
frame_rx
,
slot_rx
);
if
(
rx_slot_type
==
NR_UPLINK_SLOT
||
rx_slot_type
==
NR_MIXED_SLOT
)
{
// UE-specific RX processing for subframe n
// TODO: check if this is correct for PARALLEL_RU_L1_TRX_SPLIT
phy_procedures_gNB_uespec_RX
(
gNB
,
frame_rx
,
slot_rx
);
}
if
(
oai_exit
)
return
(
-
1
);
/// end
// *****************************************
// *****************************************
// TX processing for subframe n+sl_ahead
// TX processing for subframe n+sl_ahead
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// run PHY TX procedures the one after the other for all CCs to avoid race conditions
// (may be relaxed in the future for performance reasons)
// (may be relaxed in the future for performance reasons)
// *****************************************
// *****************************************
//if (wait_CCs(proc)<0) return(-1);
if
(
tx_slot_type
==
NR_DOWNLINK_SLOT
||
tx_slot_type
==
NR_MIXED_SLOT
)
{
if
(
oai_exit
)
return
(
-
1
);
//if (slot_rx == NR_UPLINK_SLOT || gNB->frame_parms.frame_type == FDD)
phy_procedures_gNB_uespec_RX
(
gNB
,
frame_rx
,
slot_rx
);
if
(
get_thread_parallel_conf
()
!=
PARALLEL_RU_L1_TRX_SPLIT
)
{
if
(
get_thread_parallel_conf
()
!=
PARALLEL_RU_L1_TRX_SPLIT
)
{
phy_procedures_gNB_TX
(
gNB
,
frame_tx
,
slot_tx
,
1
);
phy_procedures_gNB_TX
(
gNB
,
frame_tx
,
slot_tx
,
1
);
}
}
}
stop_meas
(
&
softmodem_stats_rxtx_sf
);
stop_meas
(
&
softmodem_stats_rxtx_sf
);
...
@@ -716,7 +725,7 @@ static void* process_stats_thread(void* param) {
...
@@ -716,7 +725,7 @@ static void* process_stats_thread(void* param) {
void
init_gNB_proc
(
int
inst
)
{
void
init_gNB_proc
(
int
inst
)
{
int
i
=
0
;
int
i
=
0
;
int
CC_id
;
int
CC_id
=
0
;
PHY_VARS_gNB
*
gNB
;
PHY_VARS_gNB
*
gNB
;
gNB_L1_proc_t
*
proc
;
gNB_L1_proc_t
*
proc
;
gNB_L1_rxtx_proc_t
*
L1_proc
,
*
L1_proc_tx
;
gNB_L1_rxtx_proc_t
*
L1_proc
,
*
L1_proc_tx
;
...
@@ -794,7 +803,7 @@ void kill_gNB_proc(int inst) {
...
@@ -794,7 +803,7 @@ void kill_gNB_proc(int inst) {
proc
=
&
gNB
->
proc
;
proc
=
&
gNB
->
proc
;
L1_proc
=
&
proc
->
L1_proc
;
L1_proc
=
&
proc
->
L1_proc
;
L1_proc_tx
=
&
proc
->
L1_proc_tx
;
L1_proc_tx
=
&
proc
->
L1_proc_tx
;
LOG_I
(
PHY
,
"Killing TX
CC_id %d
inst %d
\n
"
,
inst
);
LOG_I
(
PHY
,
"Killing TX inst %d
\n
"
,
inst
);
if
(
get_thread_parallel_conf
()
==
PARALLEL_RU_L1_SPLIT
||
get_thread_parallel_conf
()
==
PARALLEL_RU_L1_TRX_SPLIT
)
{
if
(
get_thread_parallel_conf
()
==
PARALLEL_RU_L1_SPLIT
||
get_thread_parallel_conf
()
==
PARALLEL_RU_L1_TRX_SPLIT
)
{
pthread_mutex_lock
(
&
L1_proc
->
mutex
);
pthread_mutex_lock
(
&
L1_proc
->
mutex
);
...
@@ -866,12 +875,12 @@ void print_opp_meas(void) {
...
@@ -866,12 +875,12 @@ void print_opp_meas(void) {
/// eNB kept in function name for nffapi calls, TO FIX
/// eNB kept in function name for nffapi calls, TO FIX
void
init_eNB_afterRU
(
void
)
{
void
init_eNB_afterRU
(
void
)
{
int
inst
,
CC_id
,
ru_id
,
i
,
aa
;
int
inst
,
ru_id
,
i
,
aa
;
PHY_VARS_gNB
*
gNB
;
PHY_VARS_gNB
*
gNB
;
LOG_I
(
PHY
,
"%s() RC.nb_nr_inst:%d
\n
"
,
__FUNCTION__
,
RC
.
nb_nr_inst
);
LOG_I
(
PHY
,
"%s() RC.nb_nr_inst:%d
\n
"
,
__FUNCTION__
,
RC
.
nb_nr_inst
);
for
(
inst
=
0
;
inst
<
RC
.
nb_nr_inst
;
inst
++
)
{
for
(
inst
=
0
;
inst
<
RC
.
nb_nr_inst
;
inst
++
)
{
LOG_I
(
PHY
,
"RC.nb_nr_CC[inst:%d]:%p
\n
"
,
inst
,
CC_id
,
RC
.
gNB
[
inst
]);
LOG_I
(
PHY
,
"RC.nb_nr_CC[inst:%d]:%p
\n
"
,
inst
,
RC
.
gNB
[
inst
]);
gNB
=
RC
.
gNB
[
inst
];
gNB
=
RC
.
gNB
[
inst
];
phy_init_nr_gNB
(
gNB
,
0
,
0
);
phy_init_nr_gNB
(
gNB
,
0
,
0
);
...
@@ -879,8 +888,6 @@ void init_eNB_afterRU(void) {
...
@@ -879,8 +888,6 @@ void init_eNB_afterRU(void) {
if
(
0
)
AssertFatal
(
gNB
->
num_RU
>
0
,
"Number of RU attached to gNB %d is zero
\n
"
,
gNB
->
Mod_id
);
if
(
0
)
AssertFatal
(
gNB
->
num_RU
>
0
,
"Number of RU attached to gNB %d is zero
\n
"
,
gNB
->
Mod_id
);
LOG_I
(
PHY
,
"Mapping RX ports from %d RUs to gNB %d
\n
"
,
gNB
->
num_RU
,
gNB
->
Mod_id
);
LOG_I
(
PHY
,
"Mapping RX ports from %d RUs to gNB %d
\n
"
,
gNB
->
num_RU
,
gNB
->
Mod_id
);
//LOG_I(PHY,"Overwriting gNB->prach_vars.rxsigF[0]:%p\n", gNB->prach_vars.rxsigF[0]);
gNB
->
prach_vars
.
rxsigF
[
0
]
=
(
int16_t
**
)
malloc16
(
64
*
sizeof
(
int16_t
*
));
LOG_I
(
PHY
,
"gNB->num_RU:%d
\n
"
,
gNB
->
num_RU
);
LOG_I
(
PHY
,
"gNB->num_RU:%d
\n
"
,
gNB
->
num_RU
);
for
(
ru_id
=
0
,
aa
=
0
;
ru_id
<
gNB
->
num_RU
;
ru_id
++
)
{
for
(
ru_id
=
0
,
aa
=
0
;
ru_id
<
gNB
->
num_RU
;
ru_id
++
)
{
...
@@ -893,7 +900,7 @@ void init_eNB_afterRU(void) {
...
@@ -893,7 +900,7 @@ void init_eNB_afterRU(void) {
for
(
i
=
0
;
i
<
gNB
->
RU_list
[
ru_id
]
->
nb_rx
;
aa
++
,
i
++
)
{
for
(
i
=
0
;
i
<
gNB
->
RU_list
[
ru_id
]
->
nb_rx
;
aa
++
,
i
++
)
{
LOG_I
(
PHY
,
"Attaching RU %d antenna %d to gNB antenna %d
\n
"
,
gNB
->
RU_list
[
ru_id
]
->
idx
,
i
,
aa
);
LOG_I
(
PHY
,
"Attaching RU %d antenna %d to gNB antenna %d
\n
"
,
gNB
->
RU_list
[
ru_id
]
->
idx
,
i
,
aa
);
gNB
->
prach_vars
.
rxsigF
[
0
][
aa
]
=
gNB
->
RU_list
[
ru_id
]
->
prach_rxsigF
[
i
];
gNB
->
prach_vars
.
rxsigF
[
aa
]
=
gNB
->
RU_list
[
ru_id
]
->
prach_rxsigF
[
i
];
gNB
->
common_vars
.
rxdataF
[
aa
]
=
gNB
->
RU_list
[
ru_id
]
->
common
.
rxdataF
[
i
];
gNB
->
common_vars
.
rxdataF
[
aa
]
=
gNB
->
RU_list
[
ru_id
]
->
common
.
rxdataF
[
i
];
}
}
}
}
...
...
executables/nr-ru.c
View file @
00f0e0cc
...
@@ -721,8 +721,8 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
...
@@ -721,8 +721,8 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
T
(
T_ENB_PHY_OUTPUT_SIGNAL
,
T_INT
(
0
),
T_INT
(
0
),
T_INT
(
frame
),
T_INT
(
slot
),
T
(
T_ENB_PHY_OUTPUT_SIGNAL
,
T_INT
(
0
),
T_INT
(
0
),
T_INT
(
frame
),
T_INT
(
slot
),
T_INT
(
0
),
T_BUFFER
(
&
ru
->
common
.
txdata
[
0
][
slot
*
fp
->
samples_per_slot
],
fp
->
samples_per_slot
*
4
));
T_INT
(
0
),
T_BUFFER
(
&
ru
->
common
.
txdata
[
0
][
slot
*
fp
->
samples_per_slot
],
fp
->
samples_per_slot
*
4
));
int
slot_type
=
nr_slot_select
(
cfg
,
frame
,
slot
%
((
1
<<
cfg
->
ssb_config
.
scs_common
.
value
)
*
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME
)
);
int
slot_type
=
nr_slot_select
(
cfg
,
frame
,
slot
);
int
prevslot_type
=
nr_slot_select
(
cfg
,
frame
,(
slot
+
(((
1
<<
cfg
->
ssb_config
.
scs_common
.
value
)
*
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME
)
-
1
))
%
((
1
<<
cfg
->
ssb_config
.
scs_common
.
value
)
*
LTE_NUMBER_OF_SUBFRAMES_PER_FRAME
)
);
int
prevslot_type
=
nr_slot_select
(
cfg
,
frame
,(
slot
+
fp
->
slots_per_frame
-
1
)
%
fp
->
slots_per_frame
);
int
sf_extension
=
0
;
//sf_extension = ru->sf_extension;
int
sf_extension
=
0
;
//sf_extension = ru->sf_extension;
int
siglen
=
fp
->
samples_per_slot
;
int
siglen
=
fp
->
samples_per_slot
;
int
flags
=
1
;
int
flags
=
1
;
...
@@ -1366,6 +1366,8 @@ void *ru_thread( void *param ) {
...
@@ -1366,6 +1366,8 @@ void *ru_thread( void *param ) {
int
i
=
0
;
int
i
=
0
;
int
aa
;
int
aa
;
nfapi_nr_config_request_scf_t
*
cfg
=
&
ru
->
gNB_list
[
0
]
->
gNB_config
;
// set default return value
// set default return value
ru_thread_status
=
0
;
ru_thread_status
=
0
;
// set default return value
// set default return value
...
@@ -1484,19 +1486,20 @@ void *ru_thread( void *param ) {
...
@@ -1484,19 +1486,20 @@ void *ru_thread( void *param ) {
// do RX front-end processing (frequency-shift, dft) if needed
// do RX front-end processing (frequency-shift, dft) if needed
if
(
proc
->
tti_rx
==
NR_UPLINK_SLOT
||
fp
->
frame_type
==
FDD
)
{
int
slot_type
=
nr_slot_select
(
cfg
,
proc
->
frame_rx
,
proc
->
tti_rx
);
if
(
slot_type
==
NR_UPLINK_SLOT
||
slot_type
==
NR_MIXED_SLOT
)
{
if
(
ru
->
feprx
)
ru
->
feprx
(
ru
,
proc
->
tti_rx
);
if
(
ru
->
feprx
)
ru
->
feprx
(
ru
,
proc
->
tti_rx
);
//LOG_M("rxdata.m","rxs",ru->common.rxdata[0],1228800,1,1);
LOG_D
(
PHY
,
"RU proc: frame_rx = %d, tti_rx = %d
\n
"
,
proc
->
frame_rx
,
proc
->
tti_rx
);
LOG_D
(
PHY
,
"Copying rxdataF from RU to gNB
\n
"
);
for
(
aa
=
0
;
aa
<
ru
->
nb_rx
;
aa
++
)
memcpy
((
void
*
)
RC
.
gNB
[
0
]
->
common_vars
.
rxdataF
[
aa
],
(
void
*
)
ru
->
common
.
rxdataF
[
aa
],
fp
->
symbols_per_slot
*
fp
->
ofdm_symbol_size
*
sizeof
(
int32_t
));
}
}
LOG_D
(
PHY
,
"RU proc: frame_rx = %d, tti_rx = %d
\n
"
,
proc
->
frame_rx
,
proc
->
tti_rx
);
LOG_D
(
PHY
,
"Copying rxdataF from RU to gNB
\n
"
);
for
(
aa
=
0
;
aa
<
ru
->
nb_rx
;
aa
++
)
memcpy
((
void
*
)
RC
.
gNB
[
0
]
->
common_vars
.
rxdataF
[
aa
],
(
void
*
)
ru
->
common
.
rxdataF
[
aa
],
fp
->
symbols_per_slot
*
fp
->
ofdm_symbol_size
*
sizeof
(
int32_t
));
// At this point, all information for subframe has been received on FH interface
// At this point, all information for subframe has been received on FH interface
// wakeup all gNB processes waiting for this RU
// wakeup all gNB processes waiting for this RU
...
...
executables/nr-ue.c
View file @
00f0e0cc
...
@@ -356,7 +356,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
...
@@ -356,7 +356,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
nr_scheduled_response_t
scheduled_response
;
nr_scheduled_response_t
scheduled_response
;
// program PUSCH. this should actually be done by the MAC upon reception of an UL DCI
// program PUSCH. this should actually be done by the MAC upon reception of an UL DCI
if
(
proc
->
nr_tti_tx
==
NR_UPLINK_SLOT
||
UE
->
frame_parms
.
frame_type
==
FDD
){
if
(
proc
->
nr_tti_tx
==
8
||
UE
->
frame_parms
.
frame_type
==
FDD
){
dcireq
.
module_id
=
UE
->
Mod_id
;
dcireq
.
module_id
=
UE
->
Mod_id
;
dcireq
.
gNB_index
=
0
;
dcireq
.
gNB_index
=
0
;
...
@@ -383,7 +383,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
...
@@ -383,7 +383,7 @@ void processSlotTX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
rvidx
=
0
;
rvidx
=
0
;
//------------------------------------------------------------------------------//
//------------------------------------------------------------------------------//
scheduled_response
.
ul_config
->
sfn_slot
=
NR_UPLINK_SLOT
;
scheduled_response
.
ul_config
->
sfn_slot
=
8
;
scheduled_response
.
ul_config
->
number_pdus
=
1
;
scheduled_response
.
ul_config
->
number_pdus
=
1
;
scheduled_response
.
ul_config
->
ul_config_list
[
0
].
pdu_type
=
FAPI_NR_UL_CONFIG_TYPE_PUSCH
;
scheduled_response
.
ul_config
->
ul_config_list
[
0
].
pdu_type
=
FAPI_NR_UL_CONFIG_TYPE_PUSCH
;
scheduled_response
.
ul_config
->
ul_config_list
[
0
].
ulsch_config_pdu
.
rnti
=
n_rnti
;
scheduled_response
.
ul_config
->
ul_config_list
[
0
].
ulsch_config_pdu
.
rnti
=
n_rnti
;
...
@@ -735,7 +735,6 @@ void *UE_thread(void *arg) {
...
@@ -735,7 +735,6 @@ void *UE_thread(void *arg) {
readBlockSize
,
readBlockSize
,
UE
->
frame_parms
.
nb_antennas_rx
),
""
);
UE
->
frame_parms
.
nb_antennas_rx
),
""
);
if
(
slot_nr
==
18
)
AssertFatal
(
writeBlockSize
==
AssertFatal
(
writeBlockSize
==
UE
->
rfdevice
.
trx_write_func
(
&
UE
->
rfdevice
,
UE
->
rfdevice
.
trx_write_func
(
&
UE
->
rfdevice
,
timestamp
+
timestamp
+
...
@@ -745,7 +744,7 @@ if (slot_nr==18)
...
@@ -745,7 +744,7 @@ if (slot_nr==18)
txp
,
txp
,
writeBlockSize
,
writeBlockSize
,
UE
->
frame_parms
.
nb_antennas_tx
,
UE
->
frame_parms
.
nb_antennas_tx
,
4
),
""
);
1
),
""
);
if
(
slot_nr
==
(
nb_slot_frame
-
1
))
{
if
(
slot_nr
==
(
nb_slot_frame
-
1
))
{
// read in first symbol of next frame and adjust for timing drift
// read in first symbol of next frame and adjust for timing drift
...
...
openair1/PHY/INIT/nr_init.c
View file @
00f0e0cc
...
@@ -198,7 +198,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
...
@@ -198,7 +198,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
*/
*/
// PRACH
// PRACH
prach_vars
->
prachF
=
(
int16_t
*
)
malloc16_clear
(
1024
*
2
*
sizeof
(
int16_t
)
);
prach_vars
->
prachF
=
(
int16_t
*
)
malloc16_clear
(
1024
*
2
*
sizeof
(
int16_t
)
);
prach_vars
->
rxsigF
=
(
int16_t
*
)
malloc16_clear
(
1024
*
2
*
sizeof
(
int16_t
)
);
prach_vars
->
rxsigF
=
(
int16_t
**
)
malloc16_clear
(
Prx
*
sizeof
(
int16_t
*
));
/*
for (i=0;i<Prx;i++){
prach_vars->rxsigF[i] = (int16_t *)malloc16_clear( 1024*2*sizeof(int16_t) );
}
*/
prach_vars
->
prach_ifft
=
(
int32_t
*
)
malloc16_clear
(
1024
*
2
*
sizeof
(
int32_t
));
prach_vars
->
prach_ifft
=
(
int32_t
*
)
malloc16_clear
(
1024
*
2
*
sizeof
(
int32_t
));
int
N_RB_UL
=
cfg
->
carrier_config
.
ul_grid_size
[
cfg
->
ssb_config
.
scs_common
.
value
].
value
;
int
N_RB_UL
=
cfg
->
carrier_config
.
ul_grid_size
[
cfg
->
ssb_config
.
scs_common
.
value
].
value
;
...
...
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
View file @
00f0e0cc
...
@@ -672,7 +672,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
...
@@ -672,7 +672,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
return
((
1
+
dlsch
->
max_ldpc_iterations
));
return
((
1
+
dlsch
->
max_ldpc_iterations
));
}
else
{
}
else
{
//#if UE_DEBUG_TRACE
//#if UE_DEBUG_TRACE
LOG_
D
(
PHY
,
"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d
\n
"
,
LOG_
I
(
PHY
,
"[UE %d] DLSCH: Setting ACK for nr_tti_rx %d TBS %d mcs %d nb_rb %d harq_process->round %d
\n
"
,
phy_vars_ue
->
Mod_id
,
nr_tti_rx
,
harq_process
->
TBS
,
harq_process
->
mcs
,
harq_process
->
nb_rb
,
harq_process
->
round
);
phy_vars_ue
->
Mod_id
,
nr_tti_rx
,
harq_process
->
TBS
,
harq_process
->
mcs
,
harq_process
->
nb_rb
,
harq_process
->
round
);
//#endif
//#endif
...
...
openair1/SCHED_NR/phy_procedures_nr_gNB.c
View file @
00f0e0cc
...
@@ -183,19 +183,22 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
...
@@ -183,19 +183,22 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX
,
0
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_COMMON_TX
,
0
);
if
(
gNB
->
pdcch_pdu
||
gNB
->
ul_dci_pdu
)
{
LOG_D
(
PHY
,
"[gNB %d] Frame %d slot %d \
LOG_D
(
PHY
,
"[gNB %d] Frame %d slot %d Calling nr_generate_dci_top (number of UL/DL DCI %d/%d)
\n
"
,
Calling nr_generate_dci_top (number of DCI %d)
\n
"
,
gNB
->
Mod_id
,
frame
,
slot
,
gNB
->
pdcch_pdu
->
pdcch_pdu_rel15
.
numDlDci
);
gNB
->
Mod_id
,
frame
,
slot
,
gNB
->
ul_dci_pdu
==
NULL
?
0
:
gNB
->
ul_dci_pdu
->
pdcch_pdu
.
pdcch_pdu_rel15
.
numDlDci
,
gNB
->
pdcch_pdu
==
NULL
?
0
:
gNB
->
pdcch_pdu
->
pdcch_pdu_rel15
.
numDlDci
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX
,
1
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX
,
1
);
if
(
gNB
->
pdcch_pdu
||
gNB
->
ul_dci_pdu
)
nr_generate_dci_top
(
gNB
->
pdcch_pdu
,
gNB
->
ul_dci_pdu
,
gNB
->
nr_gold_pdcch_dmrs
[
slot
],
&
gNB
->
common_vars
.
txdataF
[
0
][
txdataF_offset
],
AMP
,
*
fp
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX
,
0
);
nr_generate_dci_top
(
gNB
->
pdcch_pdu
,
gNB
->
ul_dci_pdu
,
gNB
->
nr_gold_pdcch_dmrs
[
slot
],
&
gNB
->
common_vars
.
txdataF
[
0
][
txdataF_offset
],
AMP
,
*
fp
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_PDCCH_TX
,
0
);
}
LOG_D
(
PHY
,
"PDSCH generation started (%d)
\n
"
,
gNB
->
num_pdsch_rnti
);
LOG_D
(
PHY
,
"PDSCH generation started (%d)
\n
"
,
gNB
->
num_pdsch_rnti
);
for
(
int
i
=
0
;
i
<
gNB
->
num_pdsch_rnti
;
i
++
)
{
for
(
int
i
=
0
;
i
<
gNB
->
num_pdsch_rnti
;
i
++
)
{
...
@@ -395,8 +398,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
...
@@ -395,8 +398,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
for
(
uint8_t
symbol
=
symbol_start
;
symbol
<
symbol_end
;
symbol
++
)
{
for
(
uint8_t
symbol
=
symbol_start
;
symbol
<
symbol_end
;
symbol
++
)
{
nr_rx_pusch
(
gNB
,
ULSCH_id
,
frame_rx
,
slot_rx
,
symbol
,
harq_pid
);
nr_rx_pusch
(
gNB
,
ULSCH_id
,
frame_rx
,
slot_rx
,
symbol
,
harq_pid
);
}
}
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[
UE_id
]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[
0
]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[
UE_id
]->rxdataF_ext[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[
0
]->rxdataF_ext[0],6900,1,1);
nr_ulsch_procedures
(
gNB
,
frame_rx
,
slot_rx
,
ULSCH_id
,
harq_pid
);
nr_ulsch_procedures
(
gNB
,
frame_rx
,
slot_rx
,
ULSCH_id
,
harq_pid
);
nr_fill_rx_indication
(
gNB
,
frame_rx
,
slot_rx
,
ULSCH_id
,
harq_pid
);
// indicate SDU to MAC
nr_fill_rx_indication
(
gNB
,
frame_rx
,
slot_rx
,
ULSCH_id
,
harq_pid
);
// indicate SDU to MAC
}
}
...
...
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @
00f0e0cc
...
@@ -2360,7 +2360,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
...
@@ -2360,7 +2360,7 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
gNB_id
,
gNB_id
,
&
ue
->
frame_parms
);
&
ue
->
frame_parms
);
//LOG_M("txdata.m","txs",ue->common_vars.txdata[0],1228800,1,1);
/*
/*
if ((ue->UE_mode[eNB_id] == PRACH) &&
if ((ue->UE_mode[eNB_id] == PRACH) &&
...
...
openair1/SIMULATION/NR_PHY/ulsim.c
View file @
00f0e0cc
...
@@ -145,7 +145,7 @@ int main(int argc, char **argv)
...
@@ -145,7 +145,7 @@ int main(int argc, char **argv)
uint16_t
N_RB_DL
=
106
,
N_RB_UL
=
106
,
mu
=
1
;
uint16_t
N_RB_DL
=
106
,
N_RB_UL
=
106
,
mu
=
1
;
//unsigned char frame_type = 0;
//unsigned char frame_type = 0;
int
number_of_frames
=
1
;
int
number_of_frames
=
1
;
int
frame_length_complex_samples
;
int
frame_length_complex_samples
,
frame_length_complex_samples_no_prefix
;
NR_DL_FRAME_PARMS
*
frame_parms
;
NR_DL_FRAME_PARMS
*
frame_parms
;
int
loglvl
=
OAILOG_WARNING
;
int
loglvl
=
OAILOG_WARNING
;
uint64_t
SSB_positions
=
0x01
;
uint64_t
SSB_positions
=
0x01
;
...
@@ -407,7 +407,7 @@ int main(int argc, char **argv)
...
@@ -407,7 +407,7 @@ int main(int argc, char **argv)
//init_eNB_afterRU();
//init_eNB_afterRU();
frame_length_complex_samples
=
frame_parms
->
samples_per_subframe
;
frame_length_complex_samples
=
frame_parms
->
samples_per_subframe
;
//
frame_length_complex_samples_no_prefix = frame_parms->samples_per_subframe_wCP;
frame_length_complex_samples_no_prefix
=
frame_parms
->
samples_per_subframe_wCP
;
//configure UE
//configure UE
UE
=
malloc
(
sizeof
(
PHY_VARS_NR_UE
));
UE
=
malloc
(
sizeof
(
PHY_VARS_NR_UE
));
...
@@ -577,7 +577,8 @@ int main(int argc, char **argv)
...
@@ -577,7 +577,8 @@ int main(int argc, char **argv)
phy_procedures_nrUE_TX
(
UE
,
&
UE_proc
,
gNB_id
,
0
);
phy_procedures_nrUE_TX
(
UE
,
&
UE_proc
,
gNB_id
,
0
);
//LOG_M("txsig0.m","txs0", UE->common_vars.txdata[0],frame_length_complex_samples,1,1);
if
(
number_of_frames
==
1
)
LOG_M
(
"txsig0.m"
,
"txs0"
,
UE
->
common_vars
.
txdata
[
0
],
frame_length_complex_samples
,
1
,
1
);
///////////
///////////
////////////////////////////////////////////////////
////////////////////////////////////////////////////
...
@@ -616,7 +617,8 @@ int main(int argc, char **argv)
...
@@ -616,7 +617,8 @@ int main(int argc, char **argv)
//----------------------------------------------------------
//----------------------------------------------------------
phy_procedures_gNB_common_RX
(
gNB
,
frame
,
slot
);
phy_procedures_gNB_common_RX
(
gNB
,
frame
,
slot
);
//LOG_M("rxsigF0.m","rxsF0",gNB->common_vars.rxdataF[0],frame_length_complex_samples_no_prefix,1,1);
if
(
number_of_frames
==
1
)
LOG_M
(
"rxsigF0.m"
,
"rxsF0"
,
gNB
->
common_vars
.
rxdataF
[
0
],
frame_length_complex_samples_no_prefix
,
1
,
1
);
phy_procedures_gNB_uespec_RX
(
gNB
,
frame
,
slot
);
phy_procedures_gNB_uespec_RX
(
gNB
,
frame
,
slot
);
////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////
...
...
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @
00f0e0cc
...
@@ -313,27 +313,29 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -313,27 +313,29 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
sub_frame_t
slot_rxP
,
sub_frame_t
slot_rxP
,
frame_t
frame_txP
,
frame_t
frame_txP
,
sub_frame_t
slot_txP
){
sub_frame_t
slot_txP
){
//printf("gNB_dlsch_ulsch_scheduler frameRX %d slotRX %d frameTX %d slotTX %d\n",frame_rxP,slot_rxP,frame_txP,slot_txP);
protocol_ctxt_t
ctxt
;
protocol_ctxt_t
ctxt
;
int
CC_id
;
int
CC_id
;
NR_COMMON_channels_t
*
cc
=
RC
.
nrmac
[
module_idP
]
->
common_channels
;
NR_COMMON_channels_t
*
cc
=
RC
.
nrmac
[
module_idP
]
->
common_channels
;
//nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config = NULL;
//nfapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config = NULL;
start_meas
(
&
RC
.
nrmac
[
module_idP
]
->
eNB_scheduler
);
start_meas
(
&
RC
.
nrmac
[
module_idP
]
->
eNB_scheduler
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER
,
VCD_FUNCTION_IN
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER
,
VCD_FUNCTION_IN
);
pdcp_run
(
&
ctxt
);
//rrc_rx_tx(&ctxt, CC_id);
// Check if there are downlink symbols in the slot, if not return, no scheduling opportunities
if
(
is_nr_DL_slot
(
cc
->
ServingCellConfigCommon
,
slot_txP
)
==
0
)
return
;
RC
.
nrmac
[
module_idP
]
->
frame
=
frame_rxP
;
RC
.
nrmac
[
module_idP
]
->
frame
=
frame_rxP
;
RC
.
nrmac
[
module_idP
]
->
slot
=
slot_rxP
;
RC
.
nrmac
[
module_idP
]
->
slot
=
slot_rxP
;
// Check if there are downlink symbols in the slot,
if
(
is_nr_DL_slot
(
cc
->
ServingCellConfigCommon
,
slot_txP
))
{
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
1
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
memset
(
RC
.
nrmac
[
module_idP
]
->
cce_list
[
1
][
0
],
0
,
MAX_NUM_CCE
*
sizeof
(
int
));
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
for
(
CC_id
=
0
;
CC_id
<
MAX_NUM_CCs
;
CC_id
++
)
{
//mbsfn_status[CC_id] = 0;
//mbsfn_status[CC_id] = 0;
...
@@ -361,33 +363,31 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
...
@@ -361,33 +363,31 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
*/
*/
PROTOCOL_CTXT_SET_BY_MODULE_ID
(
&
ctxt
,
module_idP
,
ENB_FLAG_YES
,
NOT_A_RNTI
,
frame_txP
,
slot_txP
,
module_idP
);
PROTOCOL_CTXT_SET_BY_MODULE_ID
(
&
ctxt
,
module_idP
,
ENB_FLAG_YES
,
NOT_A_RNTI
,
frame_txP
,
slot_txP
,
module_idP
);
pdcp_run
(
&
ctxt
);
//rrc_rx_tx(&ctxt, CC_id);
// This schedules MIB
// This schedules MIB
if
((
slot_txP
==
0
)
&&
(
frame_txP
&
7
)
==
0
){
if
((
slot_txP
==
0
)
&&
(
frame_txP
&
7
)
==
0
){
schedule_nr_mib
(
module_idP
,
frame_txP
,
slot_txP
);
schedule_nr_mib
(
module_idP
,
frame_txP
,
slot_txP
);
}
}
// Phytest scheduling/ option not activated because of pending bug
// Phytest scheduling
// Phytest scheduling
if
(
phy_test
&&
slot_txP
==
1
){
if
(
slot_rxP
==
2
){
nr_schedule_uss_ulsch_phytest
(
module_idP
,
frame_rxP
,
slot_rxP
);
}
if
(
slot_txP
==
1
){
nr_schedule_uss_dlsch_phytest
(
module_idP
,
frame_txP
,
slot_txP
,
NULL
);
nr_schedule_uss_dlsch_phytest
(
module_idP
,
frame_txP
,
slot_txP
,
NULL
);
}
}
/*
/*
// Allocate CCEs for good after scheduling is done
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
allocate_CCEs(module_idP, CC_id, subframeP, 0);
*/
*/
}
//is_nr_DL_slot
if
(
is_nr_UL_slot
(
cc
->
ServingCellConfigCommon
,
slot_rxP
))
{
if
(
phy_test
&&
slot_rxP
==
8
){
nr_schedule_uss_ulsch_phytest
(
module_idP
,
frame_rxP
,
slot_rxP
);
}
}
stop_meas
(
&
RC
.
nrmac
[
module_idP
]
->
eNB_scheduler
);
stop_meas
(
&
RC
.
nrmac
[
module_idP
]
->
eNB_scheduler
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER
,
VCD_FUNCTION_OUT
);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(
VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER
,
VCD_FUNCTION_OUT
);
...
...
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
View file @
00f0e0cc
...
@@ -285,8 +285,10 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
...
@@ -285,8 +285,10 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
sched_info
->
UL_dci_req
=
&
mac
->
UL_dci_req
[
CC_id
];
sched_info
->
UL_dci_req
=
&
mac
->
UL_dci_req
[
CC_id
];
if
((
mac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
->
tdd_UL_DL_ConfigurationCommon
==
NULL
)
||
if
((
mac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
->
tdd_UL_DL_ConfigurationCommon
==
NULL
)
||
(
is_nr_UL_slot
(
mac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
,(
sched_info
->
slot
+
sf_ahead
)
%
spf
)
>
0
))
(
is_nr_UL_slot
(
mac
->
common_channels
[
CC_id
].
ServingCellConfigCommon
,
UL_info
->
slot
)
>
0
))
{
//printf("NR_UL_indication: this is an UL slot. UL_info: frame %d, slot %d. UL_tti_req: frame %d, slot %d\n",UL_info->frame,UL_info->slot,mac->UL_tti_req[CC_id].SFN,mac->UL_tti_req[CC_id].Slot);
sched_info
->
UL_tti_req
=
&
mac
->
UL_tti_req
[
CC_id
];
sched_info
->
UL_tti_req
=
&
mac
->
UL_tti_req
[
CC_id
];
}
else
else
sched_info
->
UL_tti_req
=
NULL
;
sched_info
->
UL_tti_req
=
NULL
;
...
...
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.217PRB.usrpn300.conf
View file @
00f0e0cc
...
@@ -251,13 +251,21 @@ THREAD_STRUCT = (
...
@@ -251,13 +251,21 @@ THREAD_STRUCT = (
}
}
);
);
log_config
:
#rfsimulator :
#{
# serveraddr = "server";
# serverport = "4043";
# options = ("chanmod");
# modelname = "AWGN";
#};
log_config
:
{
{
global_log_level
=
"info"
;
global_log_level
=
"info"
;
global_log_verbosity
=
"medium"
;
global_log_verbosity
=
"medium"
;
hw_log_level
=
"info"
;
hw_log_level
=
"info"
;
hw_log_verbosity
=
"medium"
;
hw_log_verbosity
=
"medium"
;
phy_log_level
=
"
info
"
;
phy_log_level
=
"
debug
"
;
phy_log_verbosity
=
"medium"
;
phy_log_verbosity
=
"medium"
;
mac_log_level
=
"info"
;
mac_log_level
=
"info"
;
mac_log_verbosity
=
"high"
;
mac_log_verbosity
=
"high"
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment