Commit 10bd164a authored by Robert Schmidt's avatar Robert Schmidt

UL PP: Remove UE sorting and slicing

parent 9b4725ad
develop 1 128-ues 256_QAM_demod LTE_TRX_on_single_port NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguration_FR2 NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq_b NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port2 NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_ue_dlsch_dmrs_cdm PUSCH_TA_update RA_CI_test UE_DL_DCI_hotfix bch-fixes-bitmap benetel_5g_prach_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_phase_rotation benetel_phase_rotation_old bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-x2-SgNBAdditionRequest bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-rd-july-improvements ci-test ci-ul-iperf-from-trf-container clean-5G-scope-round2 cleanup_softmodem_main constant_power develop-SA-RA develop-SnT develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w19 develop_stable dfts_alternatives dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel dongzhanyi-zte-develop dongzhanyi-zte-develop2 fapi_for_dmrs_and_ptrs feature-4g-sched feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-itti-segv fix-softmodem-restart fix-warnings fix_NR_DLUL_PF fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-repair-mme-mgmt fujitsu_lte_contribution fujitsu_lte_contribution-128 gnb-only-test harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation improve_nr_modulation improve_ue_stability integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 inter-RRU-final inter-RRU-oairu inter-rru-UE itti-enhancement ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-offload ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nrUE nrUE-hs nrUE-upper-layer nr_bsr nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_fdd_if_fix nr_polar_decoder_improvement nr_prach_fr2 nr_pucch2 nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark polar8 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode 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......@@ -86,31 +86,6 @@ add_ue_dlsch_info(module_id_t module_idP,
return;
}
//------------------------------------------------------------------------------
int
schedule_next_dlue(module_id_t module_idP,
int CC_id,
sub_frame_t subframeP)
//------------------------------------------------------------------------------
{
int next_ue;
UE_list_t *UE_list = &RC.mac[module_idP]->UE_info.list;
for (next_ue = UE_list->head; next_ue >= 0; next_ue = UE_list->next[next_ue]) {
if (eNB_dlsch_info[module_idP][CC_id][next_ue].status == S_DL_WAITING) {
return next_ue;
}
}
for (next_ue = UE_list->head; next_ue >= 0; next_ue = UE_list->next[next_ue]) {
if (eNB_dlsch_info[module_idP][CC_id][next_ue].status == S_DL_BUFFERED) {
eNB_dlsch_info[module_idP][CC_id][next_ue].status = S_DL_WAITING;
}
}
return (-1); //next_ue;
}
//------------------------------------------------------------------------------
int
generate_dlsch_header(unsigned char *mac_header,
......@@ -2631,37 +2606,3 @@ schedule_PCH(module_id_t module_idP,
stop_meas(&eNB->schedule_pch);
return;
}
static int
slice_priority_compare(const void *_a,
const void *_b,
void *_c) {
const int slice_id1 = *(const int *) _a;
const int slice_id2 = *(const int *) _b;
const module_id_t Mod_id = *(int *) _c;
const slice_info_t *sli = &RC.mac[Mod_id]->slice_info;
if (sli->dl[slice_id1].prio > sli->dl[slice_id2].prio) {
return -1;
}
return 1;
}
void
slice_priority_sort(module_id_t Mod_id,
int slice_list[MAX_NUM_SLICES]) {
int i;
int n_dl = RC.mac[Mod_id]->slice_info.n_dl;
for (i = 0; i < n_dl; i++) {
slice_list[i] = i;
}
qsort_r(slice_list,
n_dl,
sizeof(int),
slice_priority_compare,
&Mod_id);
return;
}
......@@ -5043,13 +5043,3 @@ harq_indication(module_id_t mod_idP,
return;
}
// Flexran Slicing functions
//------------------------------------------------------------------------------
uint16_t
nb_rbs_allowed_slice(float rb_percentage,
int total_rbs)
//------------------------------------------------------------------------------
{
return (uint16_t) floor(rb_percentage * total_rbs);
}
......@@ -448,14 +448,6 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP, int CC_id,
module_id_t schedule_next_ulue(module_id_t module_idP, int UE_id,
sub_frame_t subframe);
/** \brief Round-robin scheduler for DLSCH traffic.
@param Mod_id Instance ID for eNB
@param subframe Subframe number on which to act
@returns UE index that is to be scheduled if needed/room
*/
int schedule_next_dlue(module_id_t module_idP, int CC_id,
sub_frame_t subframe);
/* \brief Allocates a set of PRBS for a particular UE. This is a simple function for the moment, later it should process frequency-domain CQI information and/or PMI information. Currently it just returns the first PRBS that are available in the subframe based on the number requested.
@param UE_id Index of UE on which to act
@param nb_rb Number of PRBs allocated to UE by scheduler
......@@ -1218,10 +1210,6 @@ void pre_scd_nb_rbs_required( module_id_t module_idP,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX]);
#endif
/* Slice related functions */
uint16_t nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
int ue_ul_slice_membership(module_id_t mod_id, int UE_id, int slice_idx);
/* DRX Configuration */
/* Configure local DRX timers and thresholds in UE context, following the drx_configuration input */
void eNB_Config_Local_DRX(instance_t Mod_id, rrc_mac_drx_config_req_t *rrc_mac_drx_config_req);
......
......@@ -196,12 +196,6 @@ int round_robin_dl(module_id_t Mod_id,
return n_rbg_sched;
}
void
sort_ue_ul(module_id_t module_idP,
int sched_frameP,
sub_frame_t sched_subframeP,
rnti_t *rntiTable);
// This function stores the downlink buffer for all the logical channels
void
store_dlsch_buffer(module_id_t Mod_id,
......@@ -271,31 +265,6 @@ store_dlsch_buffer(module_id_t Mod_id,
}
}
int
maxround_ul(module_id_t Mod_id, uint16_t rnti, int sched_frame,
sub_frame_t sched_subframe) {
uint8_t round, round_max = 0, UE_id;
int CC_id, harq_pid;
UE_info_t *UE_info = &RC.mac[Mod_id]->UE_info;
COMMON_channels_t *cc;
for (CC_id = 0; CC_id < RC.nb_mac_CC[Mod_id]; CC_id++) {
cc = &RC.mac[Mod_id]->common_channels[CC_id];
UE_id = find_UE_id(Mod_id, rnti);
if(UE_id == -1)
continue;
harq_pid = subframe2harqpid(cc, sched_frame, sched_subframe);
round = UE_info->UE_sched_ctrl[UE_id].round_UL[CC_id][harq_pid];
if (round > round_max) {
round_max = round;
}
}
return round_max;
}
// This function assigns pre-available RBS to each UE in specified sub-bands before scheduling is done
void
......@@ -433,11 +402,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
UE_info_t *UE_info = &eNB->UE_info;
const int N_RB_UL = to_prb(eNB->common_channels[CC_id].ul_Bandwidth);
uint16_t available_rbs = N_RB_UL - 2 * first_rb[CC_id]; // top and bottom // - UE_info->first_rb_offset[CC_id];
rnti_t rntiTable[MAX_MOBILES_PER_ENB];
// sort ues
LOG_D(MAC, "In ulsch_preprocessor: sort ue \n");
sort_ue_ul(module_idP, sched_frameP, sched_subframeP, rntiTable);
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
LOG_D(MAC, "In ulsch_preprocessor: assign max mcs min rb\n");
assign_max_mcs_min_rb(module_idP, CC_id, frameP, subframeP, first_rb);
......@@ -474,10 +439,9 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
nb_allocated_rbs[UE_id] = cmin(UE_info->UE_template[CC_id][UE_id].pre_allocated_nb_rb_ul, average_rbs_per_user);
total_allocated_rbs += nb_allocated_rbs[UE_id];
LOG_D(MAC, "In ulsch_preprocessor: assigning %d RBs for UE %d/%x CCid %d, harq_pid %d\n",
LOG_D(MAC, "In ulsch_preprocessor: assigning %d RBs for UE %d CCid %d, harq_pid %d\n",
nb_allocated_rbs[UE_id],
UE_id,
rntiTable[UE_id],
CC_id,
harq_pid);
}
......@@ -607,120 +571,3 @@ assign_max_mcs_min_rb(module_id_t module_idP,
}
}
}
struct sort_ue_ul_params {
int module_idP;
int sched_frameP;
int sched_subframeP;
};
static int ue_ul_compare(const void *_a, const void *_b, void *_params) {
struct sort_ue_ul_params *params = _params;
UE_info_t *UE_info = &RC.mac[params->module_idP]->UE_info;
int UE_id1 = *(const int *) _a;
int UE_id2 = *(const int *) _b;
int rnti1 = UE_RNTI(params->module_idP, UE_id1);
int pCCid1 = UE_PCCID(params->module_idP, UE_id1);
int round1 = maxround_ul(params->module_idP, rnti1, params->sched_frameP,
params->sched_subframeP);
int rnti2 = UE_RNTI(params->module_idP, UE_id2);
int pCCid2 = UE_PCCID(params->module_idP, UE_id2);
int round2 = maxround_ul(params->module_idP, rnti2, params->sched_frameP,
params->sched_subframeP);
if (round1 > round2)
return -1;
if (round1 < round2)
return 1;
if (UE_info->UE_template[pCCid1][UE_id1].ul_buffer_info[LCGID0] >
UE_info->UE_template[pCCid2][UE_id2].ul_buffer_info[LCGID0])
return -1;
if (UE_info->UE_template[pCCid1][UE_id1].ul_buffer_info[LCGID0] <
UE_info->UE_template[pCCid2][UE_id2].ul_buffer_info[LCGID0])
return 1;
int bytes_to_schedule1 = UE_info->UE_template[pCCid1][UE_id1].estimated_ul_buffer - UE_info->UE_template[pCCid1][UE_id1].scheduled_ul_bytes;
if (bytes_to_schedule1 < 0) bytes_to_schedule1 = 0;
int bytes_to_schedule2 = UE_info->UE_template[pCCid2][UE_id2].estimated_ul_buffer - UE_info->UE_template[pCCid2][UE_id2].scheduled_ul_bytes;
if (bytes_to_schedule2 < 0) bytes_to_schedule2 = 0;
if (bytes_to_schedule1 > bytes_to_schedule2)
return -1;
if (bytes_to_schedule1 < bytes_to_schedule2)
return 1;
if (UE_info->UE_template[pCCid1][UE_id1].pre_assigned_mcs_ul >
UE_info->UE_template[pCCid2][UE_id2].pre_assigned_mcs_ul)
return -1;
if (UE_info->UE_template[pCCid1][UE_id1].pre_assigned_mcs_ul <
UE_info->UE_template[pCCid2][UE_id2].pre_assigned_mcs_ul)
return 1;
if (UE_info->UE_sched_ctrl[UE_id1].cqi_req_timer >
UE_info->UE_sched_ctrl[UE_id2].cqi_req_timer)
return -1;
if (UE_info->UE_sched_ctrl[UE_id1].cqi_req_timer <
UE_info->UE_sched_ctrl[UE_id2].cqi_req_timer)
return 1;
return 0;
}
//-----------------------------------------------------------------------------
/*
* This function sorts the UEs in order, depending on their ulsch buffer and CQI
*/
void sort_ue_ul(module_id_t module_idP,
int sched_frameP,
sub_frame_t sched_subframeP,
rnti_t *rntiTable)
//-----------------------------------------------------------------------------
{
int list[MAX_MOBILES_PER_ENB];
int list_size = 0;
struct sort_ue_ul_params params = { module_idP, sched_frameP, sched_subframeP };
UE_info_t *UE_info = &RC.mac[module_idP]->UE_info;
UE_sched_ctrl_t *UE_scheduling_control = NULL;
for (int i = 0; i < MAX_MOBILES_PER_ENB; i++) {
UE_scheduling_control = &(UE_info->UE_sched_ctrl[i]);
/* Check CDRX configuration and if UE is in active time for this subframe */
if (UE_scheduling_control->cdrx_configured == TRUE) {
if (UE_scheduling_control->in_active_time == FALSE) {
continue;
}
}
rntiTable[i] = UE_RNTI(module_idP, i);
// Valid element and is not the actual CC_id in the list
if (UE_info->active[i] == TRUE &&
rntiTable[i] != NOT_A_RNTI &&
UE_info->UE_sched_ctrl[i].ul_out_of_sync != 1) {
list[list_size++] = i; // Add to list
}
}
qsort_r(list, list_size, sizeof(int), ue_ul_compare, &params);
if (list_size) { // At mimimum one list element
for (int i = 0; i < list_size - 1; i++) {
UE_info->list.next[list[i]] = list[i + 1];
}
UE_info->list.next[list[list_size - 1]] = -1;
UE_info->list.head = list[0];
} else { // No element
UE_info->list.head = -1;
}
}
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