Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG-RAN
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
promise
OpenXG-RAN
Commits
4b77dda6
Commit
4b77dda6
authored
Sep 30, 2016
by
Raymond Knopp
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
some changes in pucchsim to remove warnings. sanity check in turbo_decoder.
parent
cd22e926
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
24 additions
and
9 deletions
+24
-9
openair1/PHY/CODING/3gpplte_turbo_decoder_sse_8bit.c
openair1/PHY/CODING/3gpplte_turbo_decoder_sse_8bit.c
+5
-0
openair1/PHY/LTE_TRANSPORT/pucch.c
openair1/PHY/LTE_TRANSPORT/pucch.c
+5
-2
openair1/SIMULATION/LTE_PHY/pucchsim.c
openair1/SIMULATION/LTE_PHY/pucchsim.c
+14
-7
No files found.
openair1/PHY/CODING/3gpplte_turbo_decoder_sse_8bit.c
View file @
4b77dda6
...
@@ -493,6 +493,11 @@ void compute_beta8(llr_t* alpha,llr_t* beta,llr_t *m_11,llr_t* m_10,unsigned sho
...
@@ -493,6 +493,11 @@ void compute_beta8(llr_t* alpha,llr_t* beta,llr_t *m_11,llr_t* m_10,unsigned sho
#endif
#endif
if
(
frame_length
>
6143
)
{
LOG_E
(
PHY
,
"compute_beta: frame_length %d
\n
"
,
frame_length
);
return
;
}
// we are supposed to run compute_alpha just before compute_beta
// we are supposed to run compute_alpha just before compute_beta
// so the initial states of backward computation can be set from last value of alpha states (forward computation)
// so the initial states of backward computation can be set from last value of alpha states (forward computation)
...
...
openair1/PHY/LTE_TRANSPORT/pucch.c
View file @
4b77dda6
...
@@ -47,7 +47,7 @@
...
@@ -47,7 +47,7 @@
#include "T.h"
#include "T.h"
//uint8_t ncs_cell[20][7];
//uint8_t ncs_cell[20][7];
//
#define DEBUG_PUCCH_TX
#define DEBUG_PUCCH_TX
//#define DEBUG_PUCCH_RX
//#define DEBUG_PUCCH_RX
int16_t
cfo_pucch_np
[
24
*
7
]
=
{
20787
,
-
25330
,
27244
,
-
18205
,
31356
,
-
9512
,
32767
,
0
,
31356
,
9511
,
27244
,
18204
,
20787
,
25329
,
int16_t
cfo_pucch_np
[
24
*
7
]
=
{
20787
,
-
25330
,
27244
,
-
18205
,
31356
,
-
9512
,
32767
,
0
,
31356
,
9511
,
27244
,
18204
,
20787
,
25329
,
...
@@ -190,6 +190,9 @@ void generate_pucch1x(int32_t **txdataF,
...
@@ -190,6 +190,9 @@ void generate_pucch1x(int32_t **txdataF,
else
{
else
{
d
=
(
frame_parms
->
Ncp
==
0
)
?
2
:
0
;
d
=
(
frame_parms
->
Ncp
==
0
)
?
2
:
0
;
h
=
(
nprime0
+
d
)
%
(
c
*
Nprime_div_deltaPUCCH_Shift
);
h
=
(
nprime0
+
d
)
%
(
c
*
Nprime_div_deltaPUCCH_Shift
);
#ifdef DEBUG_PUCCH_TX
printf
(
"[PHY] PUCCH: h %d, d %d
\n
"
,
h
,
d
);
#endif
nprime1
=
(
h
/
c
)
+
(
h
%
c
)
*
Nprime_div_deltaPUCCH_Shift
;
nprime1
=
(
h
/
c
)
+
(
h
%
c
)
*
Nprime_div_deltaPUCCH_Shift
;
}
}
...
@@ -208,7 +211,7 @@ void generate_pucch1x(int32_t **txdataF,
...
@@ -208,7 +211,7 @@ void generate_pucch1x(int32_t **txdataF,
n_oc1
<<=
1
;
n_oc1
<<=
1
;
#ifdef DEBUG_PUCCH_TX
#ifdef DEBUG_PUCCH_TX
printf
(
"[PHY] PUCCH: noc0 %d noc1
1
%d
\n
"
,
n_oc0
,
n_oc1
);
printf
(
"[PHY] PUCCH: noc0 %d noc1 %d
\n
"
,
n_oc0
,
n_oc1
);
#endif
#endif
nprime
=
nprime0
;
nprime
=
nprime0
;
...
...
openair1/SIMULATION/LTE_PHY/pucchsim.c
View file @
4b77dda6
...
@@ -66,7 +66,11 @@ int main(int argc, char **argv)
...
@@ -66,7 +66,11 @@ int main(int argc, char **argv)
uint8_t
snr1set
=
0
;
uint8_t
snr1set
=
0
;
//mod_sym_t **txdataF;
//mod_sym_t **txdataF;
int
**
txdata
;
int
**
txdata
;
double
s_re
[
2
][
30720
],
s_im
[
2
][
30720
],
r_re
[
2
][
30720
],
r_im
[
2
][
30720
];
double
s_re0
[
30720
],
s_re1
[
30720
],
s_im0
[
30720
],
s_im1
[
30720
],
r_re0
[
30720
],
r_im0
[
30720
],
r_re1
[
30720
],
r_im1
[
30720
];
double
*
s_re
[
2
]
=
{
s_re0
,
s_re1
};
double
*
s_im
[
2
]
=
{
s_im0
,
s_im1
};
double
*
r_re
[
2
]
=
{
r_re0
,
r_re1
};
double
*
r_im
[
2
]
=
{
r_im0
,
r_im1
};
double
ricean_factor
=
0
.
0000005
,
iqim
=
0
.
0
;
double
ricean_factor
=
0
.
0000005
,
iqim
=
0
.
0
;
int
trial
,
n_trials
,
ntrials
=
1
,
n_errors
;
int
trial
,
n_trials
,
ntrials
=
1
,
n_errors
;
...
@@ -352,12 +356,15 @@ int main(int argc, char **argv)
...
@@ -352,12 +356,15 @@ int main(int argc, char **argv)
init_ncs_cell
(
&
UE
->
frame_parms
,
UE
->
ncs_cell
);
init_ncs_cell
(
&
UE
->
frame_parms
,
UE
->
ncs_cell
);
eNB
->
frame_parms
.
pucch_config_common
.
deltaPUCCH_Shift
=
1
;
init_ul_hopping
(
&
eNB
->
frame_parms
);
eNB
->
frame_parms
.
pucch_config_common
.
nRB_CQI
=
0
;
init_ul_hopping
(
&
UE
->
frame_parms
);
eNB
->
frame_parms
.
pucch_config_common
.
nCS_AN
=
0
;
UE
->
frame_parms
.
pucch_config_common
.
deltaPUCCH_Shift
=
1
;
eNB
->
frame_parms
.
pucch_config_common
.
deltaPUCCH_Shift
=
2
;
UE
->
frame_parms
.
pucch_config_common
.
nRB_CQI
=
0
;
eNB
->
frame_parms
.
pucch_config_common
.
nRB_CQI
=
4
;
UE
->
frame_parms
.
pucch_config_common
.
nCS_AN
=
0
;
eNB
->
frame_parms
.
pucch_config_common
.
nCS_AN
=
6
;
UE
->
frame_parms
.
pucch_config_common
.
deltaPUCCH_Shift
=
2
;
UE
->
frame_parms
.
pucch_config_common
.
nRB_CQI
=
4
;
UE
->
frame_parms
.
pucch_config_common
.
nCS_AN
=
6
;
pucch_payload
=
0
;
pucch_payload
=
0
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment