Make dci_pdu in PDCCH PDU an array

SCF222 says that dci_pdu in PDCCH PDU
(nfapi_nr_dl_tti_pdcch_pdu_rel15_t) should be an array, and not its
members.

nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h

@@ -630,30 +630,30 @@ typedef struct {
 
 typedef struct {
   // The RNTI used for identifying the UE when receiving the PDU Value: 1 -> 65535.
-  uint16_t RNTI[MAX_DCI_CORESET];
+  uint16_t RNTI;
   // For a UE-specific search space it equals the higher-layer parameter PDCCH-DMRSScrambling-ID if configured,
   // otherwise it should be set to the phy cell ID. [TS38.211, sec 7.3.2.3] Value: 0->65535
-  uint16_t ScramblingId[MAX_DCI_CORESET];
+  uint16_t ScramblingId;
   // For a UE-specific search space where PDCCH-DMRSScrambling- ID is configured This param equals the CRNTI.
   // Otherwise, it should be set to 0. [TS38.211, sec 7.3.2.3] Value: 0 -> 65535 
-  uint16_t ScramblingRNTI[MAX_DCI_CORESET];
+  uint16_t ScramblingRNTI;
   // CCE start Index used to send the DCI Value: 0->135
-  uint8_t CceIndex[MAX_DCI_CORESET];
+  uint8_t CceIndex;
   // Aggregation level used [TS38.211, sec 7.3.2.1] Value: 1,2,4,8,16
-  uint8_t AggregationLevel[MAX_DCI_CORESET];
+  uint8_t AggregationLevel;
   // Precoding and Beamforming structure See Table 3-43
-  nfapi_nr_tx_precoding_and_beamforming_t precodingAndBeamforming[MAX_DCI_CORESET];
+  nfapi_nr_tx_precoding_and_beamforming_t precodingAndBeamforming;
   // PDCCH power value used for PDCCH Format 1_0 with CRC scrambled by SI-RNTI, PI-RNTI or RA-RNTI.
   // This is ratio of SSB/PBCH EPRE to PDCCH and PDCCH DMRS EPRE [TS38.213, sec 4.1]
   // Value :0->17 Report title: 5G FAPI: PHY API Specification Issue date: 29 June 2019 Version: 222.10.17 68 Field Type Description representing -8 to 8 dB in 1dB steps
-  uint8_t beta_PDCCH_1_0[MAX_DCI_CORESET];
+  uint8_t beta_PDCCH_1_0;
   // PDCCH power value used for all other PDCCH Formats.
   // This is ratio of SSB/PBCH block EPRE to PDCCH and PDCCH DMRS EPRE [TS38.214, sec 4.1] Values: 0: -3dB,1: 0dB,2: 3dB,3: 6dB
-  uint8_t powerControlOffsetSS[MAX_DCI_CORESET];
+  uint8_t powerControlOffsetSS;
   // The total DCI length (in bits) including padding bits [TS38.212 sec 7.3.1] Range 0->DCI_PAYLOAD_BYTE_LEN*8
-  uint16_t PayloadSizeBits[MAX_DCI_CORESET];
+  uint16_t PayloadSizeBits;
   // DCI payload, where the actual size is defined by PayloadSizeBits. The bit order is as following bit0-bit7 are mapped to first byte of MSB - LSB
-  uint8_t Payload[MAX_DCI_CORESET][DCI_PAYLOAD_BYTE_LEN]; 
+  uint8_t Payload[DCI_PAYLOAD_BYTE_LEN];
 
 } nfapi_nr_dl_dci_pdu_t;
 
@@ -698,7 +698,7 @@ typedef struct {
   ///Number of DCIs in this CORESET.Value: 0->MaxDciPerSlot
   uint16_t numDlDci;
   ///DL DCI PDU
-  nfapi_nr_dl_dci_pdu_t dci_pdu;
+  nfapi_nr_dl_dci_pdu_t dci_pdu[MAX_DCI_CORESET];
 }  nfapi_nr_dl_tti_pdcch_pdu_rel15_t;
 
 typedef struct {

openair1/PHY/NR_TRANSPORT/nr_dci.c

@@ -98,6 +98,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
      * in frequency: the first subcarrier is obtained by adding the first CRB overlapping the SSB and the rb_offset for coreset 0
      * or the rb_offset for other coresets
      * in time: by its first slot and its first symbol*/
+    const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
 
     cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
     cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
@@ -108,8 +109,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
     AssertFatal(pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED,
 		"Interleaved CCE REG MAPPING not supported\n");
     uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)?
-      (n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
-    uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
+      (n_rb*6) : (dci_pdu->AggregationLevel*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
+    uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
     LOG_D(PHY, "DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d)\n", dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType);
     dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
       
@@ -131,19 +132,19 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
     // CRC attachment + Scrambling + Channel coding + Rate matching
     uint32_t encoder_output[NR_MAX_DCI_SIZE_DWORD];
 
-    uint16_t n_RNTI = pdcch_pdu_rel15->dci_pdu.RNTI[d];
-    uint16_t Nid    = pdcch_pdu_rel15->dci_pdu.ScramblingId[d];
-    uint16_t scrambling_RNTI = pdcch_pdu_rel15->dci_pdu.ScramblingRNTI[d];
+    uint16_t n_RNTI = dci_pdu->RNTI;
+    uint16_t Nid    = dci_pdu->ScramblingId;
+    uint16_t scrambling_RNTI = dci_pdu->ScramblingRNTI;
 
     t_nrPolar_params *currentPtr = nr_polar_params(NR_POLAR_DCI_MESSAGE_TYPE, 
-						   pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d], 
-						   pdcch_pdu_rel15->dci_pdu.AggregationLevel[d],
+						   dci_pdu->PayloadSizeBits,
+						   dci_pdu->AggregationLevel,
 						   0,NULL);
-    polar_encoder_fast((uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[d], (void*)encoder_output, n_RNTI,1,currentPtr);
+    polar_encoder_fast((uint64_t*)dci_pdu->Payload, (void*)encoder_output, n_RNTI,1,currentPtr);
 #ifdef DEBUG_CHANNEL_CODING
-    printf("polar rnti %x,length %d, L %d\n",n_RNTI, pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d],pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]);
+    printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]);
     printf("DCI PDU: [0]->0x%lx \t [1]->0x%lx\n",
-	   ((uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[d])[0], ((uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[d])[1]);
+	   ((uint64_t*)dci_pdu->Payload)[0], ((uint64_t*)dci_pdu->Payload)[1]);
     printf("Encoded Payload (length:%d dwords):\n", encoded_length>>5);
     
     for (int i=0; i<encoded_length>>5; i++)
@@ -176,8 +177,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
       cset_start_sc -= frame_parms.ofdm_symbol_size;
     
     /*Reorder REG list for a freq first mapping*/
-    uint8_t reg_idx0 = pdcch_pdu_rel15->dci_pdu.CceIndex[d]*NR_NB_REG_PER_CCE;
-    uint8_t nb_regs = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*NR_NB_REG_PER_CCE;
+    uint8_t reg_idx0 = dci_pdu->CceIndex*NR_NB_REG_PER_CCE;
+    uint8_t nb_regs = dci_pdu->AggregationLevel*NR_NB_REG_PER_CCE;
 
     /*Mapping the encoded DCI along with the DMRS */
     for (int reg_idx=reg_idx0; reg_idx<(nb_regs+reg_idx0); reg_idx++) {

openair1/PHY/NR_TRANSPORT/nr_dci_tools.c

@@ -142,7 +142,7 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m,  nfapi_nr_dl_tti_pdcch_pdu_r
   AssertFatal(N_reg > 0,"N_reg cannot be 0\n");
 
   for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
-    int  L = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d];
+    int  L = pdcch_pdu_rel15->dci_pdu[d].AggregationLevel;
 
     if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1)
       AssertFatal(L>=4, "Invalid aggregation level for SIB1 configured PDCCH %d\n", L);
@@ -153,10 +153,10 @@ void nr_fill_cce_list(PHY_VARS_gNB *gNB, uint8_t m,  nfapi_nr_dl_tti_pdcch_pdu_r
       C = N_reg/(bsize*R);
     }
     
-    LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->dci_pdu.CceIndex[d]);
+    LOG_D(PHY, "CCE list generation for candidate %d: bundle size %d ilv size %d CceIndex %d\n", m, bsize, R, pdcch_pdu_rel15->dci_pdu[d].CceIndex);
     for (uint8_t cce_idx=0; cce_idx<L; cce_idx++) {
       cce = &gNB->cce_list[d][cce_idx];
-      cce->cce_idx = pdcch_pdu_rel15->dci_pdu.CceIndex[d] + cce_idx;
+      cce->cce_idx = pdcch_pdu_rel15->dci_pdu[d].CceIndex + cce_idx;
       LOG_D(PHY, "cce_idx %d\n", cce->cce_idx);
       
       if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
@@ -236,11 +236,11 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
 
   for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
 
-    //uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[i];
+    //uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu[i].Payload;
 
-    int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->dci_pdu.RNTI[i],gNB,SEARCH_EXIST_OR_FREE);
+    int dlsch_id = find_nr_dlsch(pdcch_pdu_rel15->dci_pdu[i].RNTI,gNB,SEARCH_EXIST_OR_FREE);
     if( (dlsch_id<0) || (dlsch_id>=NUMBER_OF_NR_DLSCH_MAX) ){
-      LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",(unsigned int)pdcch_pdu_rel15->dci_pdu.RNTI[i],dlsch_id);
+      LOG_E(PHY,"illegal dlsch_id found!!! rnti %04x dlsch_id %d\n",(unsigned int)pdcch_pdu_rel15->dci_pdu[i].RNTI,dlsch_id);
       return;
     }
     
@@ -254,7 +254,7 @@ void nr_fill_dci(PHY_VARS_gNB *gNB,
 		"illegal harq_pid %d\n",harq_pid);
     
     dlsch->harq_mask                |= (1<<harq_pid);
-    dlsch->rnti                      = pdcch_pdu_rel15->dci_pdu.RNTI[i];
+    dlsch->rnti                      = pdcch_pdu_rel15->dci_pdu[i].RNTI;
     
     //    nr_fill_cce_list(gNB,0);  
     /*
@@ -300,7 +300,7 @@ void nr_fill_ul_dci(PHY_VARS_gNB *gNB,
 
   for (int i=0;i<pdcch_pdu_rel15->numDlDci;i++) {
 
-    //uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu.Payload[i];
+    //uint64_t *dci_pdu = (uint64_t*)pdcch_pdu_rel15->dci_pdu[i].Payload;
 
     // if there's no DL DCI then generate CCE list
     //    nr_fill_cce_list(gNB,0);  

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c

@@ -936,7 +936,7 @@ void nr_generate_Msg2(module_id_t module_idP,
     rnti_types[0] = NR_RNTI_RA;
 
     LOG_I(MAC, "[RAPROC] DCI params: rnti %d, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d  n_symb %d\n",
-      pdcch_pdu_rel15->dci_pdu.RNTI[0],
+      pdcch_pdu_rel15->dci_pdu[0].RNTI,
       rnti_types[0],
       dci_formats[0],
       (unsigned long long)pdcch_pdu_rel15->FreqDomainResource,

openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c

@@ -561,7 +561,7 @@ void config_uldci(NR_BWP_Uplink_t *ubwp,
         "%s() ULDCI type 0 payload: PDCCH CCEIndex %d, freq_alloc %d, "
         "time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n",
         __func__,
-        pdcch_pdu_rel15->dci_pdu.CceIndex[pdcch_pdu_rel15->numDlDci],
+        pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci].CceIndex,
         dci_pdu_rel15->frequency_domain_assignment.val,
         dci_pdu_rel15->time_domain_assignment.val,
         dci_pdu_rel15->frequency_hopping_flag.val,
@@ -631,25 +631,25 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
     //precoderGranularity
     pdcch_pdu->precoderGranularity = coreset->precoderGranularity;
 
-    pdcch_pdu->dci_pdu.RNTI[pdcch_pdu->numDlDci]=rnti;
+    pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].RNTI = rnti;
 
     if (coreset->pdcch_DMRS_ScramblingID != NULL &&
         ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) {
-      pdcch_pdu->dci_pdu.ScramblingId[pdcch_pdu->numDlDci] = *coreset->pdcch_DMRS_ScramblingID;
-      pdcch_pdu->dci_pdu.ScramblingRNTI[pdcch_pdu->numDlDci]=rnti;
+      pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].ScramblingId = *coreset->pdcch_DMRS_ScramblingID;
+      pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].ScramblingRNTI = rnti;
     }
     else {
-      pdcch_pdu->dci_pdu.ScramblingId[pdcch_pdu->numDlDci] = *scc->physCellId;
-      pdcch_pdu->dci_pdu.ScramblingRNTI[pdcch_pdu->numDlDci]=0;
+      pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].ScramblingId = *scc->physCellId;
+      pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].ScramblingRNTI = 0;
     }
 
-    pdcch_pdu->dci_pdu.AggregationLevel[pdcch_pdu->numDlDci] = aggregation_level;
-    pdcch_pdu->dci_pdu.CceIndex[pdcch_pdu->numDlDci] = CCEIndex;
+    pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].AggregationLevel = aggregation_level;
+    pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].CceIndex = CCEIndex;
 
     if (ss->searchSpaceType->choice.ue_Specific->dci_Formats==NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_0_And_1_0)
-      pdcch_pdu->dci_pdu.beta_PDCCH_1_0[pdcch_pdu->numDlDci]=0;
+      pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].beta_PDCCH_1_0 = 0;
 
-    pdcch_pdu->dci_pdu.powerControlOffsetSS[pdcch_pdu->numDlDci]=1;
+    pdcch_pdu->dci_pdu[pdcch_pdu->numDlDci].powerControlOffsetSS = 1;
     pdcch_pdu->numDlDci++;
   }
   else { // this is for InitialBWP
@@ -956,10 +956,10 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
 
   for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
 
-    uint64_t *dci_pdu = (uint64_t *)pdcch_pdu_rel15->dci_pdu.Payload[d];
+    uint64_t *dci_pdu = (uint64_t *)pdcch_pdu_rel15->dci_pdu[d].Payload;
     int dci_size = nr_dci_size(scc,secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],rnti_types[d],N_RB,bwp_id);
-    pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d] = dci_size;
-    AssertFatal(pdcch_pdu_rel15->dci_pdu.PayloadSizeBits[d]<=64, "DCI sizes above 64 bits not yet supported");
+    pdcch_pdu_rel15->dci_pdu[d].PayloadSizeBits = dci_size;
+    AssertFatal(pdcch_pdu_rel15->dci_pdu[d].PayloadSizeBits<=64, "DCI sizes above 64 bits not yet supported");
 
     if(dci_formats[d]==NR_DL_DCI_FORMAT_1_1 || dci_formats[d]==NR_UL_DCI_FORMAT_0_1)
       prepare_dci(secondaryCellGroup,&dci_pdu_rel15[d],dci_formats[d],bwp_id);