Skip to content

O
OpenXG-RAN
Commit a9eb51f1 authored by Raymond Knopp's avatar Raymond Knopp
Browse files
Options

prach.rxsigF allocation

parent b360afd0
Hide whitespace changes
Inline Side-by-side
Showing with 2 additions and 0 deletions
targets/RT/USER/lte-enb.c
View file @ a9eb51f1
...@@ -854,6 +854,8 @@ void init_eNB_afterRU() { ...@@ -854,6 +854,8 @@ void init_eNB_afterRU() {
AssertFatal(eNB->num_RU>0,"Number of RU attached to eNB %d is zero\n",eNB->Mod_id); AssertFatal(eNB->num_RU>0,"Number of RU attached to eNB %d is zero\n",eNB->Mod_id);
LOG_I(PHY,"Mapping RX ports from %d RUs to eNB %d\n",eNB->num_RU,eNB->Mod_id); LOG_I(PHY,"Mapping RX ports from %d RUs to eNB %d\n",eNB->num_RU,eNB->Mod_id);
eNB->frame_parms.nb_antennas_rx = 0; eNB->frame_parms.nb_antennas_rx = 0;
eNB->prach_vars.rxsigF = (int16_t*)malloc16(64*sizeof(int16_t*));
for (ru_id=0,aa=0;ru_id<eNB->num_RU;ru_id++) { for (ru_id=0,aa=0;ru_id<eNB->num_RU;ru_id++) {
eNB->frame_parms.nb_antennas_rx += eNB->RU_list[ru_id]->nb_rx; eNB->frame_parms.nb_antennas_rx += eNB->RU_list[ru_id]->nb_rx;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment