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Commit c990cbc8 authored by yilmazt's avatar yilmazt
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Added clean_gNB_ulsch, polartest fully working for all options and other minor warning removals.

parents b2add955 99c6c922
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Showing with 2333 additions and 5316 deletions
cmake_targets/CMakeLists.txt
View file @ c990cbc8
......@@ -2403,7 +2403,7 @@ add_executable(nr-uesoftmodem
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_DIR}/common/utils/threadPool/thread-pool.c
${OPENAIR_DIR}/executables//nr-uesoftmodem.c
${OPENAIR_DIR}/executables/nr-uesoftmodem.c
${OPENAIR_DIR}/executables/nr-ue.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
......@@ -2437,8 +2437,8 @@ add_executable(nr-uesoftmodem-nos1
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/nr-ue.c
${OPENAIR_TARGETS}/RT/USER/nr-uesoftmodem.c
${OPENAIR_DIR}/executables/nr-ue.c
${OPENAIR_DIR}/executables/nr-uesoftmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
#${OPENAIR_TARGETS}/COMMON/create_tasks_ue.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
......
cmake_targets/autotests/test_case_list.xml
View file @ c990cbc8
......@@ -1135,6 +1135,26 @@
</testCase>
<testCase id="015107">
<class>execution</class>
<desc>nr_ulschsim Test cases. (Test1: 106 PRB),
(Test2: 217 PRB),
(Test3: 273 PRB)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/nr_ulschsim.Rel15</main_exec>
<main_exec_args>-R 106 -m9 -s13 -n100
-R 217 -m15 -s15 -n100
-R 273 -m19 -s20 -n100</main_exec_args>
<tags>nr_ulschsim.test1 nr_ulschsim.test2 nr_ulschsim.test3</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015110">
<class>execution</class>
<desc>dlsim_tm4 test cases (Test 1: 10 MHz, R2.FDD (MCS 5), EVA5, -1dB),
......
common/utils/LOG/log.c
View file @ c990cbc8
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common/utils/LOG/log.h
View file @ c990cbc8
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common/utils/threadPool/thread-pool.h
View file @ c990cbc8
......@@ -92,7 +92,7 @@ static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg)
if (nf->outF == NULL)
nf->outF = msg;
if (nf->inF)
if (nf->inF != NULL)
nf->inF->next = msg;
nf->inF = msg;
......@@ -103,7 +103,7 @@ static inline void pushNotifiedFIFO(notifiedFIFO_t *nf, notifiedFIFO_elt_t *msg)
static inline notifiedFIFO_elt_t *pullNotifiedFIFO(notifiedFIFO_t *nf) {
mutexlock(nf->lockF);
while(!nf->outF)
while(nf->outF == NULL)
condwait(nf->notifF, nf->lockF);
notifiedFIFO_elt_t *ret=nf->outF;
......@@ -124,8 +124,12 @@ static inline notifiedFIFO_elt_t *pollNotifiedFIFO(notifiedFIFO_t *nf) {
notifiedFIFO_elt_t *ret=nf->outF;
if (ret!=NULL)
if (ret!=NULL) {
if (nf->outF==nf->outF->next)
LOG_E(TMR,"Circular list in thread pool: push several times the same buffer is forbidden\n");
nf->outF=nf->outF->next;
}
if (nf->outF==NULL)
nf->inF=NULL;
......
common/utils/utils.h
View file @ c990cbc8
......@@ -3,6 +3,9 @@
#include <stdint.h>
#include <sys/types.h>
#ifdef __cplusplus
extern "C" {
#endif
void *calloc_or_fail(size_t size);
void *malloc_or_fail(size_t size);
......@@ -14,4 +17,17 @@ int hex_string_to_hex_value (uint8_t *hex_value, const char *hex_string, int siz
char *itoa(int i);
#define findInList(keY, result, list, element_type) {\
int i;\
for (i=0; i<sizeof(list)/sizeof(element_type) ; i++)\
if (list[i].key==keY) {\
result=list[i].val;\
break;\
}\
AssertFatal(i < sizeof(list)/sizeof(element_type), "List %s doesn't contain %s\n",#list, #keY); \
}
#ifdef __cplusplus
}
#endif
#endif
executables/nr-ue.c
View file @ c990cbc8
This diff is collapsed.
executables/nr-uesoftmodem.c
View file @ c990cbc8
......@@ -196,7 +196,6 @@ int rx_input_level_dBm;
//int number_of_cards = 1;
static NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
static nfapi_nr_config_request_t *config[MAX_NUM_CCs];
int16_t node_synch_ref[MAX_NUM_CCs];
uint32_t target_dl_mcs = 28; //maximum allowed mcs
......@@ -528,14 +527,6 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
/* Set some default values that may be overwritten while reading options */
frame_parms[CC_id] = (NR_DL_FRAME_PARMS *) calloc(sizeof(NR_DL_FRAME_PARMS),1);
config[CC_id] = (nfapi_nr_config_request_t *) calloc(sizeof(nfapi_nr_config_request_t),1);
config[CC_id]->subframe_config.numerology_index_mu.value =1;
config[CC_id]->subframe_config.duplex_mode.value = 1; //FDD
config[CC_id]->subframe_config.dl_cyclic_prefix_type.value = 0; //NORMAL
config[CC_id]->rf_config.dl_carrier_bandwidth.value = 106;
config[CC_id]->rf_config.ul_carrier_bandwidth.value = 106;
config[CC_id]->sch_config.physical_cell_id.value = 0;
frame_parms[CC_id]->eutra_band = 78;
frame_parms[CC_id]->frame_type = FDD;
frame_parms[CC_id]->tdd_config = 3;
......@@ -550,24 +541,7 @@ void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
frame_parms[CC_id]->nb_antennas_tx = 1;
frame_parms[CC_id]->nb_antennas_rx = 1;
//frame_parms[CC_id]->nushift = 0;
///frame_parms[CC_id]->phich_config_common.phich_resource = oneSixth;
//frame_parms[CC_id]->phich_config_common.phich_duration = normal;
// UL RS Config
/*frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.cyclicShift = 1;//n_DMRS1 set to 0
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupHoppingEnabled = 1;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.sequenceHoppingEnabled = 0;
frame_parms[CC_id]->pusch_config_common.ul_ReferenceSignalsPUSCH.groupAssignmentPUSCH = 0;
frame_parms[CC_id]->pusch_config_common.n_SB = 1;
frame_parms[CC_id]->pusch_config_common.hoppingMode = 0;
frame_parms[CC_id]->pusch_config_common.pusch_HoppingOffset = 0;
frame_parms[CC_id]->pusch_config_common.enable64QAM = 0;
frame_parms[CC_id]->prach_config_common.rootSequenceIndex=22;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.zeroCorrelationZoneConfig=1;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_ConfigIndex=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.highSpeedFlag=0;
frame_parms[CC_id]->prach_config_common.prach_ConfigInfo.prach_FreqOffset=0;*/
// NR: Init to legacy LTE 20Mhz params
frame_parms[CC_id]->numerology_index = 0;
frame_parms[CC_id]->ttis_per_subframe = 1;
......@@ -759,20 +733,6 @@ int main( int argc, char **argv ) {
else
UE[CC_id]->mac_enabled = 1;
if (UE[CC_id]->mac_enabled == 0) { //set default UL parameters for testing mode
for (int i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
//UE[CC_id]->pusch_config_dedicated[i] = malloc(sizeof(PUSCH_CONFIG_DEDICATED));
//UE[CC_id]->scheduling_request_config[i] = malloc(sizeof(SCHEDULING_REQUEST_CONFIG));
/*UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
UE[CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = 0;
UE[CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(0%3);
UE[CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;*/
}
}
UE[CC_id]->UE_scan = UE_scan;
UE[CC_id]->UE_scan_carrier = UE_scan_carrier;
UE[CC_id]->UE_fo_compensation = UE_fo_compensation;
......
executables/nr-uesoftmodem.h
View file @ c990cbc8
......@@ -28,6 +28,7 @@
#include "PHY/defs_nr_UE.h"
#include "SIMULATION/ETH_TRANSPORT/proto.h"
#include <threadPool/thread-pool.h>
#include <openair2/LAYER2/NR_MAC_gNB/mac_proto.h>
#if defined(ENABLE_ITTI)
......
nfapi/open-nFAPI/nfapi/public_inc/nfapi_interface.h
View file @ c990cbc8
......@@ -583,7 +583,7 @@ typedef struct {
} nfapi_pnf_phy_rf_config_t;
#define NFAPI_PNF_PHY_RF_TAG 0x1003
// Generic structure for single tlv value.
// Generic strucutre for single tlv value.
typedef struct {
nfapi_tl_t tl;
uint16_t value;
......
openair1/PHY/CODING/TESTBENCH/ldpctest.c
View file @ c990cbc8
......@@ -382,12 +382,12 @@ int test_ldpc(short No_iteration,
//Uncoded BER
if (channel_output_fixed[j][i]<0)
channel_output_uncoded[j][i]=1; //QPSK demod
else
channel_output_uncoded[j][i]=0;
channel_output_uncoded[j][i]=1; //QPSK demod
else
channel_output_uncoded[j][i]=0;
if (channel_output_uncoded[j][i] != channel_input[j][i-2*Zc])
*errors_bit_uncoded = (*errors_bit_uncoded) + 1;
*errors_bit_uncoded = (*errors_bit_uncoded) + 1;
}
} // End segments
......
openair1/PHY/CODING/coding_defs.h
View file @ c990cbc8
......@@ -30,8 +30,6 @@
#include <stdint.h>
#include <PHY/defs_common.h>
typedef unsigned __int128 uint128_t;
#define CRC24_A 0
#define CRC24_B 1
#define CRC16 2
......
openair1/PHY/CODING/crc_byte.c
View file @ c990cbc8
......@@ -228,7 +228,7 @@ crc8 (unsigned char * inptr, int bitlen)
int check_crc(uint8_t* decoded_bytes, uint32_t n, uint32_t F, uint8_t crc_type)
{
uint32_t crc=0,oldcrc=0;
uint8_t crc_len;
uint8_t crc_len,temp;
switch (crc_type) {
case CRC24_A:
......
openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
View file @ c990cbc8
......@@ -59,6 +59,8 @@ static const uint8_t nr_polar_subblock_interleaver_pattern[32] = {0,1,2,4,3,5,6,
#define Nmax 1024
#define nmax 10
#define uint128_t __uint128_t
typedef struct decoder_node_t_s {
struct decoder_node_t_s *left;
struct decoder_node_t_s *right;
......
openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
View file @ c990cbc8
......@@ -36,6 +36,7 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "assertions.h"
#include <stdint.h>"
//input [a_31 a_30 ... a_0]
//output [f_31 f_30 ... f_0] [f_63 f_62 ... f_32] ...
......
openair1/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
View file @ c990cbc8
......@@ -88,7 +88,7 @@ uint32_t nr_polar_output_length(uint16_t K,
if (n>n_2) n=n_2;
if (n<n_min) n=n_min;
/* printf("nr_polar_output_length: K %d, E %d, n %d (n_max %d,n_min %d, n_1 %d,n_2 %d)\n",
/*printf("nr_polar_output_length: K %d, E %d, n %d (n_max %d,n_min %d, n_1 %d,n_2 %d)\n",
K,E,n,n_max,n_min,n_1,n_2);
exit(-1);*/
return ((uint32_t) pow(2.0,n)); //=polar_code_output_length
......
openair1/PHY/INIT/nr_init_ue.c
View file @ c990cbc8
......@@ -597,7 +597,8 @@ void phy_init_nr_ue__PDSCH( NR_UE_PDSCH* const pdsch, const NR_DL_FRAME_PARMS* c
AssertFatal( pdsch, "pdsch==0" );
pdsch->pmi_ext = (uint8_t*)malloc16_clear( fp->N_RB_DL );
pdsch->llr[0] = (int16_t*)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) );
pdsch->llr[0] = (int16_t*)malloc16_clear( (8*(3*8*6144))*sizeof(int16_t) );
pdsch->layer_llr[0] = (int16_t*)malloc16_clear( (8*(3*8*6144))*sizeof(int16_t) );
pdsch->llr128 = (int16_t**)malloc16_clear( sizeof(int16_t*) );
// FIXME! no further allocation for (int16_t*)pdsch->llr128 !!! expect SIGSEGV
// FK, 11-3-2015: this is only as a temporary pointer, no memory is stored there
......@@ -607,6 +608,7 @@ void phy_init_nr_ue__PDSCH( NR_UE_PDSCH* const pdsch, const NR_DL_FRAME_PARMS* c
pdsch->rxdataF_uespec_pilots = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->rxdataF_comp0 = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->rho = (int32_t**)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) );
pdsch->dl_ch_estimates = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_bf_ch_estimates = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pdsch->dl_bf_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
......@@ -628,6 +630,7 @@ void phy_init_nr_ue__PDSCH( NR_UE_PDSCH* const pdsch, const NR_DL_FRAME_PARMS* c
pdsch->rxdataF_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->rxdataF_uespec_pilots[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * fp->N_RB_DL*12);
pdsch->rxdataF_comp0[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_ch_estimates[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * fp->ofdm_symbol_size*7*2);
pdsch->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
pdsch->dl_bf_ch_estimates[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * fp->ofdm_symbol_size*7*2);
pdsch->dl_bf_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
......@@ -724,22 +727,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
}
}
// Channel estimates
for (eNB_id=0; eNB_id<7; eNB_id++) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id] = (int32_t**)malloc16_clear(8*sizeof(int32_t*));
common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id] = (int32_t**)malloc16_clear(8*sizeof(int32_t*));
}
for (i=0; i<fp->nb_antennas_rx; i++)
for (j=0; j<4; j++) {
int idx = (j<<1) + i;
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH) );
common_vars->common_vars_rx_data_per_thread[th_id].dl_ch_estimates_time[eNB_id][idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
}
}
}
// DLSCH
for (eNB_id=0; eNB_id<ue->n_connected_eNB; eNB_id++) {
......@@ -766,7 +753,8 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
(*pdsch_vars_th)[th_id][eNB_id]->llr_shifts = (uint8_t*)malloc16_clear(7*2*fp->N_RB_DL*12);
(*pdsch_vars_th)[th_id][eNB_id]->llr_shifts_p = (*pdsch_vars_th)[0][eNB_id]->llr_shifts;
(*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t*)malloc16_clear( (8*((3*8*8448)+12))*sizeof(int16_t) );
(*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t*)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
(*pdsch_vars_th)[th_id][eNB_id]->layer_llr[1] = (int16_t*)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
(*pdsch_vars_th)[th_id][eNB_id]->llr128_2ndstream = (int16_t**)malloc16_clear( sizeof(int16_t*) );
(*pdsch_vars_th)[th_id][eNB_id]->rho = (int32_t**)malloc16_clear( fp->nb_antennas_rx*sizeof(int32_t*) );
}
......@@ -832,30 +820,32 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
(*pdcch_vars_th)[th_id][eNB_id]->rho = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) );
(*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
}
for (i=0; i<fp->nb_antennas_rx; i++) {
//ue_pdcch_vars[eNB_id]->rho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(fp->N_RB_DL*12*7*2) );
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
(*pdcch_vars_th)[th_id][eNB_id]->rho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(100*12*4) );
}
for (j=0; j<4; j++) { //fp->nb_antennas_tx; j++)
int idx = (j<<1)+i;
// size_t num = 7*2*fp->N_RB_DL*12;
size_t num = 4*100*12; // 4 symbols, 100 PRBs, 12 REs per PRB
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
// Channel estimates
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates = (int32_t**)malloc16_clear(8*sizeof(int32_t*));
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_time = (int32_t**)malloc16_clear(8*sizeof(int32_t*));
for (i=0; i<fp->nb_antennas_rx; i++) {
(*pdcch_vars_th)[th_id][eNB_id]->rho[i] = (int32_t*)malloc16_clear( sizeof(int32_t)*(100*12*4) );
for (j=0; j<4; j++) {
int idx = (j<<1) + i;
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH) );
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_time[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2 );
// size_t num = 7*2*fp->N_RB_DL*12;
size_t num = 4*273*12; // 4 symbols, 100 PRBs, 12 REs per PRB
(*pdcch_vars_th)[th_id][eNB_id]->rxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_rho_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
(*pdcch_vars_th)[th_id][eNB_id]->rxdataF_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
(*pdcch_vars_th)[th_id][eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t) * num );
}
}
}
}
}
// PBCH
pbch_vars[eNB_id]->rxdataF_ext = (int32_t**)malloc16( fp->nb_antennas_rx*sizeof(int32_t*) );
pbch_vars[eNB_id]->rxdataF_comp = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->dl_ch_estimates = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->dl_ch_estimates_ext = (int32_t**)malloc16_clear( 8*sizeof(int32_t*) );
pbch_vars[eNB_id]->llr = (int16_t*)malloc16_clear( 1920 );//
prach_vars[eNB_id]->prachF = (int16_t*)malloc16_clear( sizeof(int)*(7*2*sizeof(int)*(fp->ofdm_symbol_size*12)) );
......@@ -867,6 +857,7 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
for (j=0; j<4; j++) {//fp->nb_antennas_tx;j++) {
int idx = (j<<1)+i;
pbch_vars[eNB_id]->rxdataF_comp[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
pbch_vars[eNB_id]->dl_ch_estimates[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*7*2*sizeof(int)*(fp->ofdm_symbol_size) );
pbch_vars[eNB_id]->dl_ch_estimates_ext[idx] = (int32_t*)malloc16_clear( sizeof(int32_t)*20*12*4 );
}
}
......@@ -887,7 +878,8 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
if (abstraction_flag == 0) {
for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
//phy_init_lte_ue__PDSCH( (*pdsch_vars_th)[th_id][eNB_id], fp );
(*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t*)malloc16_clear( (8*((3*8*8448)+12))*sizeof(int16_t) );
(*pdsch_vars_th)[th_id][eNB_id]->llr[1] = (int16_t*)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
(*pdsch_vars_th)[th_id][eNB_id]->layer_llr[1] = (int16_t*)malloc16_clear( (8*(3*8*8448))*sizeof(int16_t) );
}
} else { //abstraction == 1
......
openair1/PHY/INIT/nr_parms.c
View file @ c990cbc8
......@@ -245,13 +245,6 @@ int nr_init_frame_parms0(NR_DL_FRAME_PARMS *fp,
else
fp->Lmax = 64;
// Initial bandwidth part configuration -- full carrier bandwidth
fp->initial_bwp_dl.bwp_id = 0;
fp->initial_bwp_dl.scs = fp->subcarrier_spacing;
fp->initial_bwp_dl.location = 0;
fp->initial_bwp_dl.N_RB = fp->N_RB_DL;
fp->initial_bwp_dl.cyclic_prefix = fp->Ncp;
fp->initial_bwp_dl.ofdm_symbol_size = fp->ofdm_symbol_size;
return 0;
}
......@@ -293,12 +286,6 @@ void nr_dump_frame_parms(NR_DL_FRAME_PARMS *fp)
LOG_I(PHY,"fp->samples_per_frame_wCP=%d\n",fp->samples_per_frame_wCP);
LOG_I(PHY,"fp->samples_per_subframe=%d\n",fp->samples_per_subframe);
LOG_I(PHY,"fp->samples_per_frame=%d\n",fp->samples_per_frame);
LOG_I(PHY,"fp->initial_bwp_dl.bwp_id=%d\n",fp->initial_bwp_dl.bwp_id);
LOG_I(PHY,"fp->initial_bwp_dl.scs=%d\n",fp->initial_bwp_dl.scs);
LOG_I(PHY,"fp->initial_bwp_dl.N_RB=%d\n",fp->initial_bwp_dl.N_RB);
LOG_I(PHY,"fp->initial_bwp_dl.cyclic_prefix=%d\n",fp->initial_bwp_dl.cyclic_prefix);
LOG_I(PHY,"fp->initial_bwp_dl.location=%d\n",fp->initial_bwp_dl.location);
LOG_I(PHY,"fp->initial_bwp_dl.ofdm_symbol_size=%d\n",fp->initial_bwp_dl.ofdm_symbol_size);
}
......
openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
View file @ c990cbc8
......@@ -703,7 +703,7 @@ int dlsch_encoding_all(PHY_VARS_eNB *eNB,
int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned char *a,
unsigned char *a,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch,
int frame,
......
openair1/PHY/MODULATION/modulation_UE.h
View file @ c990cbc8
......@@ -52,8 +52,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *phy_vars_ue,
unsigned char l,
unsigned char Ns,
int sample_offset,
int no_prefix,
NR_CHANNEL_EST_t channel);
int no_prefix);
int slot_fep_mbsfn(PHY_VARS_UE *phy_vars_ue,
unsigned char l,
......
openair1/PHY/MODULATION/slot_fep_nr.c
View file @ c990cbc8
......@@ -35,16 +35,14 @@
#endif*/
int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned char l,
unsigned char symbol,
unsigned char Ns,
int sample_offset,
int no_prefix,
NR_CHANNEL_EST_t channel)
int no_prefix)
{
NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
NR_UE_COMMON *common_vars = &ue->common_vars;
unsigned char aa;
unsigned char symbol = l;//+((7-frame_parms->Ncp)*(Ns&1)); ///symbol within sub-frame
unsigned int nb_prefix_samples;
unsigned int nb_prefix_samples0;
if (ue->is_synchronized) {
......@@ -60,19 +58,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
//int i;
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;//+((int)floor(frame_parms->ssb_start_subcarrier/NR_NB_SC_PER_RB)+pdcch_vars->coreset[0].rb_offset)*NR_NB_SC_PER_RB;
uint16_t nb_rb_coreset = 0;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;//+516;
uint16_t nb_rb_pdsch = 50;
uint8_t p=0;
uint8_t l0 = pdcch_vars->coreset[0].duration;
uint64_t coreset_freq_dom = pdcch_vars->coreset[0].frequencyDomainResources;
for (int i = 0; i < 45; i++) {
if (((coreset_freq_dom & 0x1FFFFFFFFFFF) >> i) & 0x1) nb_rb_coreset++;
}
nb_rb_coreset = 6 * nb_rb_coreset;
//printf("corset duration %d nb_rb_coreset %d\n", l0, nb_rb_coreset);
void (*dft)(int16_t *,int16_t *, int);
int tmp_dft_in[8192] __attribute__ ((aligned (32))); // This is for misalignment issues for 6 and 15 PRBs
......@@ -146,7 +132,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
nb_prefix_samples,nb_prefix_samples0,slot_offset,sample_offset,rx_offset,frame_length_samples);
#endif
if (l==0) {
if (symbol==0) {
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
memcpy((short *)&common_vars->rxdata[aa][frame_length_samples],
......@@ -171,7 +157,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#endif
}
} else {
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*l;// +
rx_offset += (frame_parms->ofdm_symbol_size+nb_prefix_samples)*symbol;// +
// (frame_parms->ofdm_symbol_size+nb_prefix_samples)*(l-1);
if (rx_offset > (frame_length_samples - frame_parms->ofdm_symbol_size))
......@@ -206,68 +192,6 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#endif
}
if (ue->perfect_ce == 0) {
switch(channel){
case NR_PBCH_EST:
break;
case NR_PDCCH_EST:
#ifdef DEBUG_FEP
printf("PDCCH Channel estimation aatx %d, slot %d, symbol %d start_sc %d\n",aa,Ns,l,coreset_start_subcarrier);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
#endif
nr_pdcch_channel_estimation(ue,0,
Ns,
l,
symbol,
coreset_start_subcarrier,
nb_rb_coreset);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
break;
case NR_PDSCH_EST:
#ifdef DEBUG_FEP
printf("Channel estimation aatx %d, slot %d, symbol %d\n",aa,Ns,l);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
#endif
ue->frame_parms.nushift = (p>>1)&1;;
if (symbol ==l0)
nr_pdsch_channel_estimation(ue,0,
Ns,
p,
l,
symbol,
bwp_start_subcarrier,
nb_rb_pdsch);
#if UE_TIMING_TRACE
stop_meas(&ue->dlsch_channel_estimation_stats);
#endif
break;
case NR_SSS_EST:
break;
default:
LOG_E(PHY,"[UE][FATAL] Unknown channel format %d\n",channel);
return(-1);
break;
}
}
#ifdef DEBUG_FEP
printf("slot_fep: done\n");
#endif
......
openair1/PHY/NR_TRANSPORT/nr_dci_tools.c
View file @ c990cbc8
......@@ -46,7 +46,7 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
uint8_t bsize = pdcch_params->reg_bundle_size;
uint8_t R = pdcch_params->interleaver_size;
uint16_t N_reg = pdcch_params->n_rb * pdcch_params->n_symb;
uint16_t Y, N_cce, M_s_max, n_CI=0, tmp, C;
uint16_t Y, N_cce, M_s_max, n_CI=0, tmp, C=0;
uint16_t n_RNTI = (pdcch_params->search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? pdcch_params->rnti:0;
uint32_t A[3]={39827,39829,39839};
......@@ -64,7 +64,7 @@ void nr_fill_cce_list(NR_gNB_DCI_ALLOC_t* dci_alloc, uint16_t n_shift, uint8_t m
}
if (pdcch_params->cr_mapping_type == NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED) {
AssertFatal((N_reg%(bsize*R))==0, "CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %d, bsize %d R %d)\n",
AssertFatal((N_reg%(bsize*R))==0, "CCE to REG interleaving: Invalid configuration leading to non integer C (N_reg %us, bsize %d R %d)\n",
N_reg, bsize, R);
C = N_reg/(bsize*R);
}
......
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
View file @ c990cbc8
......@@ -215,7 +215,7 @@ uint8_t nr_generate_pdsch(NR_gNB_DLSCH_t dlsch,
nr_dlsch_encoding(harq->pdu, slot, &dlsch, &frame_parms);
#ifdef DEBUG_DLSCH
printf("PDSCH encoding:\nPayload:\n");
for (int i=0; i<TBS>>7; i++) {
for (int i=0; i<harq->B>>7; i++) {
for (int j=0; j<16; j++)
printf("0x%02x\t", harq->pdu[(i<<4)+j]);
printf("\n");
......@@ -233,7 +233,7 @@ printf("\n");
for (int q=0; q<rel15->nb_codewords; q++)
memset((void*)scrambled_output[q], 0, (encoded_length>>5)*sizeof(uint32_t));
uint16_t n_RNTI = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
((pdcch_params.scrambling_id)?pdcch_params.rnti:0) : 0;
((pdcch_params.scrambling_id==0)?pdcch_params.rnti:0) : 0;
uint16_t Nid = (pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC)? \
pdcch_params.scrambling_id : config.sch_config.physical_cell_id.value;
for (int q=0; q<rel15->nb_codewords; q++)
......@@ -308,16 +308,13 @@ for (int i=0; i<n_dmrs>>4; i++) {
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms.first_carrier_offset + frame_parms.ssb_start_subcarrier;
if (start_sc >= frame_parms.ofdm_symbol_size)
start_sc -= frame_parms.ofdm_symbol_size;
/*rel15->start_prb*NR_NB_SC_PER_RB +
((pdcch_params.search_space_type == NFAPI_NR_SEARCH_SPACE_TYPE_COMMON) && (pdcch_params.dci_format == NFAPI_NR_DL_DCI_FORMAT_1_0))?\
((frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB + pdcch_params.rb_offset)*NR_NB_SC_PER_RB) : 0;*/
uint16_t start_sc = frame_parms.first_carrier_offset + rel15->start_prb*NR_NB_SC_PER_RB;
if (start_sc >= frame_parms.ofdm_symbol_size)
start_sc -= frame_parms.ofdm_symbol_size;
#ifdef DEBUG_DLSCH_MAPPING
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_symbols %d)\n",
start_sc, rel15->start_symbol, rel15->n_prb, rel15->nb_symbols);
printf("PDSCH resource mapping started (start SC %d\tstart symbol %d\tN_PRB %d\tnb_symbols %d)\n",
start_sc, rel15->start_symbol, rel15->n_prb, rel15->nb_symbols);
#endif
for (int ap=0; ap<rel15->nb_layers; ap++) {
......
openair1/PHY/NR_TRANSPORT/nr_tbs_tools.c
View file @ c990cbc8
......@@ -126,7 +126,7 @@ void nr_get_tbs(nfapi_nr_dl_config_dlsch_pdu *dlsch_pdu,
uint16_t N_RE, Ninfo, Ninfo_prime, C, TBS=0, R;
uint8_t table_idx, Qm, n, scale;
table_idx = get_table_idx(mcs_table, dci_format, rnti_type, ss_type);
table_idx = 1; //get_table_idx(mcs_table, dci_format, rnti_type, ss_type);
scale = ((table_idx==2)&&((Imcs==20)||(Imcs==26)))?11:10;
N_RE = min(156, N_RE_prime)*dlsch_rel15->n_prb;
......
openair1/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c
View file @ c990cbc8
......@@ -60,8 +60,8 @@ void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
temp = 0;
for (aa=0; aa<frame_parms->nb_antennas_rx; aa++) {
Re = ((int16_t*)ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates_time[eNB_id][aa])[(i<<1)];
Im = ((int16_t*)ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[subframe]].dl_ch_estimates_time[eNB_id][aa])[1+(i<<1)];
Re = ((int16_t*)ue->pdcch_vars[ue->current_thread_id[subframe]][eNB_id]->dl_ch_estimates_time[aa])[(i<<1)];
Im = ((int16_t*)ue->pdcch_vars[ue->current_thread_id[subframe]][eNB_id]->dl_ch_estimates_time[aa])[1+(i<<1)];
temp += (Re*Re/2) + (Im*Im/2);
}
......
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
View file @ c990cbc8
......@@ -22,12 +22,10 @@
#include <string.h>
//#include "defs.h"
//#include "SCHED/defs.h"
#include "PHY/defs_nr_UE.h"
#include "nr_estimation.h"
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "filt16a_32.h"
#include "T.h"
//#define DEBUG_PDSCH
//#define DEBUG_PDCCH
......@@ -211,7 +209,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
int **dl_ch_estimates =ue->pbch_vars[eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
......@@ -413,7 +411,6 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char l,
unsigned char symbol,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset)
......@@ -428,7 +425,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
int **dl_ch_estimates =ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = 1;
......@@ -616,16 +613,16 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
break;
}
if( (Ns== 1) && (l == 0))
if( (Ns== 1) && (symbol == 0))
{
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
for (p=0; p<ue->frame_parms.nb_antenna_ports_eNB; p++) {
if (ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx])
if (ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates[(p<<1)+aarx])
{
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns], l);
idft((int16_t*) &ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset][(p<<1)+aarx][0],
(int16_t*) ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
LOG_D(PHY,"Channel Impulse Computation Slot %d ThreadId %d Symbol %d \n", Ns, ue->current_thread_id[Ns], symbol);
idft((int16_t*) &ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates[(p<<1)+aarx][0],
(int16_t*) ue->pdcch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates_time[(p<<1)+aarx],1);
}
}
}
......@@ -634,13 +631,12 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
}
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
unsigned char l,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch)
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch)
{
int pilot[1320] __attribute__((aligned(16)));
unsigned char aarx;
......@@ -652,7 +648,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
//uint16_t Nid_cell = (eNB_offset == 0) ? ue->frame_parms.Nid_cell : ue->measurements.adj_cell_id[eNB_offset-1];
uint8_t nushift;
int **dl_ch_estimates =ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].dl_ch_estimates[eNB_offset];
int **dl_ch_estimates =ue->pdsch_vars[ue->current_thread_id[Ns]][eNB_offset]->dl_ch_estimates;
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[Ns]].rxdataF;
nushift = (p>>1)&1;
......
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
View file @ c990cbc8
......@@ -45,7 +45,6 @@
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char l,
unsigned char symbol,
unsigned short coreset_start_subcarrier,
unsigned short nb_rb_coreset);
......@@ -69,7 +68,6 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned char Ns,
unsigned short p,
unsigned char l,
unsigned char symbol,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch);
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ c990cbc8
......@@ -843,7 +843,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> in nr_pdcch_extract_rbs_single(rxdataF -> rxdataF_ext || dl_ch_estimates -> dl_ch_estimates_ext)\n");
#endif
nr_pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id],
pdcch_vars[eNB_id]->dl_ch_estimates,
pdcch_vars[eNB_id]->rxdataF_ext,
pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
......
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
View file @ c990cbc8
......@@ -95,11 +95,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t dci_length,
uint16_t rnti,
uint64_t dci_pdu[2],
NR_DCI_INFO_EXTRACTED_t *nr_pdci_info_extracted,
fapi_nr_dci_pdu_rel15_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DL_UE_HARQ_t *pdlsch0_harq,
NR_UE_DLSCH_t *pdlsch0,
NR_UE_ULSCH_t *ulsch0,
NR_DCI_format_t dci_format,
uint8_t nr_tti_rx,
uint16_t n_RB_ULBWP,
......@@ -631,7 +628,7 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case TB1_MCS: // 18 TB1_MCS: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_mcs = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (nr_pdci_info_extracted->mcs < 29) pdlsch0_harq->mcs = nr_pdci_info_extracted->tb1_mcs;
//if (nr_pdci_info_extracted->mcs < 29) pdlsch0_harq->mcs = nr_pdci_info_extracted->tb1_mcs;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb1_mcs=%x\n",nr_pdci_info_extracted->tb1_mcs);
#endif
......@@ -1025,98 +1022,50 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
NR_UE_PDCCH *pdcch_vars,
NR_UE_PDSCH *pdsch_vars,
NR_UE_DLSCH_t **dlsch,
NR_UE_ULSCH_t *ulsch,
NR_DL_FRAME_PARMS *frame_parms,
PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
uint8_t beamforming_mode,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted)
fapi_nr_dci_pdu_rel15_t *nr_dci_info_extracted)
{
/*
* Note only format0_0 and format1_0 are implemented
*/
//uint8_t harq_pid=0;
uint8_t frame_type=frame_parms->frame_type;
//uint8_t tpmi=0;
NR_UE_DLSCH_t *dlsch0=NULL;//*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL;//*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL;//*ulsch1=NULL;
NR_DCI_INFO_EXTRACTED_t *ptr_nr_dci_info_extracted = nr_dci_info_extracted;
uint8_t status=0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> dci_format=%d, rnti=%d, dci_length=%d, dci_pdu[0]=0x%lx, dci_pdu[1]=0x%lx\n",
dci_format,rnti,dci_length,dci_pdu[0],dci_pdu[1]);
#endif
LOG_D(PHY,"\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> dci_format=%d, rnti=%d, dci_length=%d, dci_pdu[0]=0x%lx, dci_pdu[1]=0x%lx\n",dci_format,rnti,dci_length,dci_pdu[0],dci_pdu[1]);
// uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
// for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
/*
dlsch0 = dlsch[0];
dlsch0->active = 0;
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format] != 0) { // 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
//for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format];
nr_dci_info_extracted->harq_process_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,HARQ_PROCESS_NUMBER);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format]));
//left_shift = 0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted->harq_process_number);
for (int i=0; i<1000; i++) printf("%d",i);
#endif
}
memset(nr_dci_info_extracted,0,sizeof(*nr_dci_info_extracted));
LOG_D(PHY,"\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> Entering function nr_extract_dci_info(dci_format=%d) \n",dci_format);
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted->harq_process_number];
ulsch0 = ulsch;
//printf("nr_dci_info_extracted.harq_process_number = %d\n",nr_dci_info_extracted.harq_process_number);
//printf("dlsch0 = %d\n",dlsch0);
//printf("dlsch0_harq = %d\n",dlsch0_harq);
if (!dlsch[0]) return -1;
if (!ulsch) return -1;
*/
memset(&nr_dci_info_extracted,0,sizeof(nr_dci_info_extracted));
// printf("we reach this point\n");
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> Entering function nr_extract_dci_info(dci_format=%d) \n",dci_format);
#endif
status = nr_extract_dci_info(ue,
eNB_id,
frame_type,
dci_length,
rnti,
dci_pdu,
ptr_nr_dci_info_extracted,//&nr_dci_info_extracted,
nr_dci_info_extracted,//&nr_dci_info_extracted,
dci_fields_sizes,
dlsch0_harq,
dlsch0,
ulsch0,
dci_format,
nr_tti_rx,
n_RB_ULBWP,
n_RB_DLBWP,
crc_scrambled_values);
//printf("\n>>> inside nr_generate_ue_ul_dlsch_params_from_dci after nr_extract_dci_info: mcs=%d\n",nr_dci_info_extracted->mcs);
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
if(status == 0) {
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> bad DCI %d !!! \n",dci_format);
return(-1);
}
//printf("\n>>> inside nr_generate_ue_ul_dlsch_params_from_dci after nr_extract_dci_info: modified mcs=%d \n",nr_dci_info_extracted->mcs);
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> Ending function nr_extract_dci_info()\n");
#endif
if(status == 0) {
LOG_W(PHY,"\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> bad DCI %d !!! \n",dci_format);
return(-1);
}
LOG_D(PHY,"\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> Ending function nr_extract_dci_info()\n");
//fill
return(0);
}
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
View file @ c990cbc8
......@@ -1137,12 +1137,12 @@ int nr_dlsch_qpsk_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
short **llr16p)
{
int16_t *rxF=(int16_t*)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *rxF_i=(int16_t*)&rxdataF_comp_i[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *rho=(int16_t*)&rho_i[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *rxF=(int16_t*)&rxdataF_comp[0][(symbol*nb_rb*12)];
int16_t *rxF_i=(int16_t*)&rxdataF_comp_i[0][(symbol*nb_rb*12)];
int16_t *rho=(int16_t*)&rho_i[0][(symbol*nb_rb*12)];
int16_t *llr16;
int len;
uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
//uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
if (first_symbol_flag == 1) {
llr16 = (int16_t*)dlsch_llr;
......@@ -1152,18 +1152,10 @@ int nr_dlsch_qpsk_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
AssertFatal(llr16!=NULL,"nr_dlsch_qpsk_qpsk_llr: llr is null, symbol %d\n",symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
// for 1 antenna port we have 10 REs per symbol per RB
len = (nb_rb*10) - (5*pbch_pss_sss_adjust/6);
} else {
// symbol has no pilots
len = (nb_rb*12) - pbch_pss_sss_adjust;
}
if (symbol ==2) //to update from config
len = nb_rb*6;
else
len = nb_rb*12;
// printf("nr_dlsch_qpsk_qpsk_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
// printf("qpsk_qpsk: len %d, llr16 %p\n",len,llr16);
......@@ -2986,14 +2978,14 @@ int nr_dlsch_16qam_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int16_t **llr16p)
{
int16_t *rxF = (int16_t*)&rxdataF_comp[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *rxF_i = (int16_t*)&rxdataF_comp_i[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *ch_mag = (int16_t*)&dl_ch_mag[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *ch_mag_i = (int16_t*)&dl_ch_mag_i[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *rho = (int16_t*)&rho_i[0][(symbol*frame_parms->N_RB_DL*12)];
int16_t *rxF = (int16_t*)&rxdataF_comp[0][(symbol*nb_rb*12)];
int16_t *rxF_i = (int16_t*)&rxdataF_comp_i[0][(symbol*nb_rb*12)];
int16_t *ch_mag = (int16_t*)&dl_ch_mag[0][(symbol*nb_rb*12)];
int16_t *ch_mag_i = (int16_t*)&dl_ch_mag_i[0][(symbol*nb_rb*12)];
int16_t *rho = (int16_t*)&rho_i[0][(symbol*nb_rb*12)];
int16_t *llr16;
int len;
uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
//uint8_t symbol_mod = (symbol >= (7-frame_parms->Ncp))? (symbol-(7-frame_parms->Ncp)) : symbol;
// first symbol has different structure due to more pilots
if (first_symbol_flag == 1) {
......@@ -3005,18 +2997,10 @@ int nr_dlsch_16qam_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
AssertFatal(llr16!=NULL,"nr_dlsch_16qam_16qam_llr: llr is null, symbol %d\n",symbol);
if ((symbol_mod==0) || (symbol_mod==(4-frame_parms->Ncp))) {
// if symbol has pilots
if (frame_parms->nb_antenna_ports_eNB!=1)
// in 2 antenna ports we have 8 REs per symbol per RB
len = (nb_rb*8) - (2*pbch_pss_sss_adjust/3);
else
// for 1 antenna port we have 10 REs per symbol per RB
len = (nb_rb*10) - (5*pbch_pss_sss_adjust/6);
} else {
// symbol has no pilots
len = (nb_rb*12) - pbch_pss_sss_adjust;
}
if (symbol ==2) //to update from config
len = nb_rb*6;
else
len = nb_rb*12;
// printf("symbol %d: qam16_llr, len %d (llr16 %p)\n",symbol,len,llr16);
......
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
View file @ c990cbc8
......@@ -102,7 +102,7 @@ void free_list(NR_UE_SSB *node) {
}
int nr_pbch_detection(PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mode)
int nr_pbch_detection(UE_nr_rxtx_proc_t * proc, PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mode)
{
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
int ret =-1;
......@@ -160,7 +160,7 @@ int nr_pbch_detection(PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mod
#endif
ret = nr_rx_pbch(ue,
0,
proc,
ue->pbch_vars[0],
frame_parms,
0,
......@@ -201,7 +201,7 @@ int nr_pbch_detection(PHY_VARS_NR_UE *ue, int pbch_initial_symbol, runmode_t mod
char duplex_string[2][4] = {"FDD","TDD"};
char prefix_string[2][9] = {"NORMAL","EXTENDED"};
int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
int nr_initial_sync(UE_nr_rxtx_proc_t *proc, PHY_VARS_NR_UE *ue, runmode_t mode)
{
int32_t sync_pos, sync_pos_frame; // k_ssb, N_ssb_crb, sync_pos2,
......@@ -296,8 +296,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
i,
0,
ue->ssb_offset,
0,
NR_PBCH_EST);
0);
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"Calling sss detection (normal CP)\n");
......@@ -309,7 +308,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
//nr_init_frame_parms_ue(fp,NR_MU_1,NORMAL,n_ssb_crb,0);
nr_gold_pbch(ue);
ret = nr_pbch_detection(ue,1,mode); // start pbch detection at first symbol after pss
ret = nr_pbch_detection(proc, ue,1,mode); // start pbch detection at first symbol after pss
if (ret == 0) {
// sync at symbol ue->symbol_offset
......
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
View file @ c990cbc8
......@@ -410,7 +410,7 @@ unsigned char sign(int8_t x) {
uint8_t pbch_deinterleaving_pattern[32] = {28,0,31,30,7,29,25,27,5,8,24,9,10,11,12,13,1,4,3,14,15,16,17,2,26,18,19,20,21,22,6,23};
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int subframe_rx,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
......@@ -448,15 +448,15 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
symbol_offset=0;
#ifdef DEBUG_PBCH
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF);
//printf("address dataf %p",nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[proc->subframe_rx]].rxdataF);
write_output("rxdataF0_pbch.m","rxF0pbch",
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
&nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[proc->subframe_rx]].rxdataF[0][(symbol_offset+1)*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size*3,1,1);
#endif
// symbol refers to symbol within SSB. symbol_offset is the offset of the SSB wrt start of slot
for (symbol=1; symbol<4; symbol++) {
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].rxdataF,
nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[subframe_rx]].dl_ch_estimates[eNB_id],
nr_pbch_extract(nr_ue_common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[proc->subframe_rx]].rxdataF,
nr_ue_pbch_vars->dl_ch_estimates,
nr_ue_pbch_vars->rxdataF_ext,
nr_ue_pbch_vars->dl_ch_estimates_ext,
symbol,
......@@ -591,6 +591,7 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
#endif
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
ue->dl_indication.proc=proc;
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body[0].mib_pdu.pdu = &decoded_output[0];
......
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
View file @ c990cbc8
......@@ -753,18 +753,20 @@ unsigned short nr_dlsch_extract_rbs_single(int **rxdataF,
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
uint16_t dlsch_extract_rbs_dual(int32_t **rxdataF,
int32_t **dl_ch_estimates,
int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
uint16_t pmi,
uint8_t *pmi_ext,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms,
MIMO_mode_t mimo_mode);
unsigned short nr_dlsch_extract_rbs_dual(int **rxdataF,
int **dl_ch_estimates,
int **rxdataF_ext,
int **dl_ch_estimates_ext,
unsigned short pmi,
unsigned char *pmi_ext,
unsigned int *rb_alloc,
unsigned char symbol,
unsigned short start_rb,
unsigned short nb_rb_pdsch,
unsigned char nr_tti_rx,
uint32_t high_speed_flag,
NR_DL_FRAME_PARMS *frame_parms,
MIMO_mode_t mimo_mode);
/** \fn dlsch_extract_rbs_TM7(int32_t **rxdataF,
int32_t **dl_bf_ch_estimates,
......@@ -826,6 +828,19 @@ void nr_dlsch_channel_compensation(int32_t **rxdataF_ext,
uint8_t output_shift,
PHY_NR_MEASUREMENTS *phy_measurements);
void nr_dlsch_channel_compensation_core(int **rxdataF_ext,
int **dl_ch_estimates_ext,
int **dl_ch_mag,
int **dl_ch_magb,
int **rxdataF_comp,
int **rho,
unsigned char n_tx,
unsigned char n_rx,
unsigned char mod_order,
unsigned char output_shift,
int length,
int start_point);
void nr_dlsch_deinterleaving(uint8_t symbol,
uint16_t L,
uint16_t *llr,
......@@ -881,6 +896,26 @@ void dlsch_channel_level_TM34_meas(int *ch00,
int *avg_1,
unsigned short nb_rb);
void nr_dlsch_channel_level_median(int **dl_ch_estimates_ext,
int32_t *median,
int n_tx,
int n_rx,
int length,
int start_point);
void nr_dlsch_detection_mrc_core(int **rxdataF_comp,
int **rxdataF_comp_i,
int **rho,
int **rho_i,
int **dl_ch_mag,
int **dl_ch_magb,
int **dl_ch_mag_i,
int **dl_ch_magb_i,
unsigned char n_tx,
unsigned char n_rx,
int length,
int start_point);
void det_HhH(int32_t *after_mf_00,
int32_t *after_mf_01,
int32_t *after_mf_10,
......@@ -1137,7 +1172,7 @@ int rx_sss(PHY_VARS_NR_UE *phy_vars_ue,int32_t *tot_metric,uint8_t *flip_max,uin
\returns number of tx antennas or -1 if error
*/
int nr_rx_pbch( PHY_VARS_NR_UE *ue,
int subframe_rx,
UE_nr_rxtx_proc_t *proc,
NR_UE_PBCH *nr_ue_pbch_vars,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
......@@ -1145,7 +1180,8 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag);
int nr_pbch_detection(PHY_VARS_NR_UE *ue,
int nr_pbch_detection(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
int pbch_initial_symbol,
runmode_t mode);
......@@ -1433,7 +1469,8 @@ void generate_RIV_tables(void);
@param phy_vars_ue Pointer to UE variables
@param mode current running mode
*/
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
/*!
......@@ -1731,16 +1768,31 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
uint32_t nr_get_G(uint16_t nb_rb, uint16_t nb_symb_sch,uint8_t nb_re_dmrs,uint16_t length_dmrs, uint8_t Qm, uint8_t Nl) ;
uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti,
short *dlsch_llr,
NR_DL_FRAME_PARMS *frame_parms,
NR_UE_DLSCH_t *dlsch,
NR_DL_UE_HARQ_t *harq_process,
uint32_t frame,
uint16_t nb_symb_sch,
uint8_t nr_tti_rx,
uint8_t harq_pid,
uint8_t is_crnti,
uint8_t llr8_flag);
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
lte_frame_type_t frame_type,
uint8_t dci_length,
uint16_t rnti,
uint64_t dci_pdu[2],
fapi_nr_dci_pdu_rel15_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DCI_format_t dci_format,
uint8_t nr_tti_rx,
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES]);
/**@}*/
#endif
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
View file @ c990cbc8
......@@ -277,7 +277,7 @@ typedef struct {
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t w[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
/// for abstraction soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
double w_abs[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
//double w_abs[MAX_NUM_NR_DLSCH_SEGMENTS][3*8448];
/// soft bits for each received segment ("d"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t *d[MAX_NUM_NR_DLSCH_SEGMENTS];
/// LDPC processing buffers
......
openair1/PHY/TOOLS/cdot_prod.c
View file @ c990cbc8
......@@ -158,122 +158,6 @@ int32_t dot_product(int16_t *x,
#endif
}
int64_t dot_product64(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift)
{
uint32_t n;
#if defined(__x86_64__) || defined(__i386__)
__m128i *x128,*y128,mmtmp1,mmtmp2,mmtmp3,mmcumul,mmcumul_re,mmcumul_im;
__m128i minus_i = _mm_set_epi16(-1,1,-1,1,-1,1,-1,1);
int64_t result;
x128 = (__m128i*) x;
y128 = (__m128i*) y;
mmcumul_re = _mm_setzero_si128();
mmcumul_im = _mm_setzero_si128();
for (n=0; n<(N>>2); n++) {
// printf("n=%d, x128=%p, y128=%p\n",n,x128,y128);
// print_shorts("x",&x128[0]);
// print_shorts("y",&y128[0]);
// this computes Re(z) = Re(x)*Re(y) + Im(x)*Im(y)
mmtmp1 = _mm_madd_epi16(x128[0],y128[0]);
// print_ints("retmp",&mmtmp1);
// mmtmp1 contains real part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp1 = _mm_srai_epi32(mmtmp1,output_shift);
mmcumul_re = _mm_add_epi32(mmcumul_re,mmtmp1);
//print_ints("re",&mmcumul_re);
// this computes Im(z) = Re(x)*Im(y) - Re(y)*Im(x)
mmtmp2 = _mm_shufflelo_epi16(y128[0],_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_shufflehi_epi16(mmtmp2,_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_sign_epi16(mmtmp2,minus_i);
// print_shorts("y",&mmtmp2);
mmtmp3 = _mm_madd_epi16(x128[0],mmtmp2);
//print_ints("imtmp",&mmtmp3);
// mmtmp3 contains imag part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp3 = _mm_srai_epi32(mmtmp3,output_shift);
mmcumul_im = _mm_add_epi32(mmcumul_im,mmtmp3);
//print_ints("im",&mmcumul_im);
x128++;
y128++;
}
// this gives Re Re Im Im
mmcumul = _mm_hadd_epi32(mmcumul_re,mmcumul_im);
//print_ints("cumul1",&mmcumul);
// this gives Re Im Re Im
mmcumul = _mm_hadd_epi32(mmcumul,mmcumul);
//print_ints("cumul2",&mmcumul);
//mmcumul = _mm_srai_epi32(mmcumul,output_shift);
// extract the lower half
result = _mm_extract_epi64(mmcumul,0);
//printf("result: (%d,%d)\n",((int32_t*)&result)[0],((int32_t*)&result)[1]);
_mm_empty();
_m_empty();
return(result);
#elif defined(__arm__)
int16x4_t *x_128=(int16x4_t*)x;
int16x4_t *y_128=(int16x4_t*)y;
int32x4_t tmp_re,tmp_im;
int32x4_t tmp_re1,tmp_im1;
int32x4_t re_cumul,im_cumul;
int32x2_t re_cumul2,im_cumul2;
int32x4_t shift = vdupq_n_s32(-output_shift);
int32x2x2_t result2;
int16_t conjug[4]__attribute__((aligned(16))) = {-1,1,-1,1} ;
re_cumul = vdupq_n_s32(0);
im_cumul = vdupq_n_s32(0);
for (n=0; n<(N>>2); n++) {
tmp_re = vmull_s16(*x_128++, *y_128++);
//tmp_re = [Re(x[0])Re(y[0]) Im(x[0])Im(y[0]) Re(x[1])Re(y[1]) Im(x[1])Im(y[1])]
tmp_re1 = vmull_s16(*x_128++, *y_128++);
//tmp_re1 = [Re(x1[1])Re(x2[1]) Im(x1[1])Im(x2[1]) Re(x1[1])Re(x2[2]) Im(x1[1])Im(x2[2])]
tmp_re = vcombine_s32(vpadd_s32(vget_low_s32(tmp_re),vget_high_s32(tmp_re)),
vpadd_s32(vget_low_s32(tmp_re1),vget_high_s32(tmp_re1)));
//tmp_re = [Re(ch[0])Re(rx[0])+Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1])+Im(ch[1])Im(ch[1]) Re(ch[2])Re(rx[2])+Im(ch[2]) Im(ch[2]) Re(ch[3])Re(rx[3])+Im(ch[3])Im(ch[3])]
tmp_im = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im = [-Im(ch[0])Re(rx[0]) Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1]) Re(ch[1])Im(rx[1])]
tmp_im1 = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im1 = [-Im(ch[2])Re(rx[2]) Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3]) Re(ch[3])Im(rx[3])]
tmp_im = vcombine_s32(vpadd_s32(vget_low_s32(tmp_im),vget_high_s32(tmp_im)),
vpadd_s32(vget_low_s32(tmp_im1),vget_high_s32(tmp_im1)));
//tmp_im = [-Im(ch[0])Re(rx[0])+Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1])+Re(ch[1])Im(rx[1]) -Im(ch[2])Re(rx[2])+Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3])+Re(ch[3])Im(rx[3])]
re_cumul = vqaddq_s32(re_cumul,vqshlq_s32(tmp_re,shift));
im_cumul = vqaddq_s32(im_cumul,vqshlq_s32(tmp_im,shift));
}
re_cumul2 = vpadd_s32(vget_low_s32(re_cumul),vget_high_s32(re_cumul));
im_cumul2 = vpadd_s32(vget_low_s32(im_cumul),vget_high_s32(im_cumul));
re_cumul2 = vpadd_s32(re_cumul2,re_cumul2);
im_cumul2 = vpadd_s32(im_cumul2,im_cumul2);
result2 = vzip_s32(re_cumul2,im_cumul2);
return(vget_lane_s32(result2.val[0],0));
#endif
}
#ifdef MAIN
......
openair1/PHY/TOOLS/nr_phy_scope.c
View file @ c990cbc8
......@@ -590,8 +590,8 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
time = calloc(samples_per_frame,sizeof(float));
corr = calloc(samples_per_frame,sizeof(float));
chest_t = (int16_t**) phy_vars_ue->common_vars.common_vars_rx_data_per_thread[phy_vars_ue->current_thread_id[subframe]].dl_ch_estimates_time[eNB_id];
chest_f = (int16_t**) phy_vars_ue->common_vars.common_vars_rx_data_per_thread[phy_vars_ue->current_thread_id[subframe]].dl_ch_estimates[eNB_id];
chest_t = (int16_t**) phy_vars_ue->pdcch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->dl_ch_estimates_time;
chest_f = (int16_t**) phy_vars_ue->pdcch_vars[phy_vars_ue->current_thread_id[subframe]][eNB_id]->dl_ch_estimates;
pbch_llr = (int16_t*) phy_vars_ue->pbch_vars[eNB_id]->llr;
pbch_comp = (int16_t*) phy_vars_ue->pbch_vars[eNB_id]->rxdataF_comp[0];
......
openair1/PHY/TOOLS/tools_defs.h
View file @ c990cbc8
......@@ -354,10 +354,116 @@ int32_t dot_product(int16_t *x,
uint32_t N, //must be a multiple of 8
uint8_t output_shift);
int64_t dot_product64(int16_t *x,
static inline int64_t dot_product64(int16_t *x,
int16_t *y,
uint32_t N, //must be a multiple of 8
uint8_t output_shift);
uint8_t output_shift)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i *x128,*y128,mmtmp1,mmtmp2,mmtmp3,mmcumul,mmcumul_re,mmcumul_im;
__m128i minus_i = _mm_set_epi16(-1,1,-1,1,-1,1,-1,1);
int64_t result;
x128 = (__m128i*) x;
y128 = (__m128i*) y;
mmcumul_re = _mm_setzero_si128();
mmcumul_im = _mm_setzero_si128();
__m128i*end=x128+(N>>2);
for (__m128i* inPtr=x128; inPtr < end ; inPtr++) {
// printf("n=%d, x128=%p, y128=%p\n",n,x128,y128);
// print_shorts("x",&x128[0]);
// print_shorts("y",&y128[0]);
// this computes Re(z) = Re(x)*Re(y) + Im(x)*Im(y)
mmtmp1 = _mm_madd_epi16(*inPtr,*y128);
// print_ints("retmp",&mmtmp1);
// mmtmp1 contains real part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp1 = _mm_srai_epi32(mmtmp1,output_shift);
mmcumul_re = _mm_add_epi32(mmcumul_re,mmtmp1);
//print_ints("re",&mmcumul_re);
// this computes Im(z) = Re(x)*Im(y) - Re(y)*Im(x)
mmtmp2 = _mm_shufflelo_epi16(*y128,_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_shufflehi_epi16(mmtmp2,_MM_SHUFFLE(2,3,0,1));
//print_shorts("y",&mmtmp2);
mmtmp2 = _mm_sign_epi16(mmtmp2,minus_i);
// print_shorts("y",&mmtmp2);
mmtmp3 = _mm_madd_epi16(*inPtr,mmtmp2);
//print_ints("imtmp",&mmtmp3);
// mmtmp3 contains imag part of 4 consecutive outputs (32-bit)
// shift and accumulate results
mmtmp3 = _mm_srai_epi32(mmtmp3,output_shift);
mmcumul_im = _mm_add_epi32(mmcumul_im,mmtmp3);
//print_ints("im",&mmcumul_im);
y128++;
}
// this gives Re Re Im Im
mmcumul = _mm_hadd_epi32(mmcumul_re,mmcumul_im);
//print_ints("cumul1",&mmcumul);
// this gives Re Im Re Im
mmcumul = _mm_hadd_epi32(mmcumul,mmcumul);
//print_ints("cumul2",&mmcumul);
//mmcumul = _mm_srai_epi32(mmcumul,output_shift);
// extract the lower half
result = _mm_extract_epi64(mmcumul,0);
//printf("result: (%d,%d)\n",((int32_t*)&result)[0],((int32_t*)&result)[1]);
return(result);
#elif defined(__arm__)
int16x4_t *x_128=(int16x4_t*)x;
int16x4_t *y_128=(int16x4_t*)y;
int32x4_t tmp_re,tmp_im;
int32x4_t tmp_re1,tmp_im1;
int32x4_t re_cumul,im_cumul;
int32x2_t re_cumul2,im_cumul2;
int32x4_t shift = vdupq_n_s32(-output_shift);
int32x2x2_t result2;
int16_t conjug[4]__attribute__((aligned(16))) = {-1,1,-1,1} ;
re_cumul = vdupq_n_s32(0);
im_cumul = vdupq_n_s32(0);
for (n=0; n<(N>>2); n++) {
tmp_re = vmull_s16(*x_128++, *y_128++);
//tmp_re = [Re(x[0])Re(y[0]) Im(x[0])Im(y[0]) Re(x[1])Re(y[1]) Im(x[1])Im(y[1])]
tmp_re1 = vmull_s16(*x_128++, *y_128++);
//tmp_re1 = [Re(x1[1])Re(x2[1]) Im(x1[1])Im(x2[1]) Re(x1[1])Re(x2[2]) Im(x1[1])Im(x2[2])]
tmp_re = vcombine_s32(vpadd_s32(vget_low_s32(tmp_re),vget_high_s32(tmp_re)),
vpadd_s32(vget_low_s32(tmp_re1),vget_high_s32(tmp_re1)));
//tmp_re = [Re(ch[0])Re(rx[0])+Im(ch[0])Im(ch[0]) Re(ch[1])Re(rx[1])+Im(ch[1])Im(ch[1]) Re(ch[2])Re(rx[2])+Im(ch[2]) Im(ch[2]) Re(ch[3])Re(rx[3])+Im(ch[3])Im(ch[3])]
tmp_im = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im = [-Im(ch[0])Re(rx[0]) Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1]) Re(ch[1])Im(rx[1])]
tmp_im1 = vmull_s16(vrev32_s16(vmul_s16(*x_128++,*(int16x4_t*)conjug)),*y_128++);
//tmp_im1 = [-Im(ch[2])Re(rx[2]) Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3]) Re(ch[3])Im(rx[3])]
tmp_im = vcombine_s32(vpadd_s32(vget_low_s32(tmp_im),vget_high_s32(tmp_im)),
vpadd_s32(vget_low_s32(tmp_im1),vget_high_s32(tmp_im1)));
//tmp_im = [-Im(ch[0])Re(rx[0])+Re(ch[0])Im(rx[0]) -Im(ch[1])Re(rx[1])+Re(ch[1])Im(rx[1]) -Im(ch[2])Re(rx[2])+Re(ch[2])Im(rx[2]) -Im(ch[3])Re(rx[3])+Re(ch[3])Im(rx[3])]
re_cumul = vqaddq_s32(re_cumul,vqshlq_s32(tmp_re,shift));
im_cumul = vqaddq_s32(im_cumul,vqshlq_s32(tmp_im,shift));
}
re_cumul2 = vpadd_s32(vget_low_s32(re_cumul),vget_high_s32(re_cumul));
im_cumul2 = vpadd_s32(vget_low_s32(im_cumul),vget_high_s32(im_cumul));
re_cumul2 = vpadd_s32(re_cumul2,re_cumul2);
im_cumul2 = vpadd_s32(im_cumul2,im_cumul2);
result2 = vzip_s32(re_cumul2,im_cumul2);
return(vget_lane_s32(result2.val[0],0));
#endif
}
void dft12(int16_t *x,int16_t *y);
void dft24(int16_t *x,int16_t *y,uint8_t scale_flag);
......
openair1/PHY/defs_nr_UE.h
View file @ c990cbc8
......@@ -157,109 +157,6 @@
#include "targets/ARCH/COMMON/common_lib.h"
#include "NR_IF_Module.h"
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
int proc_id;
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. ttis_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. ttis_per_subframe - 1] to act upon for reception
int nr_tti_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
/// \brief Instance count for RXn-TXnp4 processing thread.
/// \internal This variable is protected by \ref mutex_rxtx.
int instance_cnt_rxtx;
/// pthread structure for RXn-TXnp4 processing thread
pthread_t pthread_rxtx;
/// pthread attributes for RXn-TXnp4 processing thread
pthread_attr_t attr_rxtx;
/// condition variable for tx processing thread
pthread_cond_t cond_rxtx;
/// mutex for RXn-TXnp4 processing thread
pthread_mutex_t mutex_rxtx;
/// scheduling parameters for RXn-TXnp4 thread
struct sched_param sched_param_rxtx;
/// internal This variable is protected by ref mutex_fep_slot1.
//int instance_cnt_slot0_dl_processing;
int instance_cnt_slot1_dl_processing;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_slot1_dl_processing;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_slot1_dl_processing;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_slot1_dl_processing;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_slot1_dl_processing;
//int instance_cnt_slot0_dl_processing;
int instance_cnt_dlsch_td;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_dlsch_td;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_dlsch_td;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_dlsch_td;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_dlsch_td;
//
uint8_t chan_est_pilot0_slot1_available;
uint8_t chan_est_slot1_available;
uint8_t llr_slot1_available;
uint8_t dci_slot0_available;
uint8_t first_symbol_available;
uint8_t decoder_thread_available;
uint8_t decoder_main_available;
uint8_t decoder_switch;
int counter_decoder;
uint8_t channel_level;
int eNB_id;
int harq_pid;
int llr8_flag;
/// scheduling parameters for fep_slot1 thread
struct sched_param sched_param_fep_slot1;
int sub_frame_start;
int sub_frame_step;
unsigned long long gotIQs;
uint8_t decoder_thread_available1;
int instance_cnt_dlsch_td1;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_dlsch_td1;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_dlsch_td1;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_dlsch_td1;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_dlsch_td1;
int dci_err_cnt;
} UE_nr_rxtx_proc_t;
/// Context data structure for eNB subframe processing
typedef struct {
......@@ -378,17 +275,6 @@ typedef struct {
/// - second index: symbol [0..28*ofdm_symbol_size[
int32_t **rxdataF;
/// \brief Hold the channel estimates in frequency domain.
/// - first index: eNB id [0..6] (hard coded)
/// - second index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - third index: samples? [0..symbols_per_tti*(ofdm_symbol_size+LTE_CE_FILTER_LENGTH)[
int32_t **dl_ch_estimates[7];
/// \brief Hold the channel estimates in time domain (used for tracking).
/// - first index: eNB id [0..6] (hard coded)
/// - second index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - third index: samples? [0..2*ofdm_symbol_size[
int32_t **dl_ch_estimates_time[7];
} NR_UE_COMMON_PER_THREAD;
typedef struct {
......@@ -438,6 +324,10 @@ typedef struct {
/// - third index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - fourth index: ? [0..168*N_RB_DL[
int32_t **rxdataF_comp1[8][8];
/// \brief Hold the channel estimates in frequency domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..symbols_per_tti*(ofdm_symbol_size+LTE_CE_FILTER_LENGTH)[
int32_t **dl_ch_estimates;
/// \brief Downlink channel estimates extracted in PRBS.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
......@@ -489,6 +379,8 @@ typedef struct {
/// - first index: ? [0..1] (hard coded)
/// - second index: ? [0..1179743] (hard coded)
int16_t *llr[2];
/// Pointers to layer llr vectors (4 layers).
int16_t *layer_llr[4];
/// \f$\log_2(\max|H_i|^2)\f$
int16_t log2_maxh;
/// \f$\log_2(\max|H_i|^2)\f$ //this is for TM3-4 layer1 channel compensation
......@@ -830,6 +722,14 @@ typedef struct {
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
int32_t **rxdataF_comp;
/// \brief Hold the channel estimates in frequency domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..symbols_per_tti*(ofdm_symbol_size+LTE_CE_FILTER_LENGTH)[
int32_t **dl_ch_estimates;
/// \brief Hold the channel estimates in time domain (used for tracking).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..2*ofdm_symbol_size[
int32_t **dl_ch_estimates_time;
/// \brief Pointers to extracted channel estimates of PDCCH symbols.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_DL[
......@@ -897,6 +797,10 @@ typedef struct {
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..287] (hard coded)
int32_t **rxdataF_comp;
/// \brief Hold the channel estimates in frequency domain.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: samples? [0..symbols_per_tti*(ofdm_symbol_size+LTE_CE_FILTER_LENGTH)[
int32_t **dl_ch_estimates;
/// \brief Pointers to downlink channel estimates in frequency-domain extracted in PRBS.
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..287] (hard coded)
......@@ -956,6 +860,9 @@ typedef struct UE_NR_SCAN_INFO_s {
int32_t freq_offset_Hz[3][10];
} UE_NR_SCAN_INFO_t;
#include "NR_IF_Module.h"
/// Top-level PHY Data Structure for UE
typedef struct {
/// \brief Module ID indicator for this instance
......@@ -1015,7 +922,7 @@ typedef struct {
/// UE FAPI DCI request
nr_dcireq_t dcireq;
// CHECK if we need those as they are also included in dl_indictation
// pointers to the next 2 strcutres are also included in dl_indictation
/// UE FAPI indication for DLSCH reception
fapi_nr_rx_indication_t rx_ind;
/// UE FAPI indication for DCI reception
......
openair1/PHY/defs_nr_common.h
View file @ c990cbc8
......@@ -161,8 +161,6 @@ typedef struct NR_BWP_PARMS {
uint8_t location;
/// Bandwidth in PRB
uint16_t N_RB;
/// Size of FFT/IFFT
uint16_t ofdm_symbol_size;
/// Cyclic prefix
uint8_t cyclic_prefix;
/// RBG params
......@@ -315,10 +313,6 @@ typedef struct NR_DL_FRAME_PARMS {
/// PBCH polar encoder params
t_nrPolar_params pbch_polar_params;
//BWP params
NR_BWP_PARMS initial_bwp_dl;
NR_BWP_PARMS initial_bwp_ul;
} NR_DL_FRAME_PARMS;
#define KHz (1000UL)
......
openair1/PHY/thread_NR_UE.h 0 → 100644
View file @ c990cbc8
#ifndef __thread_NR_UE__
#define __thread_NR_UE__
#include <pthread.h>
#include <targets/ARCH/COMMON/common_lib.h>
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
int proc_id;
/// Component Carrier index
uint8_t CC_id;
/// timestamp transmitted to HW
openair0_timestamp timestamp_tx;
//#ifdef UE_NR_PHY_DEMO
/// NR TTI index within subframe_tx [0 .. ttis_per_subframe - 1] to act upon for transmission
int nr_tti_tx;
/// NR TTI index within subframe_rx [0 .. ttis_per_subframe - 1] to act upon for reception
int nr_tti_rx;
//#endif
/// subframe to act upon for transmission
int subframe_tx;
/// subframe to act upon for reception
int subframe_rx;
/// frame to act upon for transmission
int frame_tx;
/// frame to act upon for reception
int frame_rx;
int decoded_frame_rx;
/// internal This variable is protected by ref mutex_fep_slot1.
//int instance_cnt_slot0_dl_processing;
int instance_cnt_slot1_dl_processing;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_slot1_dl_processing;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_slot1_dl_processing;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_slot1_dl_processing;
/// mutex for UE synch thread
//pthread_mutex_t mutex_slot0_dl_processing;
pthread_mutex_t mutex_slot1_dl_processing;
//int instance_cnt_slot0_dl_processing;
int instance_cnt_dlsch_td;
/// pthread descriptor fep_slot1 thread
//pthread_t pthread_slot0_dl_processing;
pthread_t pthread_dlsch_td;
/// pthread attributes for fep_slot1 processing thread
// pthread_attr_t attr_slot0_dl_processing;
pthread_attr_t attr_dlsch_td;
/// condition variable for UE fep_slot1 thread;
//pthread_cond_t cond_slot0_dl_processing;
pthread_cond_t cond_dlsch_td;
/// mutex for UE synch thread
uint8_t chan_est_pilot0_slot1_available;
uint8_t chan_est_slot1_available;
uint8_t llr_slot1_available;
uint8_t dci_slot0_available;
uint8_t first_symbol_available;
uint8_t decoder_thread_available;
uint8_t decoder_main_available;
uint8_t decoder_switch;
int counter_decoder;
uint8_t channel_level;
int eNB_id;
int harq_pid;
int llr8_flag;
/// scheduling parameters for fep_slot1 thread
struct sched_param sched_param_fep_slot1;
int sub_frame_start;
int sub_frame_step;
unsigned long long gotIQs;
uint8_t decoder_thread_available1;
int dci_err_cnt;
} UE_nr_rxtx_proc_t;
#endif
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ c990cbc8
......@@ -55,7 +55,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
// Note: we have to handle the thread IDs for this. To be revisited completely.
NR_UE_PDCCH *pdcch_vars2 = PHY_vars_UE_g[module_id][cc_id]->pdcch_vars[thread_id][0];
NR_UE_DLSCH_t *dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[0];
NR_UE_ULSCH_t *ulsch0 = PHY_vars_UE_g[module_id][cc_id]->ulsch[thread_id][0][0];
NR_DL_FRAME_PARMS frame_parms = PHY_vars_UE_g[module_id][cc_id]->frame_parms;
PRACH_RESOURCES_t *prach_resources = PHY_vars_UE_g[module_id][cc_id]->prach_resources[0];
......@@ -106,32 +106,24 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
dlsch0->current_harq_pid = current_harq_pid;
dlsch0->active = 1;
dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti;
//dlsch0->harq_processes[0]->mcs = &dlsch_config_pdu->mcs;
NR_DL_UE_HARQ_t dlsch0_harq = *(dlsch0->harq_processes[current_harq_pid]);
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
//dlsch0->harq_processes[current_harq_pid]->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq.nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq.start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq.nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq.start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq.mcs = dlsch_config_pdu->mcs;
dlsch0_harq.DCINdi = dlsch_config_pdu->ndi;
dlsch0_harq.rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq.harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq.harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
printf(">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq.mcs);
//for (int j = 0 ; j<1000; j++) printf("\nk = %d",j);
#if 0
dlsch0->harq_processes[current_harq_pid]->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->nb_rb = dlsch_config_pdu->number_rbs;
dlsch0_harq->start_rb = dlsch_config_pdu->start_rb;
dlsch0_harq->nb_symbols = dlsch_config_pdu->number_symbols;
dlsch0_harq->start_symbol = dlsch_config_pdu->start_symbol;
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
dlsch0_harq->DCINdi = dlsch_config_pdu->ndi;
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
//pdlsch0->rnti = rnti;
#endif
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->harq_ack.slot_for_feedback_ack = dlsch_config_pdu->pdsch_to_harq_feedback_time_ind;
LOG_D(MAC,">>>> \tdlsch0->g_pucch=%d\tdlsch0_harq.mcs=%d\n",dlsch0->g_pucch,dlsch0_harq->mcs);
}
}
}else{
......@@ -220,17 +212,17 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
LOG_I(MAC,"[L1][IF module][PHY CONFIG]\n");
LOG_I(MAC,"subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
LOG_I(MAC,"ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
LOG_I(MAC,"dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
LOG_I(MAC,"pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
LOG_I(MAC,"cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
LOG_I(MAC,"intra frequency reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
LOG_I(MAC,"system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
LOG_I(MAC,"ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
LOG_I(MAC,"half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
LOG_I(MAC,"-------------------------------\n");
}
......@@ -251,7 +243,7 @@ int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
}
}
return 0;
}
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ c990cbc8
This diff is collapsed.
openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c
View file @ c990cbc8
......@@ -34,8 +34,6 @@
#include "SCHED_NR_UE/pucch_power_control_ue_nr.h"
#include <openair1/PHY/LTE_ESTIMATION/lte_estimation.h>
int16_t get_PL(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index);
/**************** defines **************************************/
/**************** variables **************************************/
......@@ -149,7 +147,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_pro
}
}
//int l = 0;
int l = 0;
int k2;
if (power_config->twoPUCCH_PC_AdjustmentStates > 1) {
......
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
View file @ c990cbc8
......@@ -53,7 +53,57 @@
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
uint8_t is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
uint8_t is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
/*
void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
int nr_tti_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB);
void nr_generate_pucch1(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit);
void nr_generate_pucch2(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit);
void nr_generate_pucch3_4(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4);
*/
/**************** variables **************************************/
......@@ -508,8 +558,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
switch(format) {
case pucch_format0_nr:
{
nr_generate_pucch0(ue,
ue->common_vars.txdataF,
nr_generate_pucch0(ue,ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated[gNB_id],
tx_amp,
......@@ -523,8 +572,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
case pucch_format1_nr:
{
nr_generate_pucch1(ue,
ue->common_vars.txdataF,
nr_generate_pucch1(ue,ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated[gNB_id],
pucch_payload,
......
openair1/SIMULATION/NR_PHY/dlschsim.c
View file @ c990cbc8
......@@ -174,7 +174,7 @@ int main(int argc, char **argv) {
//logInit();
randominit(0);
while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:")) != -1) {
while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:L:")) != -1) {
switch (c) {
case 'f':
write_output_file = 1;
......@@ -315,6 +315,10 @@ int main(int argc, char **argv) {
break;
case 'L':
loglvl = atoi(optarg);
break;
case 'm':
Imcs = atoi(optarg);
break;
......@@ -489,9 +493,9 @@ int main(int argc, char **argv) {
short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384);
short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384);
double errors_bit_uncoded = 0;
//unsigned char *estimated_output = malloc16(sizeof(unsigned char) * 16 * 68 * 384);
unsigned char *estimated_output_bit = malloc16(sizeof(unsigned char) * 16 * 68 * 384);
unsigned char *test_input_bit = malloc16(sizeof(unsigned char) * 16 * 68 * 384);
unsigned char *estimated_output;
unsigned char *estimated_output_bit;
unsigned char *test_input_bit;
unsigned int errors_bit = 0;
test_input_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
//estimated_output = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
......@@ -510,7 +514,7 @@ int main(int argc, char **argv) {
for (i = 0; i < TBS / 8; i++)
test_input[i] = (unsigned char) rand();
//estimated_output = harq_process->b;
estimated_output = harq_process->b;
#ifdef DEBUG_DLSCHSIM
for (i = 0; i < TBS / 8; i++) printf("test_input[i]=%d \n",test_input[i]);
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ c990cbc8
This diff is collapsed.
openair1/SIMULATION/NR_PHY/pbchsim.c
View file @ c990cbc8
......@@ -600,7 +600,8 @@ int main(int argc, char **argv)
}
if (UE->is_synchronized == 0) {
ret = nr_initial_sync(UE, normal_txrx);
UE_nr_rxtx_proc_t proc={0};
ret = nr_initial_sync(&proc, UE, normal_txrx);
printf("nr_initial_sync1 returns %d\n",ret);
if (ret<0) n_errors++;
}
......@@ -616,14 +617,14 @@ int main(int argc, char **argv)
i,
0,
0,
0,
NR_PBCH_EST);
0);
nr_pbch_channel_estimation(UE,0,0,i,i-(UE->symbol_offset+1),ssb_index%8,n_hf);
}
UE_nr_rxtx_proc_t proc={0};
ret = nr_rx_pbch(UE,
0,
&proc,
UE->pbch_vars[0],
frame_parms,
0,
......
openair2/GNB_APP/gnb_config.c
View file @ c990cbc8
......@@ -628,7 +628,7 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
paramdef_t GNBParams[] = GNBPARAMS_DESC;
paramlist_def_t GNBParamList = {GNB_CONFIG_STRING_GNB_LIST,NULL,0};
////////// Physical parameters
//checkedparam_t config_check_CCparams[] = NRCCPARAMS_CHECK;
checkedparam_t config_check_CCparams[] = NRCCPARAMS_CHECK;
paramdef_t CCsParams[] = NRCCPARAMS_DESC;
paramlist_def_t CCsParamList = {GNB_CONFIG_STRING_COMPONENT_CARRIERS,NULL,0};
......
openair2/LAYER2/NR_MAC_UE/mac.h
View file @ c990cbc8
......@@ -82,10 +82,10 @@ typedef struct {
#define DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH 0x34
#define DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH 0x35
#define DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL 0x36
#define DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT 0x37
#define DL_SCH_LCID_DUPLICATION_ACT 0x38
#define DL_SCH_LCID_SCell_ACT_4_OCT 0x39
#define DL_SCH_LCID_SCell_ACT_1_OCT 0x3A
#define DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT 0X37
#define DL_SCH_LCID_DUPLICATION_ACT 0X38
#define DL_SCH_LCID_SCell_ACT_4_OCT 0X39
#define DL_SCH_LCID_SCell_ACT_1_OCT 0X3A
#define DL_SCH_LCID_L_DRX 0x3B
#define DL_SCH_LCID_DRX 0x3C
#define DL_SCH_LCID_TA_COMMAND 0x3D
......
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @ c990cbc8
This diff is collapsed.
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @ c990cbc8
......@@ -35,6 +35,7 @@
#include "mac_defs.h"
#include "mac.h"
#include <openair1/PHY/defs_nr_UE.h>
/**\brief decode mib pdu in NR_UE, from if_module ul_ind with P7 tx_ind message
\param module_id module id
......@@ -46,6 +47,7 @@
\param pdu_length length of pdu
\param cell_id cell id */
int8_t nr_ue_decode_mib(
UE_nr_rxtx_proc_t *proc,
module_id_t module_id,
int cc_id,
uint8_t gNB_index,
......
openair2/LAYER2/NR_MAC_UE/mac_vars.c
View file @ c990cbc8
......@@ -90,7 +90,7 @@ const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
/*
#define mu_pusch 1
// definition table j Table 6.1.2.1.1-4
#define j ((mu_pusch==3)?3:(mu_pusch==2)?2:1)
......@@ -131,4 +131,5 @@ const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
{0,2,4}, // row index 14
{0,4,7}, // row index 15
{0,8,4} // row index 16
};
\ No newline at end of file
};
*/
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
View file @ c990cbc8
This diff is collapsed.
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @ c990cbc8
This diff is collapsed.
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ c990cbc8
This diff is collapsed.
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
View file @ c990cbc8
......@@ -34,6 +34,7 @@
#define __NR_IF_MODULE_H__
#include "platform_types.h"
#include <openair1/PHY/thread_NR_UE.h>
#include "fapi_nr_ue_interface.h"
......@@ -64,6 +65,7 @@ typedef struct {
frame_t frame;
/// slot
int slot;
UE_nr_rxtx_proc_t * proc;
/// NR UE FAPI-like P7 message, direction: L1 to L2
/// data reception indication structure
......@@ -209,7 +211,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq);
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
int handle_bcch_bch(UE_nr_rxtx_proc_t *proc, module_id_t module_id, int cc_id, unsigned int gNB_index, uint8_t *pduP, unsigned int additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
......
openair2/RRC/NR/L2_nr_interface.c
View file @ c990cbc8
......@@ -58,6 +58,7 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
uint8_t sfn_msb = (uint8_t)((frameP>>4)&0x3f);
#ifdef DEBUG_RRC
int i;
LOG_I(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%d\n",Mod_idP,Srb_id);
#endif
......
openair2/RRC/NR/rrc_gNB.c
View file @ c990cbc8
This diff is collapsed.
targets/RT/USER/nr-ue.c deleted 100644 → 0
View file @ b2add955
This diff is collapsed.
targets/RT/USER/nr-uesoftmodem.c deleted 100644 → 0
View file @ b2add955
This diff is collapsed.
targets/RT/USER/nr-uesoftmodem.h deleted 100644 → 0
View file @ b2add955
This diff is collapsed.
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