Commit d44479ff authored by matzakos's avatar matzakos

tuning on laptops and fix of race condition between L1_RX -> L1_TX

parent 8c1f9c9e
develop 1 128-ues 256_QAM_demod 445-LDPC-implementation-on-GPU 459-pusch-based-ta-updates 464-ru_beamforming_in_gpu 464-ru_beamforming_in_gpu-CPUsubfunction 472-add-pusch-dmrs-modes 481-ldpc-decoder-on-gpu 5g_fapi_scf LTE_TRX_on_single_port NCTU_CS_ISIP NCTU_CS_ISIP_CPU NCTU_CS_ISIP_GPU NCTU_OpinConnect_LDPC NR-PHY-MAC-IF-multi-UE NRUE_usedlschparallel NR_10MHz NR_CSI_reporting NR_DCI_01 NR_DLUL_PF NR_DLUL_PF_4UL NR_DLUL_PF_rebased NR_DL_MIMO NR_DL_sched_fixes NR_DL_scheduler NR_FAPI_beamindex_SSB_RO NR_FDD_FIX NR_FR2_RA NR_FR2_RRC_SSB NR_MAC_CE_GlobalEdge NR_MAC_Multi_Rach_GlobalEdge NR_MAC_SSB_RO_GlobalEdge NR_MAC_SSB_RO_UE_IDCC NR_MAC_SSB_RO_merge NR_MAC_TCI_UCI_GlobalEdge NR_NGAP NR_PDCP_noS1 NR_PUCCH_MultiUE NR_RA_cleanup NR_RA_updates NR_RRCConfiguragion_FR2 NR_RRCConfiguration NR_RRCConfiguration_FR2 NR_RRCConfiguration_S1U NR_RRCConfiguration_merge_develop NR_RRCConfiguration_sync_source NR_RRCConfiguration_trx_thread NR_RRC_CP_bugfix NR_RRC_PDCP NR_RRC_PRACH_procedures NR_RRC_PRACH_procedures_todevelop NR_RRC_PUSCH NR_RRC_TA NR_RRC_X2AP_AMBR_Change_Global_edge NR_RRC_X2AP_RemoveHardcodings_GlobalEdge NR_RRC_config_simplified NR_RRC_harq NR_RRC_harq_b NR_RRC_harq_hacks NR_RRC_harq_newdcipdu NR_SA_F1AP_RFSIMULATOR NR_SA_F1AP_RFSIMULATOR2 NR_SA_F1AP_dev NR_SA_NGAP_RRC NR_SA_NGAP_RRC_wk42 NR_SA_itti_sim_wk48 NR_SA_itti_sim_wk48_hs NR_SA_itti_sim_wk48_hs1 NR_SCHED NR_SCHED_HARQ NR_SCHED_PDCCH_PUCCH_HARQ NR_SCHED_PDCCH_PUCCH_HARQ_rebased NR_SCHED_fixes NR_SRB_Config NR_TRX_on_single_port NR_TRX_on_single_port2 NR_UE_MAC_scheduler NR_UE_RA_fixes NR_UE_UL_DCI_improvements NR_UE_dlsch_bugfix NR_UE_enable_parallelization NR_UE_stability_fixes NR_UL_FAPI_programming NR_UL_scheduler NR_UL_scheduler_rebased NR_UL_scheduling NR_Wireshark NR_beam_simulation NR_beamforming_test NR_gNB_SCF_Indication NR_ipaccess_testing NR_mac_uci_functions_rework NR_msg2_phytest NR_scheduling_CSIRS NR_scheduling_request NR_scheduling_request2 NR_scheduling_request3 NR_test_S1U_RRC_PRACH_procedures NR_ue_dlsch_dmrs_cdm OpInConnect_ISIP PUSCH_TA_update RA_CI_test UE_DL_DCI_hotfix addoptions_nr_USRPdevice bch-fixes-bitmap benetel_5g_prach_fix benetel_driver_uldl_pf_merge benetel_driver_update benetel_phase_rotation benetel_phase_rotation_old bugfix-minor-remove-wrong-log bugfix-nr-bands bugfix-nr-ldpc-post-processing bugfix-nr-ldpc-size-typo bugfix-nr-pdcp-sn-size bugfix-nr-rate-matching-assertion bugfix-x2-SgNBAdditionRequest bupt-sa-merge cce_indexing_fix cce_indexing_fix2 ci-deploy-asterix ci-deploy-docker-compose ci-rd-july-improvements ci-test ci-ul-iperf-from-trf-container clean-5G-scope-round2 cleanup_softmodem_main constant_power debug_branch_init_sync develop-SA-RA develop-SnT develop-ci develop-nr develop-nr-fr2 develop-nr-fr2-rework develop-nr_cppcheck develop-oriecpriupdates develop-sib1 develop-sib1-local develop-sib1-lts develop-sib1-update develop-sib1-update-test1 develop-sib1-update-ue develop_inria_ci_deployment develop_inria_ci_deployment_gp develop_integration_2020_w15 develop_integration_2020_w19 develop_integration_w08 develop_stable dfts_alternatives dlsch-all-dlslots dlsch_encode_mthread dlsch_parallel docupdate_tools dongzhanyi-zte-develop dongzhanyi-zte-develop2 dreibh/apt-auth-fix dreibh/device-load-fix dreibh/device-load-fix-develop-branch dual-connectivity edrx extend_sharedlibusage extend_sharedlibusage2 fapi_for_dmrs_and_ptrs feature-4g-sched feature-nr-4g-nfapi-modifications feature-support-clang-format feature/make-s1-mme-port-configurable feature/make-s1-mme-port-configurable-with-astyle-fixes fembms-enb-ue finalize-oaicn-integration firas fix-ci-tun fix-clock-source fix-itti-segv fix-l2-sim fix-limeSDR-compile fix-softmodem-restart fix-warnings fix_NR_DLUL_PF fix_do_ra_data fix_pdsch_low_prb fix_rfsim_mimo fix_rrc_x2_ticking fixes-CE-RLC-PDU-size fixes-mac-sched-nfapi fixes-mac-sched-tun fixes-tun flexran-apps flexran-improvements flexran-repair-mme-mgmt fr2-hw-test fujitsu_lte_contribution fujitsu_lte_contribution-128 generate_push_ptrs gnb-only-test harq-hotfix hotfix-minor-remove-nr-rlc-cppcheck-error hotfix-nr-rlc-tick hotfix-ocp-executable hotfix-ue-musim-compilation hotfix_usrp_lib improve_build_nr_lte_merge improve_nr_modulation improve_ue_stability integration-develop-nr-2019w45 integration_2020_wk40 integration_2020_wk41 integration_2020_wk42_2 integration_2020_wk45 integration_2020_wk45_2 integration_2020_wk46 integration_2020_wk46_2 integration_2020_wk47 integration_2020_wk48 integration_2020_wk48_2 integration_2020_wk49 integration_2020_wk50 integration_2020_wk50_1 integration_2020_wk51 integration_2020_wk51_2 integration_2021_wk02 integration_2021_wk02_wMR988 integration_2021_wk04 integration_2021_wk05 inter-RRU-final inter-RRU-nr inter-RRU-oairu inter-rru-UE interoperability-test isip_nr itti-enhancement l2-fixes ldpc-dec-layering ldpc-decoder-codegen ldpc-decoder-codegen2 ldpc-decoder-improvements ldpc-offload ldpc_short_codeword_fixes load_gnb lte-ulsch-bugfix lte_uplink_improvement mac-fixes-wk45_2 mbms-fix-develop-nr merging-2019-w51-to-develop-nr minor-fix-doc-basic-sim mosaic5g-oai-ran mosaic5g-oai-sim nasmesh_kernel_5.8 new-gtpu new_rlc_2020 nfapi-bugfix nfapi_nr_develop ngap-dlul ngap-support ngap-w48-merge2 ngap-wf ngap-wf-1120 ngap-wf-1120-srb ngap-wf-1120-srb-gtp ngap-wf-1120-srb-gtp-hs ngap-wf-1120-srb-gtp-hs1 ngap-wf-1120-srb-gtp-hs2 ngap-wf-1120-srb-gtp-yhz ngap-wf-1203-yunsdr ngap-wf-liuyu ngap_lfq_1120 ngap_merge noCore nr-coreset-bug-fix nr-dlsch-multi-thread nr-dlsch-thread nr-dual-connectivity nr-interdigital-test nr-ip-uplink-noS1 nr-mac-pdu-wireshark nr-mac-remove-ue-list nr-pdcp nr-pdsch-extraction-bugfix nr-physim-update nr-rlc-am-bugfix-w44 nr-rlc-bugfix-w44 nr-ssb-measurements nr-timing-measurement nr-timing-measurement-merge nr-ue-buffer-status nr-uldci nrUE nrUE-hs nrUE-upper-layer nr_beamforming nr_bsr nr_csi_newbranch nr_dl_dmrs_type2 nr_dl_pf nr_dl_pf2 nr_dl_ul_ptrs nr_dlsch_parallel_measurements nr_fapi_for_push_tmp nr_fdd_if_fix nr_fix_easycppcheck nr_improve_build_procedures nr_increase_tp nr_pdcch_testing nr_polar_decoder_improvement nr_prach nr_prach_fr2 nr_pucch nr_pucch2 nr_segmentation_fixes nr_sim_fix nr_tdd_configuration nr_ue_msg3 nr_ue_tti_cleanup nr_ul_pf nr_ul_scfdma nr_vcd nrue-multi-thread nrue_msg2_reception nsa-ue nsa_remove_band_hardcodings oai-sim oai-ubuntu-docker oai-ubuntu-docker-for-lmssdr oairu oairu-dockerfile-support oc-docker-october-improvements openxg/develop pdcp-benchmark pdsch-ch-est polar8 ptrs_rrc_config pusch-mthread-scaling-fix pusch-retrans-fix-ue ra-dl-ul reduce_memory_footprint remove_nos1_hack_pdcp remove_x2_gnb_hardcoding repair-TA revert-f5c94279 revert_memcpy rh-ci-add-ue-parallelization rh_ci_fix_autoterminate rh_ci_fr1_update rh_ci_oc rh_ci_py rh_ci_ra_fr2 rh_ci_rfsim_ra rh_ci_ue_parallel rh_doc_update_3 rh_fr1_newjenkins rh_fr1_update rh_gnb_compile_fix rh_wk50_debug rlc-v2-bugfix-status-reporting rlc-v2-tick rlc_v2_coverity_fixes rrc-enb-phy-testmode ru-parallel-beamforming runel runel-reverse-test s1-subnormal_rewrite s1_subnormal s1_subnormal-robert s1ap-bugfix-rab_setup sa-demo sa-merge-rrc-srb sa-msg4 sa-msg4-rrc sa-msg4-rrc-yihz sa-msg4-rrc-yihz-hs sa_rrc_yihz small-bugfixes-w40 small-config-change smallcleanup softmodem_cleanup split73 testing_2symb_pdcch testing_with_external_txdata tools_5Gadapt tp-ota-test trx_thread_param trx_write_thread ue-csi ue-fixes ue-fixes-ota ue-updates-runel-test ue_adjust_gain ue_beam_selection ue_dlsch-multi-threading ue_dlsch_decoding_ldpc_offload ue_nfapi_mch uhd_priority_set_cleanup ul-freq-iq-samps-to-file ul_dl_dci_same_slot ul_harq ulsch_decode_mthread ulsim_changes update-to-2019-march-june-release usrp_fix_adc_shift_and_pps_sync usrp_gpio_test wireshark-T-hack-ueid wireshark-log-scheduling-requests x2-endc-processing xiangwab xiangwan yihongzheng_srb zzs 2021.w04 2021.w02 2020.w51_2 2020.w51 2020.w50 2020.w49 2020.w48_2 2020.w48 2020.w47 2020.w46_2 2020.w46 2020.w45_2 2020.w45 2020.w44 2020.w42_2 2020.w42 2020.w41 2020.w39 2020.w38 2020.w37 2020.w36 2020.w34 2020.w33 2020.w31 2020.w30 2020.w29 2020.w28 2020.w26 2020.w25 2020.w24 2020.w23 2020.w22 2020.w19 2020.w17 2020.w16 2020.w15 2020.w11 2020.w09 2020.w06 2020.w05 2020.w04 2020.w03 nr-ip-over-lte-v.1.5 nr-ip-over-lte-v.1.4 nr-ip-over-lte-v.1.3 nr-ip-over-lte-v.1.2 nr-ip-over-lte-v.1.1 nr-ip-over-lte-v.1.0 develop-nr-2020w03 develop-nr-2020w02 develop-nr-2019w51 develop-nr-2019w50 develop-nr-2019w48 develop-nr-2019w47 develop-nr-2019w45 develop-nr-2019w43 develop-nr-2019w42 develop-nr-2019w40 develop-nr-2019w28 develop-nr-2019w23 benetel_phase_rotation
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......@@ -1072,7 +1072,7 @@ static inline int release_thread(pthread_mutex_t *mutex,int *instance_cnt,char *
return(-1);
}
*instance_cnt=*instance_cnt-1;
*instance_cnt=-1;
if (pthread_mutex_unlock(mutex) != 0) {
LOG_E( PHY, "[SCHED][eNB] error unlocking mutex for %s\n",name);
......
......@@ -86,9 +86,14 @@ UE0:
};
SIM: {
MSIN="0100001111";
USIM_API_K="8baf473f2f8fd09487cccbd7097c6862";
OPC="e734f8734007d6c5ce7a0508809e7e9c";
MSIN="0000000001";
#USIM_API_K="e56e26f5608b8d268f2556e198a0e01b";
#USIM_API_K="8baf473f2f8fd09487cccbd7097c6862"; #initial
#USIM_API_K= "11111111111111111111111111111111"; #nano
USIM_API_K="fec86ba6eb707ed08905757b1bb44b8f";
#OPC="e734f8734007d6c5ce7a0508809e7e9c"; #initial
#OPC="f47f37e4719a9c379e3447f089b1f10a"; #nano
OPC="C42449363BBAD02B66D16BC975D77CC1";
MSISDN="33611123456";
};
......
......@@ -464,47 +464,106 @@ static int trx_usrp_write(openair0_device *device, openair0_timestamp timestamp,
}
}
s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp, s->sample_rate);
s->tx_md.has_time_spec = flags;
int packet_size = s->tx_stream->get_max_num_samps();
int residual = nsamps % packet_size;
int num_packets = (nsamps/packet_size) + ((residual>0) ? 1 : 0);
int first_packet_length = (num_packets>1) ? packet_size : residual;
int packet_s;
/* s->tx_md.has_time_spec = flags;
if(flags>0)
s->tx_md.has_time_spec = true;
else
s->tx_md.has_time_spec = false;
s->tx_md.has_time_spec = false;*/
boolean_t first_packet_state=false,last_packet_state=false,first_packet_has_timespec=false;
if (flags == 2) { // start of burst
s->tx_md.start_of_burst = true;
s->tx_md.end_of_burst = false;
// s->tx_md.start_of_burst = true;
// s->tx_md.end_of_burst = false;
first_packet_state = true;
last_packet_state = false;
first_packet_has_timespec=true;
} else if (flags == 3) { // end of burst
s->tx_md.start_of_burst = false;
s->tx_md.end_of_burst = true;
//s->tx_md.start_of_burst = false;
//s->tx_md.end_of_burst = true;
first_packet_state = false;
last_packet_state - true;
} else if (flags == 4) { // start and end
s->tx_md.start_of_burst = true;
s->tx_md.end_of_burst = true;
// s->tx_md.start_of_burst = true;
// s->tx_md.end_of_burst = true;
first_packet_state = true;
last_packet_state = true;
first_packet_has_timespec=true;
} else if (flags==1) { // middle of burst
s->tx_md.start_of_burst = false;
s->tx_md.end_of_burst = false;
// s->tx_md.start_of_burst = false;
// s->tx_md.end_of_burst = false;
first_packet_state = false;
last_packet_state = false;
}
else if (flags==10) { // fail safe mode
// s->tx_md.has_time_spec = false;
// s->tx_md.start_of_burst = false;
// s->tx_md.end_of_burst = true;
first_packet_state=false;
last_packet_state=true;
}
/*
int offset=0;
for (int packet_ind=0;packet_ind<num_packets;packet_ind++) {
if(flags==10) { // fail safe mode
s->tx_md.has_time_spec = false;
s->tx_md.has_time_spec = first_packet_has_timespec;
s->tx_md.start_of_burst = false;
s->tx_md.end_of_burst = true;
s->tx_md.end_of_burst = false;
s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp+offset, s->sample_rate);
if (packet_ind == 0) {
packet_s = first_packet_length;
s->tx_md.start_of_burst = first_packet_state;
if (num_packets==1) s->tx_md.end_of_burst = last_packet_state;
else s->tx_md.end_of_burst = false;
}
else if (packet_ind==num_packets-1) {
packet_s = residual;
s->tx_md.end_of_burst = last_packet_state;
}
else packet_s = packet_size;
if (cc>1) {
std::vector<void *> buff_ptrs;
for (int i=0; i<cc; i++)
buff_ptrs.push_back(&(((int16_t*)buff_tx[i])[offset]));
ret = (int)s->tx_stream->send(buff_ptrs, packet_s, s->tx_md,1e-3);
} else
ret = (int)s->tx_stream->send(&(((int16_t *)buff_tx[0])[offset]), packet_s, s->tx_md,1e-3);
if (ret != packet_s) {
LOG_E(PHY,"[xmit] tx samples %d != %d\n",ret,nsamps);
break;
}
offset += packet_s;
}
ret=offset;
*/
s->tx_md.has_time_spec = first_packet_has_timespec;
s->tx_md.start_of_burst = first_packet_state;
s->tx_md.end_of_burst = last_packet_state;
s->tx_md.time_spec = uhd::time_spec_t::from_ticks(timestamp, s->sample_rate);
if (cc>1) {
std::vector<void *> buff_ptrs;
for (int i=0; i<cc; i++)
buff_ptrs.push_back(buff_tx[i]);
std::vector<void *> buff_ptrs;
ret = (int)s->tx_stream->send(buff_ptrs, nsamps, s->tx_md,250e-6);
} else
ret = (int)s->tx_stream->send(buff_tx[0], nsamps, s->tx_md,250e-6);
for (int i=0; i<cc; i++)
buff_ptrs.push_back(&(((int16_t*)buff_tx[i])[0]));
if (ret != nsamps)
LOG_E(PHY,"[xmit] tx samples %d != %d\n",ret,nsamps);
ret = (int)s->tx_stream->send(buff_ptrs, nsamps, s->tx_md,1e-3);
} else
ret = (int)s->tx_stream->send(&(((int16_t *)buff_tx[0])[0]), nsamps, s->tx_md,1e-3);
if (ret != nsamps) LOG_E(PHY,"[xmit] tx samples %d != %d\n",ret,nsamps);
#if defined(USRP_REC_PLAY)
} else {
struct timespec req;
......
[*]
[*] GTKWave Analyzer v3.3.61 (w)1999-2014 BSI
[*] Mon May 6 11:32:36 2019
[*] GTKWave Analyzer v3.3.86 (w)1999-2017 BSI
[*] Tue May 7 21:21:14 2019
[*]
[dumpfile] "/tmp/openair_dump_gNB40.vcd"
[dumpfile_mtime] "Mon May 6 11:32:05 2019"
[dumpfile_size] 803075
[savefile] "/home/caracal/raymond/openairinterface5g/targets/RT/USER/gNB_usrp.gtkw"
[timestart] 10835824000
[dumpfile_mtime] "Tue May 7 21:19:43 2019"
[dumpfile_size] 18197199
[savefile] "/home/belostome/raymond/openairinterface5g/targets/RT/USER/gNB_usrp.gtkw"
[timestart] 8147990000
[size] 1920 859
[pos] -1 -1
*-19.848083 10838512202 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
*-21.848083 8158741030 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[sst_width] 386
[signals_width] 344
[sst_expanded] 1
......@@ -17,6 +17,10 @@
@28
functions.trx_read
functions.trx_write
@421
variables.frame_number_TX0_UE[63:0]
@420
variables.frame_number_RX1_UE[63:0]
@24
variables.trx_ts[63:0]
variables.trx_tst[63:0]
......@@ -48,7 +52,7 @@ functions.phy_enb_pdcch_tx
functions.phy_eNB_dlsch_encoding
functions.phy_eNB_dlsch_encoding_w
functions.generate_dlsch
@421
@420
variables.frame_number_RX0_UE[63:0]
@28
functions.phy_procedures_ru_feprx0
......
......@@ -248,8 +248,7 @@ static void* gNB_L1_thread_tx(void* param) {
while (!oai_exit) {
while (L1_proc_tx->instance_cnt==-1)
if (wait_on_condition(&L1_proc_tx->mutex,&L1_proc_tx->cond,&L1_proc_tx->instance_cnt,thread_name)<0) break;
if (wait_on_condition(&L1_proc_tx->mutex,&L1_proc_tx->cond,&L1_proc_tx->instance_cnt,thread_name)<0) break;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_PROC_RXTX1, 1 );
if (oai_exit) break;
// *****************************************
......@@ -410,26 +409,28 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
// note this should depend on the numerology used by the TX L1 thread, set here for 500us slot time
waitret=timedwait_on_condition(&proc->mutex_RUs_tx,&proc->cond_RUs,&proc->instance_cnt_RUs,"wakeup_txfh",500000);
if (release_thread(&proc->mutex_RUs_tx,&proc->instance_cnt_RUs,"wakeup_txfh")<0) return(-1);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX0_UE,proc->instance_cnt_RUs);
if (waitret == ETIMEDOUT) {
LOG_W(PHY,"Dropping TX slot because FH is blocked more than 2 slot times (1000us)\n");
LOG_W(PHY,"Dropping TX slot because FH is blocked more than 1 slot times (500us)\n");
pthread_mutex_lock(&gNB->proc.mutex_RU_tx);
gNB->proc.RU_mask_tx = 0;
pthread_mutex_unlock(&gNB->proc.mutex_RU_tx);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_UE,1);
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME(VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_UE,0);
return(-1);
}
else if (release_thread(&proc->mutex_RUs_tx,&proc->instance_cnt_RUs,"wakeup_txfh")<0) return(-1);
for(int i=0; i<gNB->num_RU; i++)
{
ru = gNB->RU_list[i];
ru_proc = &ru->proc;
if (ru_proc->instance_cnt_gNBs == 0) {
LOG_E(PHY,"Frame %d, subframe %d: TX FH thread busy, dropping Frame %d, subframe %d\n", ru_proc->frame_tx, ru_proc->tti_tx, proc->frame_rx, proc->slot_rx);
pthread_mutex_lock(&gNB->proc.mutex_RU_tx);
gNB->proc.RU_mask_tx = 0;
pthread_mutex_unlock(&gNB->proc.mutex_RU_tx);
return(-1);
}
if (pthread_mutex_timedlock(&ru_proc->mutex_gNBs,&wait) != 0) {
......@@ -443,6 +444,8 @@ int wakeup_txfh(PHY_VARS_gNB *gNB,gNB_L1_rxtx_proc_t *proc,int frame_tx,int slot
ru_proc->tti_tx = slot_tx;
ru_proc->frame_tx = frame_tx;
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_UE, ru_proc->instance_cnt_gNBs);
LOG_D(PHY,"Signaling tx_thread_fh for %d.%d\n",ru_proc->frame_tx,ru_proc->tti_tx);
// the thread can now be woken up
if (pthread_cond_signal(&ru_proc->cond_gNBs) != 0) {
......@@ -485,6 +488,8 @@ int wakeup_tx(PHY_VARS_gNB *gNB,int frame_rx,int slot_rx,int frame_tx,int slot_t
L1_proc_tx->slot_tx = slot_tx;
L1_proc_tx->frame_tx = frame_tx;
L1_proc_tx->timestamp_tx = timestamp_tx;
pthread_mutex_unlock( &L1_proc_tx->mutex);
// the thread can now be woken up
if (pthread_cond_signal(&L1_proc_tx->cond) != 0) {
......@@ -493,7 +498,6 @@ int wakeup_tx(PHY_VARS_gNB *gNB,int frame_rx,int slot_rx,int frame_tx,int slot_t
return(-1);
}
pthread_mutex_unlock( &L1_proc_tx->mutex);
return(0);
}
......
......@@ -754,7 +754,7 @@ void tx_rf(RU_t *ru) {
if ((SF_type == SF_DL) ||
(SF_type == SF_S)) {
int siglen=fp->samples_per_slot,flags=1;
int siglen=fp->samples_per_slot>>1,flags=1;
/*
if (SF_type == SF_S) {
......@@ -1280,20 +1280,13 @@ static void* ru_thread_tx( void* param ) {
int print_frame = 8;
int i = 0;
cpu_set_t cpuset;
CPU_ZERO(&cpuset);
thread_top_init("ru_thread_tx",1,400000,500000,500000);
//CPU_SET(5, &cpuset);
//pthread_setaffinity_np(pthread_self(), sizeof(cpu_set_t), &cpuset);
//wait_sync("ru_thread_tx");
thread_top_init("ru_thread_tx",0,400000,500000,500000);
wait_on_condition(&proc->mutex_FH1,&proc->cond_FH1,&proc->instance_cnt_FH1,"ru_thread_tx");
printf( "ru_thread_tx ready\n");
while (!oai_exit) {
if (oai_exit) break;
......@@ -1301,7 +1294,9 @@ static void* ru_thread_tx( void* param ) {
LOG_D(PHY,"ru_thread_tx: Waiting for TX processing\n");
// wait until eNBs are finished subframe RX n and TX n+4
wait_on_condition(&proc->mutex_gNBs,&proc->cond_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx");
if (oai_exit) break;
//printf("~~~~~~~~~~~~~~~~start process for ru_thread_tx %d.%d\n", proc->frame_tx, proc->tti_tx);
......@@ -1347,6 +1342,8 @@ static void* ru_thread_tx( void* param ) {
}//if(proc->frame_tx == print_frame)
}//else emulate_rf
release_thread(&proc->mutex_gNBs,&proc->instance_cnt_gNBs,"ru_thread_tx");
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_RX1_UE, proc->instance_cnt_gNBs);
for(i = 0; i<ru->num_gNB; i++)
{
gNB = ru->gNB_list[i];
......
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