Commit f10ecb62 authored by Javier Morgade's avatar Javier Morgade

Added NFAPI MCH scheduling support

	M3AP ASN1 source spec updated

	ACKNOWLEDGEMENT:
 	1. This commit was developed at Vicomtech (https://www.vicomtech.org) under UE project CDN-X-ALL: "CDN edge-cloud computing for efficient cache and reliable streaming aCROSS Aggregated unicast-multicast LinkS"
 	2. Project funded by Fed4FIRE+ OC5 (https://www.fed4fire.eu)
Signed-off-by: default avatarJavier Morgade <javier.morgade@ieee.org>
parent 35ba974c
...@@ -102,9 +102,11 @@ void generate_mch(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,uint8_t *a) ...@@ -102,9 +102,11 @@ void generate_mch(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,uint8_t *a)
eNB->common_vars.txdataF, eNB->common_vars.txdataF,
AMP); AMP);
AssertFatal(eNB->dlsch_MCH->harq_processes[0]->pdu != NULL, "attempt to encode a NULL harq PDU\n");
AssertFatal(dlsch_encoding(eNB, AssertFatal(dlsch_encoding(eNB,
a, // a,
eNB->dlsch_MCH->harq_processes[0]->pdu,
1, 1,
eNB->dlsch_MCH, eNB->dlsch_MCH,
proc->frame_tx, proc->frame_tx,
......
...@@ -319,17 +319,21 @@ void mch_channel_level_khz_1dot25(int **dl_ch_estimates_ext, ...@@ -319,17 +319,21 @@ void mch_channel_level_khz_1dot25(int **dl_ch_estimates_ext,
for (i=0; i<(nre>>2); i++) { for (i=0; i<(nre>>2); i++) {
#if defined(__x86_64__) || defined(__i386__) #if defined(__x86_64__) || defined(__i386__)
avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[0],dl_ch128[0])); //avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
avg128 = _mm_add_epi32(avg128,_mm_srai_epi32(_mm_madd_epi16(dl_ch128[0],dl_ch128[0]),log2_approx(nre>>2)-1));
#elif defined(__arm__) #elif defined(__arm__)
#endif #endif
} }
avg[aarx] = (((int*)&avg128)[0] + // avg[aarx] = (((int*)&avg128)[0] +
// ((int*)&avg128)[1] +
// ((int*)&avg128)[2] +
// ((int*)&avg128)[3])/nre;
avg[aarx] = (((((int*)&avg128)[0] +
((int*)&avg128)[1] + ((int*)&avg128)[1] +
((int*)&avg128)[2] + ((int*)&avg128)[2] +
((int*)&avg128)[3])/nre; ((int*)&avg128)[3])/(nre>>factor2(nre)))*(1<<(log2_approx(nre>>2)-1-factor2(nre))));
//printf("Channel level : %d\n",avg[(aatx<<1)+aarx]); //printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
} }
......
...@@ -139,6 +139,54 @@ void handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc, ...@@ -139,6 +139,54 @@ void handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,
// adjust transmit amplitude here based on NFAPI info // adjust transmit amplitude here based on NFAPI info
} }
void handle_nfapi_mch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu){
nfapi_dl_config_mch_pdu_rel8_t *rel8 = &dl_config_pdu->mch_pdu.mch_pdu_rel8;
LTE_eNB_DLSCH_t *dlsch = eNB->dlsch_MCH;
LTE_DL_FRAME_PARMS *frame_parms=&eNB->frame_parms;
// dlsch->rnti = M_RNTI;
dlsch->harq_processes[0]->mcs = rel8->modulation;
// dlsch->harq_processes[0]->Ndi = ndi;
dlsch->harq_processes[0]->rvidx = 0;//rvidx;
dlsch->harq_processes[0]->Nl = 1;
dlsch->harq_processes[0]->TBS = TBStable[get_I_TBS(dlsch->harq_processes[0]->mcs)][frame_parms->N_RB_DL-1];
// dlsch->harq_ids[subframe] = 0;
dlsch->harq_processes[0]->nb_rb = frame_parms->N_RB_DL;
switch(frame_parms->N_RB_DL) {
case 6:
dlsch->harq_processes[0]->rb_alloc[0] = 0x3f;
break;
case 25:
dlsch->harq_processes[0]->rb_alloc[0] = 0x1ffffff;
break;
case 50:
dlsch->harq_processes[0]->rb_alloc[0] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[1] = 0x3ffff;
break;
case 100:
dlsch->harq_processes[0]->rb_alloc[0] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[1] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[2] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[3] = 0xf;
break;
}
dlsch->harq_ids[proc->frame_tx%2][proc->subframe_tx] = 0;
dlsch->harq_processes[0]->pdu = sdu;
dlsch->active = 1;
}
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0)) #if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
extern uint32_t localRIV2alloc_LUT6[32]; extern uint32_t localRIV2alloc_LUT6[32];
extern uint32_t localRIV2alloc_LUT25[512]; extern uint32_t localRIV2alloc_LUT25[512];
...@@ -839,8 +887,30 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) { ...@@ -839,8 +887,30 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
break; break;
case NFAPI_DL_CONFIG_MCH_PDU_TYPE: case NFAPI_DL_CONFIG_MCH_PDU_TYPE:{
// handle_nfapi_mch_dl_pdu(eNB,dl_config_pdu); // handle_nfapi_mch_dl_pdu(eNB,dl_config_pdu);
//AssertFatal(1==0,"OK\n");
nfapi_dl_config_mch_pdu_rel8_t *mch_pdu_rel8 = &dl_config_pdu->mch_pdu.mch_pdu_rel8;
uint16_t pdu_index = mch_pdu_rel8->pdu_index;
uint16_t tx_pdus = TX_req->tx_request_body.number_of_pdus;
uint16_t invalid_pdu = pdu_index == -1;
uint8_t *sdu = invalid_pdu ? NULL : pdu_index >= tx_pdus ? NULL : TX_req->tx_request_body.tx_pdu_list[pdu_index].segments[0].segment_data;
LOG_D(PHY,"%s() [PDU:%d] NFAPI_DL_CONFIG_MCH_PDU_TYPE SFN/SF:%04d%d TX:%d/%d RX:%d/%d pdu_index:%d sdu:%p\n",
__FUNCTION__, i,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),
proc->frame_tx, proc->subframe_tx,
proc->frame_rx, proc->subframe_rx,
pdu_index, sdu);
if (sdu) { //sdu != NULL)
if (NFAPI_MODE!=NFAPI_MODE_VNF)
handle_nfapi_mch_pdu(eNB,NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),proc,dl_config_pdu, sdu);
} else {
dont_send=1;
LOG_E(MAC,"%s() NFAPI_DL_CONFIG_MCH_PDU_TYPE sdu is NULL DL_CFG:SFN/SF:%d:pdu_index:%d TX_REQ:SFN/SF:%d:pdus:%d\n", __FUNCTION__, NFAPI_SFNSF2DEC(DL_req->sfn_sf), pdu_index,
NFAPI_SFNSF2DEC(TX_req->sfn_sf), tx_pdus);
}
do_oai=1;
}
break; break;
case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE: { case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE: {
......
...@@ -53,6 +53,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_pro ...@@ -53,6 +53,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_pro
nfapi_dl_config_request_pdu_t *dl_config_pdu, nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t codeword_index, uint8_t codeword_index,
uint8_t *sdu); uint8_t *sdu);
void handle_nfapi_mch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu);
void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc, void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,
nfapi_ul_config_request_pdu_t *ul_config_pdu, nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint16_t frame,uint8_t subframe,uint8_t srs_present); uint16_t frame,uint8_t subframe,uint8_t srs_present);
......
...@@ -47,6 +47,8 @@ ...@@ -47,6 +47,8 @@
#include "intertask_interface.h" #include "intertask_interface.h"
#define MBMS_NFAPI_SCHEDULER
nfapi_ue_release_request_body_t release_rntis; nfapi_ue_release_request_body_t release_rntis;
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor) { int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor) {
...@@ -117,6 +119,16 @@ lte_subframe_t get_subframe_direction(uint8_t Mod_id,uint8_t CC_id,uint8_t subfr ...@@ -117,6 +119,16 @@ lte_subframe_t get_subframe_direction(uint8_t Mod_id,uint8_t CC_id,uint8_t subfr
return(subframe_select(&RC.eNB[Mod_id][CC_id]->frame_parms,subframe)); return(subframe_select(&RC.eNB[Mod_id][CC_id]->frame_parms,subframe));
} }
#ifdef MBMS_NFAPI_SCHEDULER
void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
int subframe = proc->subframe_tx;
// This is DL-Cell spec pilots in Control region
generate_pilots_slot (eNB, eNB->common_vars.txdataF, AMP, subframe << 1, 1);
if(eNB->dlsch_MCH->active==1)
generate_mch (eNB, proc,NULL/*, eNB->dlsch_MCH->harq_processes[0]->pdu*/);
eNB->dlsch_MCH->active = 0;
}
#else
void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) { void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0)) #if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0))
MCH_PDU *mch_pduP=NULL; MCH_PDU *mch_pduP=NULL;
...@@ -151,14 +163,16 @@ void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) { ...@@ -151,14 +163,16 @@ void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
if (mch_pduP) { if (mch_pduP) {
fill_eNB_dlsch_MCH (eNB, mch_pduP->mcs, 1, 0); fill_eNB_dlsch_MCH (eNB, mch_pduP->mcs, 1, 0);
eNB->dlsch_MCH->harq_ids[proc->frame_tx%2][subframe] = 0; eNB->dlsch_MCH->harq_ids[proc->frame_tx%2][subframe] = 0;
eNB->dlsch_MCH->harq_processes[0]->pdu=(uint8_t *) mch_pduP->payload;
// Generate PMCH // Generate PMCH
generate_mch (eNB, proc, (uint8_t *) mch_pduP->payload); generate_mch (eNB, proc, NULL/*(uint8_t *) mch_pduP->payload*/);
} else { } else {
LOG_D (PHY, "[eNB/RN] Frame %d subframe %d: MCH not generated \n", proc->frame_tx, subframe); LOG_D (PHY, "[eNB/RN] Frame %d subframe %d: MCH not generated \n", proc->frame_tx, subframe);
} }
#endif #endif
} }
#endif
void common_signal_procedures (PHY_VARS_eNB *eNB,int frame, int subframe) { void common_signal_procedures (PHY_VARS_eNB *eNB,int frame, int subframe) {
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms; LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
......
...@@ -940,7 +940,11 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -940,7 +940,11 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) { for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
if (cc[CC_id].MBMS_flag > 0) { if (cc[CC_id].MBMS_flag > 0) {
start_meas(&RC.mac[module_idP]->schedule_mch); start_meas(&RC.mac[module_idP]->schedule_mch);
mbsfn_status[CC_id] = schedule_MBMS(module_idP, CC_id, frameP, subframeP); int(*schedule_mch)(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_frame_t subframe) = NULL;
schedule_mch = schedule_MBMS_NFAPI;
if(schedule_mch){
mbsfn_status[CC_id] = schedule_mch(module_idP, CC_id, frameP, subframeP);
}
stop_meas(&RC.mac[module_idP]->schedule_mch); stop_meas(&RC.mac[module_idP]->schedule_mch);
} }
} }
......
This diff is collapsed.
...@@ -1605,6 +1605,39 @@ fill_nfapi_uci_acknak(module_id_t module_idP, ...@@ -1605,6 +1605,39 @@ fill_nfapi_uci_acknak(module_id_t module_idP,
return (((ackNAK_absSF / 10) << 4) + (ackNAK_absSF % 10)); return (((ackNAK_absSF / 10) << 4) + (ackNAK_absSF % 10));
} }
//------------------------------------------------------------------------------
void
fill_nfapi_mch_config(nfapi_dl_config_request_body_t *dl_req,
uint16_t length,
uint16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint16_t resource_block_coding,
uint8_t modulation,
uint16_t transmission_power,
uint8_t mbsfn_area_id){
nfapi_dl_config_request_pdu_t *dl_config_pdu =
&dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void *) dl_config_pdu, 0,
sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_dl_config_mch_pdu));
dl_config_pdu->mch_pdu.mch_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_MCH_PDU_REL8_TAG;
dl_config_pdu->mch_pdu.mch_pdu_rel8.length = length;
dl_config_pdu->mch_pdu.mch_pdu_rel8.pdu_index = pdu_index;
dl_config_pdu->mch_pdu.mch_pdu_rel8.rnti = rnti;
dl_config_pdu->mch_pdu.mch_pdu_rel8.resource_allocation_type = resource_allocation_type;
dl_config_pdu->mch_pdu.mch_pdu_rel8.resource_block_coding = resource_block_coding;
dl_config_pdu->mch_pdu.mch_pdu_rel8.modulation = modulation;
dl_config_pdu->mch_pdu.mch_pdu_rel8.transmission_power = transmission_power;
dl_config_pdu->mch_pdu.mch_pdu_rel8.mbsfn_area_id = mbsfn_area_id;
dl_req->number_pdu++;
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
void void
fill_nfapi_dlsch_config(eNB_MAC_INST *eNB, fill_nfapi_dlsch_config(eNB_MAC_INST *eNB,
......
...@@ -86,6 +86,15 @@ void schedule_SI_MBMS(module_id_t module_idP, frame_t frameP, ...@@ -86,6 +86,15 @@ void schedule_SI_MBMS(module_id_t module_idP, frame_t frameP,
int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sub_frame_t subframe); sub_frame_t subframe);
/** \brief MBMS scheduling: Checking the position for MBSFN subframes. Create MSI, transfer MCCH from RRC to MAC, transfer MTCHs from RLC to MAC. Multiplexing MSI,MCCH&MTCHs. Return 1 if there are MBSFN data being allocated, otherwise return 0;
@param Mod_id Instance ID of eNB
@param frame Frame index
@param subframe Subframe number on which to act
*/
int schedule_MBMS_NFAPI(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sub_frame_t subframe);
/** \brief check the mapping between sf allocation and sync area, Currently only supports 1:1 mapping /** \brief check the mapping between sf allocation and sync area, Currently only supports 1:1 mapping
@param Mod_id Instance ID of eNB @param Mod_id Instance ID of eNB
@param mbsfn_sync_area index of mbsfn sync area @param mbsfn_sync_area index of mbsfn sync area
...@@ -1217,6 +1226,17 @@ void program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP, ...@@ -1217,6 +1226,17 @@ void program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
frame_t frameP, sub_frame_t subframeP, frame_t frameP, sub_frame_t subframeP,
uint8_t cce_idx); uint8_t cce_idx);
void
fill_nfapi_mch_config(nfapi_dl_config_request_body_t *dl_req,
uint16_t length,
uint16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint16_t resource_block_coding,
uint8_t modulation,
uint16_t transmission_power,
uint8_t mbsfn_area_id);
void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB, void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
nfapi_dl_config_request_body_t * dl_req, nfapi_dl_config_request_body_t * dl_req,
uint16_t length, int16_t pdu_index, uint16_t length, int16_t pdu_index,
......
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