Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Support
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in / Register
Toggle navigation
O
OpenXG UE
Project overview
Project overview
Details
Activity
Releases
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Issues
0
Issues
0
List
Boards
Labels
Milestones
Merge Requests
0
Merge Requests
0
CI / CD
CI / CD
Pipelines
Jobs
Schedules
Analytics
Analytics
CI / CD
Repository
Value Stream
Wiki
Wiki
Snippets
Snippets
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Create a new issue
Jobs
Commits
Issue Boards
Open sidebar
lizhongxiao
OpenXG UE
Commits
9de23c84
Commit
9de23c84
authored
Oct 07, 2020
by
Francesco Mani
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
rearrangement of handle_uci function for acknack
parent
9022cc67
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
124 additions
and
77 deletions
+124
-77
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+82
-77
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+5
-0
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+37
-0
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @
9de23c84
...
...
@@ -348,93 +348,98 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
return
offset
;
}
void
handle_nr_uci
(
NR_UL_IND_t
*
UL_info
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_mac_stats_t
*
stats
,
int
target_snrx10
)
{
void
nr_rx_acknack
(
nfapi_nr_uci_pusch_pdu_t
*
uci_pusch
,
nfapi_nr_uci_pucch_pdu_format_0_1_t
*
uci_01
,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t
*
uci_234
,
NR_UL_IND_t
*
UL_info
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_mac_stats_t
*
stats
)
{
// TODO
int
max_harq_rounds
=
4
;
// TODO define macro
int
num_ucis
=
UL_info
->
uci_ind
.
num_ucis
;
nfapi_nr_uci_t
*
uci_list
=
UL_info
->
uci_ind
.
uci_list
;
for
(
int
i
=
0
;
i
<
num_ucis
;
i
++
)
{
switch
(
uci_list
[
i
].
pdu_type
)
{
case
NFAPI_NR_UCI_PUSCH_PDU_TYPE
:
break
;
case
NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE
:
{
nfapi_nr_uci_pucch_pdu_format_0_1_t
*
uci_pdu
=
&
uci_list
[
i
].
pucch_pdu_format_0_1
;
// handle harq
int
harq_idx_s
=
0
;
// tpc (power control)
sched_ctrl
->
tpc1
=
nr_get_tpc
(
target_snrx10
,
uci_pdu
->
ul_cqi
,
30
);
// iterate over received harq bits
for
(
int
harq_bit
=
0
;
harq_bit
<
uci_pdu
->
harq
->
num_harq
;
harq_bit
++
)
{
// search for the right harq process
for
(
int
harq_idx
=
harq_idx_s
;
harq_idx
<
NR_MAX_NB_HARQ_PROCESSES
;
harq_idx
++
)
{
// if the gNB received ack with a good confidence
if
((
UL_info
->
slot
-
1
)
==
sched_ctrl
->
harq_processes
[
harq_idx
].
feedback_slot
)
{
if
((
uci_pdu
->
harq
->
harq_list
[
harq_bit
].
harq_value
==
1
)
&&
(
uci_pdu
->
harq
->
harq_confidence_level
==
0
))
{
// toggle NDI and reset round
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
}
else
sched_ctrl
->
harq_processes
[
harq_idx
].
round
++
;
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
=
0
;
harq_idx_s
=
harq_idx
+
1
;
// if the max harq rounds was reached
if
(
sched_ctrl
->
harq_processes
[
harq_idx
].
round
==
max_harq_rounds
)
{
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
stats
->
dlsch_errors
++
;
}
break
;
}
// if feedback slot processing is aborted
else
if
(((
UL_info
->
slot
-
1
)
>
sched_ctrl
->
harq_processes
[
harq_idx
].
feedback_slot
)
&&
(
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
))
{
sched_ctrl
->
harq_processes
[
harq_idx
].
round
++
;
if
(
sched_ctrl
->
harq_processes
[
harq_idx
].
round
==
max_harq_rounds
)
{
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
}
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
=
0
;
}
if
(
uci_01
!=
NULL
)
{
// handle harq
int
harq_idx_s
=
0
;
// iterate over received harq bits
for
(
int
harq_bit
=
0
;
harq_bit
<
uci_01
->
harq
->
num_harq
;
harq_bit
++
)
{
// search for the right harq process
for
(
int
harq_idx
=
harq_idx_s
;
harq_idx
<
NR_MAX_NB_HARQ_PROCESSES
;
harq_idx
++
)
{
// if the gNB received ack with a good confidence
if
((
UL_info
->
slot
-
1
)
==
sched_ctrl
->
harq_processes
[
harq_idx
].
feedback_slot
)
{
if
((
uci_01
->
harq
->
harq_list
[
harq_bit
].
harq_value
==
1
)
&&
(
uci_01
->
harq
->
harq_confidence_level
==
0
))
{
// toggle NDI and reset round
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
}
else
sched_ctrl
->
harq_processes
[
harq_idx
].
round
++
;
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
=
0
;
harq_idx_s
=
harq_idx
+
1
;
// if the max harq rounds was reached
if
(
sched_ctrl
->
harq_processes
[
harq_idx
].
round
==
max_harq_rounds
)
{
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
stats
->
dlsch_errors
++
;
}
break
;
}
break
;
}
case
NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE
:
{
nfapi_nr_uci_pucch_pdu_format_2_3_4_t
*
uci_pdu
=
&
uci_list
[
i
].
pucch_pdu_format_2_3_4
;
int
harq_idx_s
=
0
;
int
acknack
;
// tpc (power control)
sched_ctrl
->
tpc1
=
nr_get_tpc
(
target_snrx10
,
uci_pdu
->
ul_cqi
,
30
);
// iterate over received harq bits
for
(
int
harq_bit
=
0
;
harq_bit
<
uci_pdu
->
harq
.
harq_bit_len
;
harq_bit
++
)
{
acknack
=
((
uci_pdu
->
harq
.
harq_payload
[
harq_bit
>>
3
])
>>
harq_bit
)
&
0x01
;
for
(
int
harq_idx
=
harq_idx_s
;
harq_idx
<
NR_MAX_NB_HARQ_PROCESSES
-
1
;
harq_idx
++
)
{
// if the gNB received ack with a good confidence or if the max harq rounds was reached
if
((
UL_info
->
slot
-
1
)
==
sched_ctrl
->
harq_processes
[
harq_idx
].
feedback_slot
)
{
// TODO add some confidence level for when there is no CRC
if
(((
uci_pdu
->
harq
.
harq_crc
!=
1
)
&&
acknack
)
||
(
sched_ctrl
->
harq_processes
[
harq_idx
].
round
==
max_harq_rounds
))
{
// toggle NDI and reset round
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
}
else
sched_ctrl
->
harq_processes
[
harq_idx
].
round
++
;
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
=
0
;
harq_idx_s
=
harq_idx
+
1
;
break
;
}
// if feedback slot processing is aborted
else
if
(((
UL_info
->
slot
-
1
)
>
sched_ctrl
->
harq_processes
[
harq_idx
].
feedback_slot
)
&&
(
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
))
{
sched_ctrl
->
harq_processes
[
harq_idx
].
round
++
;
if
(
sched_ctrl
->
harq_processes
[
harq_idx
].
round
==
max_harq_rounds
)
{
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
}
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
=
0
;
}
break
;
}
}
}
UL_info
->
uci_ind
.
num_ucis
=
0
;
if
(
uci_234
!=
NULL
)
{
int
harq_idx_s
=
0
;
int
acknack
;
// iterate over received harq bits
for
(
int
harq_bit
=
0
;
harq_bit
<
uci_234
->
harq
.
harq_bit_len
;
harq_bit
++
)
{
acknack
=
((
uci_234
->
harq
.
harq_payload
[
harq_bit
>>
3
])
>>
harq_bit
)
&
0x01
;
for
(
int
harq_idx
=
harq_idx_s
;
harq_idx
<
NR_MAX_NB_HARQ_PROCESSES
-
1
;
harq_idx
++
)
{
// if the gNB received ack with a good confidence or if the max harq rounds was reached
if
((
UL_info
->
slot
-
1
)
==
sched_ctrl
->
harq_processes
[
harq_idx
].
feedback_slot
)
{
// TODO add some confidence level for when there is no CRC
if
((
uci_234
->
harq
.
harq_crc
!=
1
)
&&
acknack
)
{
// toggle NDI and reset round
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
}
else
sched_ctrl
->
harq_processes
[
harq_idx
].
round
++
;
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
=
0
;
harq_idx_s
=
harq_idx
+
1
;
// if the max harq rounds was reached
if
(
sched_ctrl
->
harq_processes
[
harq_idx
].
round
==
max_harq_rounds
)
{
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
stats
->
dlsch_errors
++
;
}
break
;
}
// if feedback slot processing is aborted
else
if
(((
UL_info
->
slot
-
1
)
>
sched_ctrl
->
harq_processes
[
harq_idx
].
feedback_slot
)
&&
(
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
))
{
sched_ctrl
->
harq_processes
[
harq_idx
].
round
++
;
if
(
sched_ctrl
->
harq_processes
[
harq_idx
].
round
==
max_harq_rounds
)
{
sched_ctrl
->
harq_processes
[
harq_idx
].
ndi
^=
1
;
sched_ctrl
->
harq_processes
[
harq_idx
].
round
=
0
;
}
sched_ctrl
->
harq_processes
[
harq_idx
].
is_waiting
=
0
;
}
}
}
}
}
/* functionalities of this function have been moved to nr_schedule_uss_dlsch_phytest */
...
...
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
View file @
9de23c84
...
...
@@ -131,6 +131,11 @@ int configure_fapi_dl_pdu(int Mod_id,
uint16_t
*
rbSize
,
uint16_t
*
rbStart
);
void
nr_rx_acknack
(
nfapi_nr_uci_pusch_pdu_t
*
uci_pusch
,
nfapi_nr_uci_pucch_pdu_format_0_1_t
*
uci_01
,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t
*
uci_234
,
NR_UL_IND_t
*
UL_info
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_mac_stats_t
*
stats
);
void
config_uldci
(
NR_BWP_Uplink_t
*
ubwp
,
nfapi_nr_pusch_pdu_t
*
pusch_pdu
,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t
*
pdcch_pdu_rel15
,
...
...
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
View file @
9de23c84
...
...
@@ -78,6 +78,43 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
}
void
handle_nr_uci
(
NR_UL_IND_t
*
UL_info
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_mac_stats_t
*
stats
,
int
target_snrx10
)
{
int
num_ucis
=
UL_info
->
uci_ind
.
num_ucis
;
nfapi_nr_uci_t
*
uci_list
=
UL_info
->
uci_ind
.
uci_list
;
for
(
int
i
=
0
;
i
<
num_ucis
;
i
++
)
{
switch
(
uci_list
[
i
].
pdu_type
)
{
case
NFAPI_NR_UCI_PUSCH_PDU_TYPE
:
break
;
case
NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE
:
{
nfapi_nr_uci_pucch_pdu_format_0_1_t
*
uci_pdu
=
&
uci_list
[
i
].
pucch_pdu_format_0_1
;
// tpc (power control)
sched_ctrl
->
tpc1
=
nr_get_tpc
(
target_snrx10
,
uci_pdu
->
ul_cqi
,
30
);
if
(
(
uci_pdu
->
pduBitmap
>>
1
)
&
0x01
)
nr_rx_acknack
(
NULL
,
uci_pdu
,
NULL
,
UL_info
,
sched_ctrl
,
stats
);
break
;
}
case
NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE
:
{
nfapi_nr_uci_pucch_pdu_format_2_3_4_t
*
uci_pdu
=
&
uci_list
[
i
].
pucch_pdu_format_2_3_4
;
// tpc (power control)
sched_ctrl
->
tpc1
=
nr_get_tpc
(
target_snrx10
,
uci_pdu
->
ul_cqi
,
30
);
if
(
(
uci_pdu
->
pduBitmap
>>
1
)
&
0x01
)
nr_rx_acknack
(
NULL
,
NULL
,
uci_pdu
,
UL_info
,
sched_ctrl
,
stats
);
break
;
}
}
}
UL_info
->
uci_ind
.
num_ucis
=
0
;
}
void
handle_nr_ulsch
(
NR_UL_IND_t
*
UL_info
,
NR_UE_sched_ctrl_t
*
sched_ctrl
,
NR_mac_stats_t
*
stats
)
{
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment