Commit 005d1cd0 authored by Sakthivel Velumani's avatar Sakthivel Velumani

predefined beam array

parent 3b49e2d1
......@@ -760,14 +760,11 @@ void tx_rf(RU_t *ru,int frame,int slot, uint64_t timestamp) {
// bit 11 enables the gpio programming
int beam=0;
if (ru->common.beam_id &&
((ru->common.beam_id[0][slot*fp->symbols_per_slot] < 8) ||
(ru->common.beam_id[0][slot*fp->symbols_per_slot] == 255))) {
(slot%10 == 0) &&
(ru->common.beam_id[0][slot*fp->symbols_per_slot] < 8)) {
beam = ru->common.beam_id[0][slot*fp->symbols_per_slot] | 8;
LOG_D(HW,"slot %d, beam %d\n",slot,beam);
}
else {
LOG_E(HW,"Beam index cannot be greater than 7. Attemping beam index is %d\n",ru->common.beam_id[0][slot*fp->symbols_per_slot]);
}
flags |= beam<<8;
LOG_D(HW,"slot %d, beam %d\n",slot,beam);
......
......@@ -553,12 +553,15 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
// handle beamforming ID
// each antenna port is assigned a beam_index
// since PHY can only handle BF on slot basis we set the whole slot
// first check if this slot has not already been allocated to another beam
// Comment by SV: analog beam switching in FR2 is done once per tdd period.
// so the beam has to be switched much earlier than the actual Tx slot
// for this reason we copy the beam id to phy in nr_schedule_response()
/*
if ((gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot] == 255) ||
(gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot] ==
rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx)) {
printf("pdsch beam %d\n",rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx);
memset(&gNB->common_vars.beam_id[0][slot*frame_parms->symbols_per_slot],
rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx,
frame_parms->symbols_per_slot*get_tdd_period_in_slots(
......@@ -568,6 +571,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
else {
LOG_W(PHY,"beam index for PDSCH allocation already taken\n");
}
*/
for (int layer = 0; layer<rel15->nrOfLayers; layer++)
free16(txdataF_precoding[layer],2*14*frame_parms->ofdm_symbol_size);
free16(txdataF_precoding,rel15->nrOfLayers);
......
......@@ -149,6 +149,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
AssertFatal(RC.gNB[Mod_id]!=NULL,"RC.gNB[%d] is null\n",Mod_id);
gNB = RC.gNB[Mod_id];
NR_DL_FRAME_PARMS *fp=&gNB->frame_parms;
start_meas(&gNB->schedule_response_stats);
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
......@@ -160,6 +161,15 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO){
uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus;
uint8_t number_tx_data_pdu = (TX_req == NULL) ? 0 : TX_req->Number_of_PDUs;
// Copy analog beam index from MAC to PHY
int tdd_period_in_slots = get_tdd_period_in_slots(gNB->gNB_config.tdd_table.tdd_period.value,
fp->slots_per_frame);
for (int i=0; i<fp->slots_per_frame/tdd_period_in_slots; i++) {
memset(&gNB->common_vars.beam_id[0][i*tdd_period_in_slots*fp->symbols_per_slot],
Sched_INFO->tdd_beam_association[i],
fp->symbols_per_slot*tdd_period_in_slots*sizeof(uint8_t));
}
if (NFAPI_MODE == NFAPI_MONOLITHIC){
if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
......
......@@ -97,16 +97,6 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
T(T_GNB_PHY_MIB, T_INT(0) /* module ID */, T_INT(frame), T_INT(slot), T_BUFFER(bch, 3));
}
// Beam_id is currently used only for FR2
if (fp->freq_range==nr_FR2){
LOG_D(PHY,"slot %d, ssb_index %d, beam %d\n",slot,ssb_index,cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value);
// PHY can switch beams only once per TDD
memset(&gNB->common_vars.beam_id[0][slot*fp->symbols_per_slot],
cfg->ssb_table.ssb_beam_id_list[ssb_index].beam_id.value,
fp->symbols_per_slot*get_tdd_period_in_slots(
gNB->gNB_config.tdd_table.tdd_period.value,fp->slots_per_frame)*sizeof(uint8_t));
}
nr_generate_pbch(&ssb_pdu,
gNB->nr_pbch_interleaver,
&txdataF[0][txdataF_offset],
......@@ -137,12 +127,6 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.txdataF[aa][txdataF_offset],0,fp->samples_per_slot_wCP*sizeof(int32_t));
}
//clear the beam index array every frame
if (slot == 0) {
for (aa=0; aa<cfg->carrier_config.num_tx_ant.value; aa++) {
memset(&gNB->common_vars.beam_id[aa][0],255,fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
}
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_gNB_COMMON_TX,1);
for (int i=0; i<fp->Lmax; i++) {
......
......@@ -123,16 +123,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
NR_COMMON_channels_t *cc = gNB->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
if (slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) {
//FR2
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
AssertFatal(tdd,"Dynamic TDD not handled yet\n");
const int nb_periods_per_frame = get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
// re-initialization of tdd_beam_association at beginning of frame
for (int i=0; i<nb_periods_per_frame; i++)
gNB->tdd_beam_association[i] = -1;
}
gNB->frame = frame;
gNB->slot = slot;
......
......@@ -446,6 +446,24 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
}
}
NR_COMMON_channels_t *cc = mac->common_channels;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
if (UL_info->slot==0 && (*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]>=257)) {
const NR_TDD_UL_DL_Pattern_t *tdd = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int nr_mix_slots = tdd->nrofDownlinkSymbols != 0 || tdd->nrofUplinkSymbols != 0;
const int nr_slots_period = tdd->nrofDownlinkSlots + tdd->nrofUplinkSlots + nr_mix_slots;
const int nb_periods_per_frame = n / nr_slots_period;
// re-initialization of tdd_beam_association at beginning of frame (only for FR2)
// hardcoding beam index for TDD periods in a frame because of PHY limitation to switching beams.
// this beam to TDD period config would work only with PRACH config index 52 for FR2
for (int i=0; i<nb_periods_per_frame/2; i++) {
mac->tdd_beam_association[i] = i;
mac->tdd_beam_association[i+4] = i;
}
}
handle_nr_rach(UL_info);
handle_nr_uci(UL_info);
// clear UL DCI prior to handling ULSCH
......@@ -491,6 +509,7 @@ void NR_UL_indication(NR_UL_IND_t *UL_info) {
sched_info->UL_tti_req = mac->UL_tti_req[CC_id];
sched_info->TX_req = &mac->TX_req[CC_id];
sched_info->tdd_beam_association = mac->tdd_beam_association;
#ifdef DUMP_FAPI
dump_dl(sched_info);
#endif
......
......@@ -98,6 +98,8 @@ typedef struct {
nfapi_nr_ul_dci_request_t *UL_dci_req;
/// Pointers to DL SDUs
nfapi_nr_tx_data_request_t *TX_req;
/// Analog beam index array
int16_t *tdd_beam_association;
} NR_Sched_Rsp_t;
typedef struct {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment