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Commit 042e45ef authored by hardy's avatar hardy
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Merge remote-tracking branch 'origin/nr-dl-mimo-2layer' into integration_2021_wk28_b

parents 3c64c73d 9f070b74
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cmake_targets/autotests/test_case_list.xml
View file @ 042e45ef
......@@ -1101,7 +1101,9 @@
(Test16: 11 PTRS, 0 Interpolated Symbols),
(Test17: Mapping type A, 2 DMRS Symbols),
(Test18: Mapping type A, 3 DMRS Symbols),
(Test19: Mapping type B, 4 DMRS Symbols)</desc>
(Test19: Mapping type B, 4 DMRS Symbols),
(Test20: 4x4 MIMO, 1 Layer),
(Test21: 4x4 MIMO, 2 Layers)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
......@@ -1126,8 +1128,10 @@
-n100 -s5 -T 2 0 4
-n100 -s2 -U 2 0 1
-n100 -s2 -U 2 0 2
-n100 -s2 -U 2 1 3</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18 nr_dlsim.test19</tags>
-n100 -s2 -U 2 1 3
-n10 -s20 -U 3 0 0 2 -gR -x1 -y4 -z4
-n10 -s20 -U 3 0 0 2 -gR -x2 -y4 -z4</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18 nr_dlsim.test19 nr_dlsim.test20 nr_dlsim.test21</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
......@@ -1314,11 +1318,11 @@
-n100 -s5 -T 2 1 2 -U 2 0 2
-n100 -s5 -T 2 2 2 -U 2 1 2
-n100 -s5 -a4 -b8 -T 2 1 2 -U 2 1 3
-n100 -s2 -Z
-n100 -s2 -Z -r75
-n100 -s2 -Z -r216 -R217
-n100 -s2 -Z -r270 -R273
-n100 -s2 -Z -U 2 0 2
-n100 -s5 -Z
-n100 -s5 -Z -r75
-n50 -s5 -Z -r216 -R217
-n50 -s5 -Z -r270 -R273
-n100 -s5 -Z -U 2 0 2
-n100 -m16 -s10 -z2</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15</tags>
......
doc/FEATURE_SET.md
View file @ 042e45ef
......@@ -257,7 +257,7 @@ The following features are valid for the gNB and the 5G-NR UE.
* FDD
* Normal CP
* 30 kHz subcarrier spacing
* Bandwidths up to 80MHz (217 Physical Resource Blocks)
* Bandwidths: 10, 20, 40, 80, 100MHz (273 Physical Resource Blocks)
* Intermediate downlink and uplink frequencies to interface with IF equipment
* Single antenna port (single beam)
* Slot format: 14 OFDM symbols in UL or DL
......@@ -277,10 +277,20 @@ The following features are valid for the gNB and the 5G-NR UE.
- user-specific search space configured by RRC
- DCI formats: 00, 10 (01 and 11 **under integration**)
* Generation of NR-PDSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- Single symbol DMRS, DMRS-TypeA-Position Pos2, DMRS configuration type 1
- PDSCH mapping type A
- PDSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1, 2 and 4 TX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
* NR-CSI Generation of sequence at PHY (**under integration**)
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1 RX antenna
- Support for 1 layer
* NR-PUCCH
- Format 0 (2 bits, mainly for ACK/NACK)
- Format 2 (up to 64 bits, mainly for CSI feedback)
......@@ -320,27 +330,33 @@ The following features are valid for the gNB and the 5G-NR UE.
- Creates TUN interface to PDCP to inject and receive user-place traffic
- Will only work with OAI gNB configured in the same mode
## UE PHY Layer ##
## NR UE PHY Layer ##
* Initial synchronization
* Time tracking based on PBCH DMRS
* Time tracking based on PBCH DMRS
* Frequency offset estimation
* PBCH RX
* PDCCH RX
* PDSCH RX, including a first version of dual stream receiver for PDSCH
* 30KHz SCS for FR1 and 120 KHz SCS for FR2
* Generation of NR-PSS/NR-SSS
* Reception of NR-PSS/NR-SSS
* NR-PBCH supports multiple SSBs and flexible periodicity
* Generation of NR-PDCCH for SIB1 (including generation of DCI, polar encoding, scrambling, modulation, RB mapping, etc)
* Reception of NR-PDCCH for SIB1 (including reception of DCI, polar decoding, de-scrambling, de-modulation, RB de-mapping, etc)
- common search space configured by MIB
- user-specific search space configured by RRC
- DCI formats: 00, 10 (01 and 11 **under integration**)
* Generation of NR-PDSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- Single symbol DMRS, DMRS-TypeA-Position Pos2, DMRS configuration type 1
- PDSCH mapping type A
* Reception of NR-PDSCH (including Segmentation, LDPC decoding, rate de-matching, de-scrambling, de-modulation, RB de-mapping, etc).
- PDSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1, 2 and 4 RX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
* NR-CSI Generation of sequence at PHY (**under integration**)
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
- DMRS configuration type 1 and 2
- Single and multiple DMRS symbols
- PTRS support
- Support for 1 TX antenna
- Support for 1 layer
* NR-PUCCH
- Format 0 (2 bits, mainly for ACK/NACK)
- Format 2 (up to 64 bits, mainly for CSI feedback)
......@@ -351,7 +367,7 @@ The following features are valid for the gNB and the 5G-NR UE.
* Encoder and decoder for short block
## UE Higher Layers ##
## NR UE Higher Layers ##
**UE MAC**
* Minimum system information (MSI)
......
executables/nr-softmodem-common.h
View file @ 042e45ef
......@@ -69,6 +69,7 @@
#define CONFIG_HLP_EXMCAL "Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n"
#define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
#define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
#define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n"
#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
#define CONFIG_HLP_PRB "Set the PRB, valid values: 6, 25, 50, 100 \n"
#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
......
executables/nr-softmodem.h
View file @ 042e45ef
......@@ -22,6 +22,7 @@
{"A" , CONFIG_HLP_TADV, 0, uptr:&timing_advance, defintval:0, TYPE_UINT, 0}, \
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
{"m" , CONFIG_HLP_DLMCS_PHYTEST,0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"l" , CONFIG_HLP_DLNL_PHYTEST,0, uptr:&target_dl_Nl, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS_PHYTEST,0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
{"M" , CONFIG_HLP_DLBW_PHYTEST,0, uptr:&target_dl_bw, defintval:0, TYPE_UINT, 0}, \
{"T" , CONFIG_HLP_ULBW_PHYTEST,0, uptr:&target_ul_bw, defintval:0, TYPE_UINT, 0}, \
......@@ -34,6 +35,7 @@
#include "threads_t.h"
extern threads_t threads;
extern uint32_t target_dl_mcs;
extern uint32_t target_dl_Nl;
extern uint32_t target_ul_mcs;
extern uint32_t target_dl_bw;
extern uint32_t target_ul_bw;
......
executables/nr-uesoftmodem.c
View file @ 042e45ef
......@@ -364,8 +364,8 @@ void init_openair0(void) {
openair0_cfg[card].num_rb_dl = frame_parms->N_RB_DL;
openair0_cfg[card].clock_source = get_softmodem_params()->clock_source;
openair0_cfg[card].time_source = get_softmodem_params()->timing_source;
openair0_cfg[card].tx_num_channels = min(2, frame_parms->nb_antennas_tx);
openair0_cfg[card].rx_num_channels = min(2, frame_parms->nb_antennas_rx);
openair0_cfg[card].tx_num_channels = min(4, frame_parms->nb_antennas_tx);
openair0_cfg[card].rx_num_channels = min(4, frame_parms->nb_antennas_rx);
LOG_I(PHY, "HW: Configuring card %d, sample_rate %f, tx/rx num_channels %d/%d, duplex_mode %s\n",
card,
......
openair1/PHY/INIT/nr_init.c
View file @ 042e45ef
......@@ -595,27 +595,6 @@ void init_nr_transport(PHY_VARS_gNB *gNB) {
exit(-1);
}
/*
LOG_I(PHY,"Initializing nFAPI for ULSCH, UE %d\n",i);
// [hna] added here for RT implementation
uint8_t harq_pid = 0;
nfapi_nr_ul_config_ulsch_pdu *rel15_ul = &gNB->ulsch[i+1][j]->harq_processes[harq_pid]->ulsch_pdu;
// --------- setting rel15_ul parameters ----------
rel15_ul->rnti = 0x1234;
rel15_ul->ulsch_pdu_rel15.start_rb = 0;
rel15_ul->ulsch_pdu_rel15.number_rbs = 50;
rel15_ul->ulsch_pdu_rel15.start_symbol = 2;
rel15_ul->ulsch_pdu_rel15.number_symbols = 12;
rel15_ul->ulsch_pdu_rel15.length_dmrs = gNB->dmrs_UplinkConfig.pusch_maxLength;
rel15_ul->ulsch_pdu_rel15.Qm = 2;
rel15_ul->ulsch_pdu_rel15.R = 679;
rel15_ul->ulsch_pdu_rel15.mcs = 9;
rel15_ul->ulsch_pdu_rel15.rv = 0;
rel15_ul->ulsch_pdu_rel15.n_layers = 1;
///////////////////////////////////////////////////
*/
}
}
......
openair1/PHY/INIT/nr_init_ru.c
View file @ 042e45ef
......@@ -131,15 +131,15 @@ int nr_phy_init_RU(RU_t *ru) {
}
AssertFatal(ru->nb_bfw==(beam_count*ru->nb_tx),"Number of beam weights from config file is %d while the expected number is %d",ru->nb_bfw,(beam_count*ru->nb_tx));
int l_ind = 0;
for (i=0; i<ru->num_gNB; i++) {
int l_ind = 0;
for (p=0;p<ru->nb_log_antennas;p++) {
//if ((fp->L_ssb >> (63-p)) & 0x01) {
ru->beam_weights[i][p] = (int32_t **)malloc16_clear(ru->nb_tx*sizeof(int32_t*));
for (j=0; j<ru->nb_tx; j++) {
ru->beam_weights[i][p][j] = (int32_t *)malloc16_clear(fp->ofdm_symbol_size*sizeof(int32_t));
for (re=0; re<fp->ofdm_symbol_size; re++)
ru->beam_weights[i][p][j][re] = ru->bw_list[j][l_ind];
ru->beam_weights[i][p][j][re] = ru->bw_list[i][l_ind];
//printf("Beam Weight %08x for beam %d and tx %d\n",ru->bw_list[i][l_ind],p,j);
l_ind++;
} // for j
......
openair1/PHY/INIT/nr_init_ue.c
View file @ 042e45ef
......@@ -143,8 +143,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
uint16_t N_n_scid[2] = {0,1}; // [HOTFIX] This is a temporary implementation of scramblingID0 and scramblingID1 which are given by DMRS-UplinkConfig
int n_scid;
abstraction_flag = 0;
// dmrs_UplinkConfig_t *dmrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig;
// ptrs_UplinkConfig_t *ptrs_Uplink_Config = &ue->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
LOG_I(PHY, "Initializing UE vars (abstraction %u) for gNB TXant %u, UE RXant %u\n", abstraction_flag, fp->nb_antennas_tx, fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_gNB_INST);
phy_init_nr_top(ue);
......@@ -188,29 +186,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
/////////////////////////PUSCH DMRS init/////////////////////////
///////////
// default values until overwritten by RRCConnectionReconfiguration
for (i=0; i<MAX_NR_OF_UL_ALLOCATIONS; i++) {
ue->pusch_config.pusch_TimeDomainResourceAllocation[i] = (PUSCH_TimeDomainResourceAllocation_t *)malloc16(sizeof(PUSCH_TimeDomainResourceAllocation_t));
ue->pusch_config.pusch_TimeDomainResourceAllocation[i]->mappingType = typeB;
}
for (i=0;i<MAX_NR_OF_DL_ALLOCATIONS;i++){
ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i] = (PDSCH_TimeDomainResourceAllocation_t *)malloc16(sizeof(PDSCH_TimeDomainResourceAllocation_t));
ue->PDSCH_Config.pdsch_TimeDomainResourceAllocation[i]->mappingType = typeA;
}
//------------- config DMRS parameters--------------//
// dmrs_Uplink_Config->pusch_dmrs_type = pusch_dmrs_type1;
// dmrs_Uplink_Config->pusch_dmrs_AdditionalPosition = pusch_dmrs_pos0;
// dmrs_Uplink_Config->pusch_maxLength = pusch_len1;
//-------------------------------------------------//
ue->dmrs_DownlinkConfig.pdsch_dmrs_type = pdsch_dmrs_type1;
ue->dmrs_DownlinkConfig.pdsch_dmrs_AdditionalPosition = pdsch_dmrs_pos0;
ue->dmrs_DownlinkConfig.pdsch_maxLength = pdsch_len1;
//-------------------------------------------------//
ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
pusch_dmrs = ue->nr_gold_pusch_dmrs;
n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
......
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
View file @ 042e45ef
......@@ -111,9 +111,10 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
int32_t *output,
unsigned short p,
unsigned char lp,
unsigned short nb_pdsch_rb)
unsigned short nb_pdsch_rb,
uint8_t config_type)
{
int8_t w,config_type;
int8_t w;
short *mod_table;
unsigned char idx=0;
......@@ -121,18 +122,16 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
array_of_w *wf;
array_of_w *wt;
config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
wf = (config_type==pdsch_dmrs_type1) ? wf1 : wf2;
wt = (config_type==pdsch_dmrs_type1) ? wt1 : wt2;
wf = (config_type==NFAPI_NR_DMRS_TYPE1) ? wf1 : wf2;
wt = (config_type==NFAPI_NR_DMRS_TYPE1) ? wt1 : wt2;
if (config_type > 1)
LOG_E(PHY,"Bad PDSCH DMRS config type %d\n", config_type);
if ((p>=1000) && (p<((config_type==pdsch_dmrs_type1) ? 1008 : 1012))) {
if ((p>=1000) && (p<((config_type==NFAPI_NR_DMRS_TYPE1) ? 1008 : 1012))) {
if (ue->frame_parms.Ncp == NORMAL) {
for (int i=0; i<nb_pdsch_rb*((config_type==pdsch_dmrs_type1) ? 6:4); i++) {
for (int i=0; i<nb_pdsch_rb*((config_type==NFAPI_NR_DMRS_TYPE1) ? 6:4); i++) {
w = (wf[p-1000][i&1])*(wt[p-1000][lp]);
mod_table = (w==1) ? nr_rx_mod_table : nr_rx_nmod_table;
......
openair1/PHY/NR_REFSIG/refsig_defs_ue.h
View file @ 042e45ef
......@@ -52,7 +52,8 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
int32_t *output,
unsigned short p,
unsigned char lp,
unsigned short nb_pdsch_rb);
unsigned short nb_pdsch_rb,
uint8_t config_type);
void nr_gold_pbch(PHY_VARS_NR_UE* ue);
......
openair1/PHY/NR_TRANSPORT/nr_dci.c
View file @ 042e45ef
......@@ -258,13 +258,11 @@ void nr_generate_dci_top(PHY_VARS_gNB *gNB,
AssertFatal(pdcch_pdu!=NULL || ul_dci_pdu!=NULL,"At least one pointer has to be !NULL\n");
if (pdcch_pdu && ul_dci_pdu) {
if (pdcch_pdu) {
nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
else if (pdcch_pdu)
nr_generate_dci(gNB,&pdcch_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
else
if (ul_dci_pdu) {
nr_generate_dci(gNB,&ul_dci_pdu->pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
}
}
openair1/PHY/NR_TRANSPORT/nr_dlsch.c
View file @ 042e45ef
......@@ -448,7 +448,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
(void*)&txdataF_precoding[ap][2*(l*frame_parms->ofdm_symbol_size + txdataF_offset+ k)],
NR_NB_SC_PER_RB*sizeof(int32_t));
else
memset((void*)&txdataF[ap][rel15->StartSymbolIndex*frame_parms->ofdm_symbol_size + txdataF_offset +k],
memset((void*)&txdataF[ap][l*frame_parms->ofdm_symbol_size + txdataF_offset + k],
0,
NR_NB_SC_PER_RB*sizeof(int32_t));
k += NR_NB_SC_PER_RB;
......
openair1/PHY/NR_TRANSPORT/nr_dlsch_coding.c
View file @ 042e45ef
......@@ -192,14 +192,15 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
AssertFatal(harq->d[r], "cannot allocate harq->d[%d]\n", r); // max size for coded output
bzero(harq->c[r], 8448);
bzero(harq->d[r], (3 * 8448));
harq->e = malloc16(14 * N_RB * 12 * 8);
AssertFatal(harq->e, "cannot allocate harq->e\n");
bzero(harq->e, 14 * N_RB * 12 * 8);
harq->f = malloc16(14 * N_RB * 12 * 8);
AssertFatal(harq->f, "cannot allocate harq->f\n");
bzero(harq->f, 14 * N_RB * 12 * 8);
}
harq->e = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
AssertFatal(harq->e, "cannot allocate harq->e\n");
bzero(harq->e, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
harq->f = malloc16(N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
AssertFatal(harq->f, "cannot allocate harq->f\n");
bzero(harq->f, N_RB * NR_SYMBOLS_PER_SLOT * NR_NB_SC_PER_RB * 8 * NR_MAX_NB_LAYERS);
return(dlsch);
}
......
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
View file @ 042e45ef
......@@ -34,17 +34,14 @@
/*!
\brief This function performs channel estimation including frequency and temporal interpolation
\param phy_vars_ue Pointer to UE PHY variables
\param eNB_id Index of target eNB
\param eNB_offset Offset for interfering eNB (in terms cell ID mod 3)
\param ue Pointer to UE PHY variables
\param gNB_id Index of target gNB
\param Ns slot number (0..19)
\param p antenna port
\param l symbol within slot
\param symbol symbol within frame
\param symbol symbol within slot
*/
int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
unsigned short coreset_start_subcarrier,
......@@ -52,7 +49,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
int dmrss,
......@@ -60,7 +57,7 @@ int nr_pbch_dmrs_correlation(PHY_VARS_NR_UE *ue,
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
unsigned char Ns,
unsigned char symbol,
int dmrss,
......@@ -69,7 +66,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
uint8_t eNB_offset,
uint8_t gNB_id,
bool is_SI,
unsigned char Ns,
unsigned short p,
......@@ -80,7 +77,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
void nr_adjust_synch_ue(NR_DL_FRAME_PARMS *frame_parms,
PHY_VARS_NR_UE *ue,
module_id_t eNB_id,
module_id_t gNB_id,
uint8_t frame,
uint8_t subframe,
unsigned char clear,
......@@ -102,7 +99,7 @@ void nr_ue_rrc_measurements(PHY_VARS_NR_UE *ue,
void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
uint32_t rx_power_fil_dB,
uint8_t eNB_id);
uint8_t gNB_id);
int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index);
......@@ -111,11 +108,10 @@ void nr_pdsch_ptrs_processing(PHY_VARS_NR_UE *ue,
NR_DL_FRAME_PARMS *frame_parms,
NR_DL_UE_HARQ_t *dlsch0_harq,
NR_DL_UE_HARQ_t *dlsch1_harq,
uint8_t eNB_id,
uint8_t gNB_id,
uint8_t nr_slot_rx,
unsigned char symbol,
uint32_t nb_re_pdsch,
unsigned char harq_pid,
uint16_t rnti,
RX_type_t rx_type);
......
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
View file @ 042e45ef
......@@ -761,7 +761,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++)
avgs = cmax(avgs, avgP[aarx]);
log2_maxh = (log2_approx(avgs) / 2) + 5; //+frame_parms->nb_antennas_rx;
log2_maxh = (log2_approx(avgs) / 2) + 1; //+frame_parms->nb_antennas_rx;
#ifdef UE_DEBUG_TRACE
LOG_D(PHY,"slot %d: pdcch log2_maxh = %d (%d,%d)\n",slot,log2_maxh,avgP[0],avgs);
#endif
......
openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_llr_computation.c
View file @ 042e45ef
......@@ -629,16 +629,16 @@ __m128i tmp_result4 __attribute__ ((aligned(16)));
//----------------------------------------------------------------------------------------------
int nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint8_t beamforming_mode)
{
uint32_t *rxF = (uint32_t*)&rxdataF_comp[0][((int32_t)symbol*nb_rb*12)];
uint32_t *rxF = (uint32_t *)&rxdataF_comp[((int32_t)symbol*nb_rb*12)];
uint32_t *llr32;
int i;
......@@ -670,24 +670,23 @@ int nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
//----------------------------------------------------------------------------------------------
void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t *dl_ch_mag,
uint8_t symbol,
uint32_t len,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
int16_t **llr32p,
uint8_t beamforming_mode)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxF = (__m128i*)&rxdataF_comp[0][(symbol*nb_rb*12)];
__m128i *rxF = (__m128i*)&rxdataF_comp[(symbol*nb_rb*12)];
__m128i *ch_mag;
__m128i llr128[2];
uint32_t *llr32;
#elif defined(__arm__)
int16x8_t *rxF = (int16x8_t*)&rxdataF_comp[0][(symbol*nb_rb*12)];
int16x8_t *rxF = (int16x8_t*)&rxdataF_comp[(symbol*nb_rb*12)];
int16x8_t *ch_mag;
int16x8_t xmm0;
int16_t *llr16;
......@@ -699,30 +698,17 @@ void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
#if defined(__x86_64__) || defined(__i386__)
if (first_symbol_flag==1) {
llr32 = (uint32_t*)dlsch_llr;
} else {
llr32 = (uint32_t*)*llr32p;
}
#elif defined(__arm__)
if (first_symbol_flag==1) {
llr16 = (int16_t*)dlsch_llr;
} else {
llr16 = (int16_t*)*llr32p;
}
#endif
#if defined(__x86_64__) || defined(__i386__)
ch_mag = (__m128i*)&dl_ch_mag[0][(symbol*nb_rb*12)];
ch_mag = (__m128i*)&dl_ch_mag[(symbol*nb_rb*12)];
#elif defined(__arm__)
ch_mag = (int16x8_t*)&dl_ch_mag[0][(symbol*nb_rb*12)];
ch_mag = (int16x8_t*)&dl_ch_mag[(symbol*nb_rb*12)];
#endif
// update output pointer according to number of REs in this symbol (<<2 because 4 bits per RE)
if (first_symbol_flag == 1)
*llr32p = dlsch_llr + (len<<2);
else
*llr32p += (len<<2);
// printf("len=%d\n", len);
len_mod4 = len&3;
......@@ -786,47 +772,35 @@ void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
//----------------------------------------------------------------------------------------------
void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t *dl_ch_mag,
int32_t *dl_ch_magb,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint32_t llr_offset,
uint8_t beamforming_mode)
{
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxF = (__m128i*)&rxdataF_comp[0][(symbol*nb_rb*12)];
__m128i *rxF = (__m128i*)&rxdataF_comp[(symbol*nb_rb*12)];
__m128i *ch_mag,*ch_magb;
#elif defined(__arm__)
int16x8_t *rxF = (int16x8_t*)&rxdataF_comp[0][(symbol*nb_rb*12)];
int16x8_t *rxF = (int16x8_t*)&rxdataF_comp[(symbol*nb_rb*12)];
int16x8_t *ch_mag,*ch_magb,xmm1,xmm2;
#endif
int i,len2;
unsigned char len_mod4;
short *llr;
int16_t *llr2;
int8_t *pllr_symbol;
/*
if (first_symbol_flag==1)
llr = dlsch_llr;
else
llr = *llr_save;
*/
llr = dlsch_llr;
pllr_symbol = (int8_t*)dlsch_llr;
pllr_symbol += llr_offset;
llr2 = dlsch_llr;
#if defined(__x86_64__) || defined(__i386__)
ch_mag = (__m128i*)&dl_ch_mag[0][(symbol*nb_rb*12)];
ch_magb = (__m128i*)&dl_ch_magb[0][(symbol*nb_rb*12)];
ch_mag = (__m128i*)&dl_ch_mag[(symbol*nb_rb*12)];
ch_magb = (__m128i*)&dl_ch_magb[(symbol*nb_rb*12)];
#elif defined(__arm__)
ch_mag = (int16x8_t*)&dl_ch_mag[0][(symbol*nb_rb*12)];
ch_magb = (int16x8_t*)&dl_ch_magb[0][(symbol*nb_rb*12)];
ch_mag = (int16x8_t*)&dl_ch_mag[(symbol*nb_rb*12)];
ch_magb = (int16x8_t*)&dl_ch_magb[(symbol*nb_rb*12)];
#endif
// printf("nr_dlsch_64qam_llr: symbol %d,nb_rb %d, len %d,pbch_pss_sss_adjust %d\n",symbol,nb_rb,len,pbch_pss_sss_adjust);
......@@ -838,9 +812,6 @@ void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
dlsch_llr,
pllr_symbol);*/
llr2 = llr;
llr += (len*6);
len_mod4 =len&3;
len2=len>>2; // length in quad words (4 REs)
len2+=((len_mod4==0)?0:1);
......@@ -1095,43 +1066,29 @@ void nr_dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
//----------------------------------------------------------------------------------------------
void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t **dl_ch_magr,
int32_t *dl_ch_mag,
int32_t *dl_ch_magb,
int32_t *dl_ch_magr,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint32_t llr_offset,
uint8_t beamforming_mode)
{
__m128i *rxF = (__m128i*)&rxdataF_comp[0][(symbol*nb_rb*12)];
__m128i *rxF = (__m128i*)&rxdataF_comp[(symbol*nb_rb*12)];
__m128i *ch_mag,*ch_magb,*ch_magr;
int i,len2;
unsigned char len_mod4;
short *llr;
int16_t *llr2;
int8_t *pllr_symbol;
/*
if (first_symbol_flag==1)
llr = dlsch_llr;
else
llr = *llr_save;
*/
llr = dlsch_llr;
pllr_symbol = (int8_t*)dlsch_llr;
pllr_symbol += llr_offset;
llr2 = dlsch_llr;
ch_mag = (__m128i*)&dl_ch_mag[0][(symbol*nb_rb*12)];
ch_magb = (__m128i*)&dl_ch_magb[0][(symbol*nb_rb*12)];
ch_magr = (__m128i*)&dl_ch_magr[0][(symbol*nb_rb*12)];
llr2 = llr;
llr += (len*8);
ch_mag = (__m128i*)&dl_ch_mag[(symbol*nb_rb*12)];
ch_magb = (__m128i*)&dl_ch_magb[(symbol*nb_rb*12)];
ch_magr = (__m128i*)&dl_ch_magr[(symbol*nb_rb*12)];
len_mod4 =len&3;
len2=len>>2; // length in quad words (4 REs)
......
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
View file @ 042e45ef
......@@ -471,7 +471,7 @@ int nr_dlsch_64qam_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
@param beamforming_mode beamforming mode
*/
int32_t nr_dlsch_qpsk_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
uint8_t symbol,
uint32_t len,
......@@ -505,14 +505,13 @@ int32_t nr_dlsch_qpsk_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
uint32_t rb_alloc);
void nr_dlsch_16qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t *dl_ch_mag,
uint8_t symbol,
uint32_t len,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
int16_t **llr32p,
uint8_t beamforming_mode);
/**
\brief This function generates log-likelihood ratios (decoder input) for single-stream 16QAM received waveforms
......@@ -553,28 +552,26 @@ void dlsch_64qam_llr_SIC(NR_DL_FRAME_PARMS *frame_parms,
uint32_t rb_alloc);
void nr_dlsch_64qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t *dl_ch_mag,
int32_t *dl_ch_magb,
uint8_t symbol,
uint32_t len,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint32_t llr_offset,
uint8_t beamforming_mode);
void nr_dlsch_256qam_llr(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t *rxdataF_comp,
int16_t *dlsch_llr,
int32_t **dl_ch_mag,
int32_t **dl_ch_magb,
int32_t **dl_ch_magr,
int32_t *dl_ch_mag,
int32_t *dl_ch_magb,
int32_t *dl_ch_magr,
uint8_t symbol,
uint32_t len,
uint8_t first_symbol_flag,
uint16_t nb_rb,
uint32_t llr_offset,
uint8_t beamforming_mode);
/** \fn dlsch_siso(NR_DL_FRAME_PARMS *frame_parms,
......@@ -807,7 +804,7 @@ void nr_dlsch_channel_compensation(int32_t **rxdataF_ext,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t nb_aatx,
uint8_t symbol,
uint8_t start_symbol,
int length,
uint8_t first_symbol_flag,
uint8_t mod_order,
uint16_t nb_rb,
......@@ -891,13 +888,15 @@ void nr_dlsch_channel_level_median(int **dl_ch_estimates_ext,
int start_point);
void nr_dlsch_detection_mrc(int **rxdataF_comp,
int ***rho,
int **dl_ch_mag,
int **dl_ch_magb,
short n_tx,
short n_rx,
unsigned char symbol,
unsigned short nb_rb);
int ***rho,
int **dl_ch_mag,
int **dl_ch_magb,
int **dl_ch_magr,
short n_tx,
short n_rx,
unsigned char symbol,
unsigned short nb_rb,
int length);
void nr_dlsch_detection_mrc_core(int **rxdataF_comp,
int **rxdataF_comp_i,
......
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
View file @ 042e45ef
......@@ -114,7 +114,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms;
NR_UE_PUSCH *pusch_ue = UE->pusch_vars[thread_id][gNB_id];
// ptrs_UplinkConfig_t *ptrs_Uplink_Config = &UE->pusch_config.dmrs_UplinkConfig.ptrs_UplinkConfig;
uint8_t num_of_codewords = 1; // tmp assumption
int Nid_cell = 0;
......
openair1/PHY/defs_nr_UE.h
View file @ 042e45ef
......@@ -963,25 +963,9 @@ typedef struct {
//#if defined(UPGRADE_RAT_NR)
#if 1
SystemInformationBlockType1_nr_t systemInformationBlockType1_nr;
CellGroupConfig_t cell_group_config;
PDSCH_ServingCellConfig_t PDSCH_ServingCellConfig;
PDSCH_Config_t PDSCH_Config;
PUCCH_ConfigCommon_nr_t pucch_config_common_nr[NUMBER_OF_CONNECTED_gNB_MAX];
PUCCH_Config_t pucch_config_dedicated_nr[NUMBER_OF_CONNECTED_gNB_MAX];
PUSCH_Config_t pusch_config;
SRS_NR srs;
crossCarrierSchedulingConfig_t crossCarrierSchedulingConfig;
supplementaryUplink_t supplementaryUplink;
dmrs_DownlinkConfig_t dmrs_DownlinkConfig;
csi_MeasConfig_t csi_MeasConfig;
PUSCH_ServingCellConfig_t PUSCH_ServingCellConfig;
#endif
uint8_t ncs_cell[20][7];
......
openair1/PHY/defs_nr_common.h
View file @ 042e45ef
......@@ -93,18 +93,18 @@
#define NR_MAX_CSET_DURATION 3
#define NR_MAX_NB_RBG 18
#define NR_MAX_NB_LAYERS 8 // SU-MIMO (3GPP TS 38.211 V15.4.0 section 7.3.1.3)
#define NR_MAX_NB_LAYERS 2 // 8 // SU-MIMO (3GPP TS 38.211 V15.4.0 section 7.3.1.3)
#define NR_MAX_NB_CODEWORDS 2
#define NR_MAX_NB_HARQ_PROCESSES 16
#define NR_MAX_PDSCH_ENCODED_LENGTH NR_MAX_NB_RB*NR_SYMBOLS_PER_SLOT*NR_NB_SC_PER_RB*8*NR_MAX_NB_LAYERS // 8 is the maximum modulation order (it was 950984 before !!)
#define NR_MAX_PDSCH_ENCODED_LENGTH (NR_MAX_NB_RB*NR_SYMBOLS_PER_SLOT*NR_NB_SC_PER_RB*8*NR_MAX_NB_LAYERS) // 8 is the maximum modulation order (it was 950984 before !!)
#define NR_MAX_PUSCH_ENCODED_LENGTH NR_MAX_PDSCH_ENCODED_LENGTH
#define NR_MAX_PDSCH_TBS 3824
#define NR_MAX_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits.
#define MAX_NUM_NR_DLSCH_SEGMENTS 34
#define MAX_NUM_NR_DLSCH_SEGMENTS (NR_MAX_NB_LAYERS*34)
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
#define MAX_NUM_NR_ULSCH_SEGMENTS MAX_NUM_NR_DLSCH_SEGMENTS
#define MAX_NUM_NR_ULSCH_SEGMENTS 34
#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056)
#define MAX_NUM_NR_CHANNEL_BITS (14*273*12*8) // 14 symbols, 273 RB
......
openair1/PHY/impl_defs_nr.h
View file @ 042e45ef
This diff is collapsed.
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
View file @ 042e45ef
......@@ -80,31 +80,30 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
} else {
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DLSCH){
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch[thread_id][0][0];
}
else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH){
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_ra[0];
dlsch0->rnti_type = _RA_RNTI_;
dlsch0->harq_processes[dlsch0->current_harq_pid]->status = ACTIVE;
dlsch0->harq_processes[current_harq_pid]->status = ACTIVE;
}
else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0];
dlsch0->rnti_type = _SI_RNTI_;
dlsch0->harq_processes[dlsch0->current_harq_pid]->status = ACTIVE;
dlsch0->harq_processes[current_harq_pid]->status = ACTIVE;
}
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
NR_DL_UE_HARQ_t *dlsch0_harq;
dlsch0->current_harq_pid = current_harq_pid;
dlsch0->active = 1;
dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti;
dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
LOG_D(PHY,"current_harq_pid = %d\n", current_harq_pid);
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[current_harq_pid];
if (dlsch0_harq){
dlsch0_harq->BWPStart = dlsch_config_pdu->BWPStart;
......@@ -121,7 +120,14 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
dlsch0_harq->harq_ack.pucch_resource_indicator = dlsch_config_pdu->pucch_resource_id;
dlsch0_harq->harq_ack.slot_for_feedback_ack = (slot+dlsch_config_pdu->pdsch_to_harq_feedback_time_ind)%frame_parms.slots_per_frame;
dlsch0_harq->Nl=1;
//get nrOfLayers from DCI info
uint8_t Nl = 0;
for (i = 0; i < 4; i++) {
if (dlsch_config_pdu->dmrs_ports[i] >= i) Nl += 1;
}
dlsch0_harq->Nl = Nl;
dlsch0_harq->mcs_table=dlsch_config_pdu->mcs_table;
dlsch0_harq->harq_ack.rx_status = downlink_harq_process(dlsch0_harq, dlsch0->current_harq_pid, dlsch_config_pdu->ndi, dlsch0->rnti_type);
if (dlsch0_harq->status != ACTIVE) {
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
View file @ 042e45ef
This diff is collapsed.
openair1/SCHED_NR_UE/pucch_power_control_ue_nr.c
View file @ 042e45ef
......@@ -158,13 +158,14 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
}
}
int k2;
if (power_config->twoPUCCH_PC_AdjustmentStates > 1) {
LOG_E(PHY,"PUCCH power control adjustment states with 2 states not yet implemented : at line %d in function %s of file %s \n", LINE_FILE , __func__, __FILE__);
return (PUCCH_POWER_DEFAULT);
}
#if 0
int k2;
/* response to a detection by the UE of a DCI format 1_0 or DCI format 1_1 */
//int K_PUCCH = 0;
if (O_ACK != 0) {
......@@ -201,6 +202,7 @@ int16_t get_pucch_tx_power_ue(PHY_VARS_NR_UE *ue,
}
//K_PUCCH = N_SYMB_SLOT * k2; /* the product of a number of symbols per slot and the minimum of the values provided by higher layer parameter k2 */
}
#endif
int contributor = (10 * log10((double)(pow(2,(ue->frame_parms.numerology_index)) * nb_of_prbs)));
......
openair1/SIMULATION/NR_PHY/dlsim.c
View file @ 042e45ef
This diff is collapsed.
openair1/SIMULATION/TOOLS/multipath_tv_channel.c
View file @ 042e45ef
......@@ -40,9 +40,9 @@ void multipath_tv_channel(channel_desc_t *desc,
uint8_t keep_channel)
{
double complex **tx,**rx,***H_t,*rx_temp;//, *tv_H_t;
double complex **tx,**rx,***H_t;
double path_loss = pow(10,desc->path_loss_dB/20);
int i,j,k,dd;
int i,j,dd;
dd = abs(desc->channel_offset);
#ifdef DEBUG_CH
printf("[TV CHANNEL] keep = %d : path_loss = %g (%f), nb_rx %d, nb_tx %d, dd %d, len %d max_doppler %g\n",keep_channel,path_loss,desc->path_loss_dB,desc->nb_rx,desc->nb_tx,dd,desc->channel_length,
......@@ -51,8 +51,6 @@ void multipath_tv_channel(channel_desc_t *desc,
tx = (double complex **)malloc(desc->nb_tx*sizeof(double complex *));
rx = (double complex **)malloc(desc->nb_rx*sizeof(double complex *));
H_t= (double complex ***) malloc(desc->nb_tx*desc->nb_rx*sizeof(double complex **));
// tv_H_t = (double complex *) malloc(length*sizeof(double complex));
rx_temp= (double complex *) calloc(length,sizeof(double complex));
for(i=0; i<desc->nb_tx; i++) {
tx[i] = (double complex *)calloc(length,sizeof(double complex));
......@@ -84,11 +82,7 @@ void multipath_tv_channel(channel_desc_t *desc,
for(i=0; i<desc->nb_rx; i++) {
for(j=0; j<desc->nb_tx; j++) {
tv_conv(H_t[i+(j*desc->nb_rx)],tx[j],rx_temp,length,desc->nb_taps,dd);
for(k=0; k<length; k++) {
rx[i][k] += rx_temp[k];
}
tv_conv(H_t[i+(j*desc->nb_rx)],tx[j],rx[i],length,desc->nb_taps,dd);
}
}
......@@ -99,10 +93,6 @@ void multipath_tv_channel(channel_desc_t *desc,
}
}
/* for(k=0;k<length;k++) {
tv_H_t[k] = H_t[0][k][0];
}*/
for(i=0; i<desc->nb_tx; i++) {
free(tx[i]);
}
......@@ -124,7 +114,6 @@ void multipath_tv_channel(channel_desc_t *desc,
}
free(H_t);
free(rx_temp);
}
//TODO: make phi_rad a parameter of this function
......@@ -177,7 +166,7 @@ void tv_channel(channel_desc_t *desc,double complex ***H,uint32_t length){
H[i+(j*desc->nb_rx)][k][l] += sqrt(desc->amps[k])*alpha[p]*cexp(I*(2*pi*w_Hz[i+(j*desc->nb_rx)][k][p]*l*(1/(desc->sampling_rate*1e6))+phi_rad[i+(j*desc->nb_rx)][k][p]));
}
}
//printf("H[tx%d][rx%d][k%d] = %f+j%f \n",j,i,k,creal(H[i+(j*desc->nb_rx)][k][0]),cimag(H[i+(j*desc->nb_rx)][k][0]));
//printf("H[tx%d][rx%d][k%d][l%d] = %f+j%f \n",j,i,k,0,creal(H[i+(j*desc->nb_rx)][k][0]),cimag(H[i+(j*desc->nb_rx)][k][0]));
}
}
}
......@@ -201,14 +190,12 @@ void tv_channel(channel_desc_t *desc,double complex ***H,uint32_t length){
}
// time varying convolution
void tv_conv(double complex **h, double complex *x, double complex *y, uint32_t nb_samples, uint8_t nb_taps, int dd){
int i,j;
for(i=0; i<((int)nb_samples-dd); i++) {
for(j=0; j<nb_taps; j++) {
if(i>j)
y[i+dd] += creal(h[j][i])*creal(x[i-j])-cimag(h[j][i])*cimag(x[i-j]) + I*(creal(h[j][i])*cimag(x[i-j])+cimag(h[j][i])*creal(x[i-j]));
void tv_conv(double complex **h, double complex *x, double complex *y, uint32_t nb_samples, uint8_t nb_taps, int dd)
{
for(int i = 0; i < ((int)nb_samples-dd); i++) {
for(int j = 0; j < nb_taps; j++) {
if(i >= j)
y[i+dd] += h[j][i] * x[i-j];
}
}
}
......
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
View file @ 042e45ef
......@@ -2502,7 +2502,7 @@ uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint
*
* NAME : get_K_ptrs
*
* PARAMETERS : ptrs_UplinkConfig PTRS uplink configuration
* PARAMETERS : nrb0, nrb1 PTRS uplink configuration
* N_RB number of RBs scheduled for PUSCH
*
* RETURN : the parameter K_ptrs
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
View file @ 042e45ef
......@@ -899,7 +899,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol,
mappingtype);
dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = 1;
......@@ -996,7 +996,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][4];
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[dci->antenna_ports.val][5];
}
if (n_codewords == 1) {
if (n_codewords == 2) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][1];
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_2_twoCodeword[dci->antenna_ports.val][2];
......@@ -1018,7 +1018,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->dmrs_ports[2] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][3];
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_3_oneCodeword[dci->antenna_ports.val][4];
}
if (n_codewords == 1) {
if (n_codewords == 2) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][1];
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_3_twoCodeword[dci->antenna_ports.val][2];
......@@ -1038,7 +1038,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_1->dmrs_ports[3] = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][4];
dlsch_config_pdu_1_1->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[dci->antenna_ports.val][5];
}
if (n_codewords == 1) {
if (n_codewords == 2) {
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][0];
dlsch_config_pdu_1_1->dmrs_ports[0] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][1];
dlsch_config_pdu_1_1->dmrs_ports[1] = table_7_3_2_3_3_4_twoCodeword[dci->antenna_ports.val][2];
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
View file @ 042e45ef
......@@ -602,6 +602,7 @@ void pf_dl(module_id_t module_id,
/* Calculate coeff */
sched_pdsch->mcs = 9;
sched_pdsch->nrOfLayers = 1;
uint32_t tbs = pf_tbs[ps->mcsTableIdx][sched_pdsch->mcs];
coeff_ue[UE_id] = (float) tbs / thr_ue[UE_id];
LOG_D(NR_MAC,"b %d, thr_ue[%d] %f, tbs %d, coeff_ue[%d] %f\n",
......@@ -820,7 +821,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
const rnti_t rnti = UE_info->rnti[UE_id];
/* POST processing */
const int nrOfLayers = 1;
const uint8_t nrOfLayers = sched_pdsch->nrOfLayers;
const uint16_t R = sched_pdsch->R;
const uint8_t Qm = sched_pdsch->Qm;
const uint32_t TBS = sched_pdsch->tb_size;
......
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @ 042e45ef
......@@ -262,6 +262,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
extern int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda);
extern uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData);
uint32_t target_dl_mcs = 9;
uint32_t target_dl_Nl = 1;
uint32_t target_dl_bw = 50;
uint64_t dlsch_slot_bitmap = (1<<1);
/* schedules whole bandwidth for first user, all the time */
......@@ -372,6 +373,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
nr_set_pdsch_semi_static(
scc, UE_info->CellGroup[UE_id], sched_ctrl->active_bwp, tda, num_dmrs_cdm_grps_no_data, ps);
sched_pdsch->nrOfLayers = target_dl_Nl;
sched_pdsch->mcs = target_dl_mcs;
sched_pdsch->Qm = nr_get_Qm_dl(sched_pdsch->mcs, ps->mcsTableIdx);
sched_pdsch->R = nr_get_code_rate_dl(sched_pdsch->mcs, ps->mcsTableIdx);
......@@ -382,7 +384,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
1 /* nrOfLayers */)
sched_pdsch->nrOfLayers)
>> 3;
/* get the PID of a HARQ process awaiting retransmission, or -1 otherwise */
......
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
View file @ 042e45ef
......@@ -383,6 +383,7 @@ typedef struct NR_sched_pdsch {
uint8_t mcs;
/// TBS-related info
uint8_t nrOfLayers;
uint16_t R;
uint8_t Qm;
uint32_t tb_size;
......
openair2/RRC/NR/rrc_gNB_reconfig.c
View file @ 042e45ef
......@@ -624,7 +624,10 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
}
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;//calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
if (n_physical_antenna_ports > 1)// for MIMO, we use DMRS Config Type 2
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
else
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL;
......
targets/ARCH/rfsimulator/simulator.c
View file @ 042e45ef
......@@ -618,8 +618,8 @@ static bool flushInput(rfsimulator_state_t *t, int timeout, int nsamps_for_initi
}
static int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, void **samplesVoid, int nsamps, int nbAnt) {
if (nbAnt != 1) {
LOG_W(HW, "rfsimulator: only 1 antenna tested\n");
if (nbAnt > 4) {
LOG_W(HW, "rfsimulator: only 4 antenna tested\n");
}
rfsimulator_state_t *t = device->priv;
......@@ -736,14 +736,19 @@ static int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimest
CirSize
);
else { // no channel modeling
double H_awgn_mimo[4][4] ={{1.0, 0.5, 0.25, 0.125},//rx 0
{0.5, 1.0, 0.5, 0.25}, //rx 1
{0.25, 0.5, 1.0, 0.5}, //rx 2
{0.125, 0.25, 0.5, 1.0}};//rx 3
sample_t *out=(sample_t *)samplesVoid[a];
int nbAnt_tx = ptr->th.nbAnt;//number of Tx antennas
//LOG_I(HW, "nbAnt_tx %d\n",nbAnt_tx);
for (int i=0; i < nsamps; i++) {//loop over nsamps
for (int a_tx=0; a_tx<nbAnt_tx; a_tx++) { //sum up signals from nbAnt_tx antennas
out[i].r+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].r;
out[i].i+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].i;
out[i].r += (short)(ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].r*H_awgn_mimo[a][a_tx]);
out[i].i += (short)(ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].i*H_awgn_mimo[a][a_tx]);
} // end for a_tx
} // end for i (number of samps)
} // end of no channel modeling
......
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