testing SCI1A

CMakeLists.txt

@@ -1066,8 +1066,10 @@ set(PHY_SRC_UE
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_pbch.c
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_psbch_rx.c
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_psbch_tx.c
-  ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/psfch_nr.c
+  ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_psfch_tx.c
+  ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_pscch_tx.c
   ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci.c
+  ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci_tools.c
   ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
   ${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch.c
   ${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_dlsch_demodulation.c
@@ -1089,6 +1091,7 @@ set(PHY_SRC_UE
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/dmrs_nr.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/ptrs_nr.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c
+  ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
   ${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gen_mod_table.c
   ${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
   ${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_adjust_synch_ue.c

executables/nr-ue.c

@@ -641,7 +641,10 @@ void processSlotTX(void *arg) {
       sl_indication.phy_data  = &phy_data;
       sl_indication.slot_type = SIDELINK_SLOT_TYPE_TX;
 
+      LOG_I(NR_PHY,"Sending SL indication RX %d.%d TX %d.%d\n",proc->frame_rx,proc->nr_slot_rx,proc->frame_tx,proc->nr_slot_tx);
       UE->if_inst->sl_indication(&sl_indication);
+      if (phy_data.nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"processSlotRX 1: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data.nr_sl_pssch_pscch_pdu->startrb,phy_data.nr_sl_pssch_pscch_pdu->pscch_numrbs);
+
       stop_meas(&UE->ue_ul_indication_stats);
     }
 

nfapi/open-nFAPI/nfapi/public_inc/sidelink_nr_ue_interface.h

@@ -398,6 +398,8 @@ typedef struct {
   //only 1 SL-BWP can be configured in REL16, REL17
   sl_nr_bwp_config_t sl_bwp_config;
 
+  uint32_t sl_DMRS_ScrambleId;
+
 } sl_nr_phy_config_request_t;
 
 

openair1/PHY/CODING/nrPolar_tools/nr_polar_dci_defs.h

@@ -34,6 +34,7 @@
 #define __NR_POLAR_DCI_DEFS__H__
 
 #define NR_POLAR_DCI_MESSAGE_TYPE 1 //int8_t
+#define NR_POLAR_SCI_MESSAGE_TYPE (NR_POLAR_PSBCH_MESSAGE_TYPE + 1) //int8_t
 #define NR_POLAR_DCI_CRC_PARITY_BITS 24
 #define NR_POLAR_DCI_CRC_ERROR_CORRECTION_BITS 3
 

openair1/PHY/CODING/nr_polar_init.c

@@ -208,6 +208,21 @@ t_nrPolar_params *nr_polar_params(int8_t messageType, uint16_t messageLength, ui
     newPolarInitNode->crcCorrectionBits = SL_NR_POLAR_PSBCH_CRC_ERROR_CORRECTION_BITS;
     newPolarInitNode->crc_generator_matrix = crc24c_generator_matrix(newPolarInitNode->payloadBits);//G_P
     LOG_D(PHY,"SIDELINK: Initializing polar parameters for PSBCH (K %d, E %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength);
+  } else if (messageType == NR_POLAR_DCI_MESSAGE_TYPE || messageType == NR_POLAR_SCI_MESSAGE_TYPE) {
+    newPolarInitNode->n_max = NR_POLAR_DCI_N_MAX;
+    newPolarInitNode->i_il = NR_POLAR_DCI_I_IL;
+    newPolarInitNode->i_seg = NR_POLAR_DCI_I_SEG;
+    newPolarInitNode->n_pc = NR_POLAR_DCI_N_PC;
+    newPolarInitNode->n_pc_wm = NR_POLAR_DCI_N_PC_WM;
+    newPolarInitNode->i_bil = NR_POLAR_DCI_I_BIL;
+    newPolarInitNode->crcParityBits = NR_POLAR_DCI_CRC_PARITY_BITS;
+    newPolarInitNode->payloadBits = messageLength;
+    newPolarInitNode->encoderLength = messageType == NR_POLAR_DCI_MESSAGE_TYPE ? aggregation_level * 108 : aggregation_level * 18; // for SCI aggregartion_level helds the number of PRBs, so multiply by 9*2 bits per PRB (9 REs with PSCCH payload)
+    newPolarInitNode->crcCorrectionBits = NR_POLAR_DCI_CRC_ERROR_CORRECTION_BITS;
+    newPolarInitNode->crc_generator_matrix = crc24c_generator_matrix(newPolarInitNode->payloadBits + newPolarInitNode->crcParityBits); // G_P
+    //printf("Initializing polar parameters for DCI (K %d, E %d, L %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength,aggregation_level);
+
+  } else if (messageType == NR_POLAR_UCI_PUCCH_MESSAGE_TYPE) {
   } else {
     AssertFatal(1 == 0, "[nr_polar_init] Incorrect Message Type(%d)", messageType);
   }

openair1/PHY/INIT/nr_init.c

@@ -572,7 +572,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
 
   nr_generate_modulation_table();
   gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
-  nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
+  nr_init_pdcch_dmrs(&gNB->frame_parms,gNB->pdcch_dmrs, cfg->cell_config.phy_cell_id.value);
   nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
 
   //PDSCH DMRS init

openair1/PHY/INIT/nr_init_ue.c

@@ -937,6 +937,24 @@ void sl_ue_phy_init(PHY_VARS_NR_UE *UE) {
 
   // Generate psbch dmrs Gold Sequences and modulated dmrs symbols
   sl_init_psbch_dmrs_gold_sequences(UE);
+  // Generate pscch dmrs Gold Sequences
+  UE->nr_gold_pscch_dmrs = (uint32_t ***)malloc16(sl_fp->slots_per_frame*sizeof(uint32_t **));
+  uint32_t ***pscch_dmrs             = UE->nr_gold_pscch_dmrs;
+  AssertFatal(pscch_dmrs!=NULL, "NR init: pscch_dmrs malloc failed\n");
+  int pscch_dmrs_init_length =  (((sl_fp->N_RB_UL<<1)*3)>>5)+1;
+
+  for (int slot=0; slot<sl_fp->slots_per_frame; slot++) {
+    pscch_dmrs[slot] = (uint32_t **)malloc16(sl_fp->symbols_per_slot*sizeof(uint32_t *));
+    AssertFatal(pscch_dmrs[slot]!=NULL, "NR SL UE init: pscch_dmrs for slot %d - malloc failed\n", slot);
+
+    for (int symb=0; symb<sl_fp->symbols_per_slot; symb++) {
+      pscch_dmrs[slot][symb] = (uint32_t *)malloc16(pscch_dmrs_init_length*sizeof(uint32_t));
+      LOG_D(PHY,"pscch_dmrs[%d][%d] %p\n",slot,symb,pscch_dmrs[slot][symb]);
+      AssertFatal(pscch_dmrs[slot][symb]!=NULL, "NR SL UE init: pscch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
+    }
+  }
+
+  nr_init_pdcch_dmrs(sl_fp,UE->nr_gold_pscch_dmrs, UE->SL_UE_PHY_PARAMS.sl_config.sl_DMRS_ScrambleId);
   for (int slss_id = 0; slss_id < SL_NR_NUM_SLSS_IDs; slss_id++) {
     sl_generate_psbch_dmrs_qpsk_sequences(UE, UE->SL_UE_PHY_PARAMS.init_params.psbch_dmrs_modsym[slss_id], slss_id);
     sl_generate_sss(&UE->SL_UE_PHY_PARAMS.init_params, slss_id, scaling_value);
@@ -945,4 +963,4 @@ void sl_ue_phy_init(PHY_VARS_NR_UE *UE) {
   // Generate PSS time domain samples used for correlation during SLSS reception.
   sl_generate_pss_ifft_samples(&UE->SL_UE_PHY_PARAMS, &UE->SL_UE_PHY_PARAMS.init_params);
 
-}
\ No newline at end of file
+}

openair1/PHY/NR_REFSIG/nr_gold.c

@@ -53,12 +53,10 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB)
 
 }
 
-void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
+void nr_init_pdcch_dmrs(NR_DL_FRAME_PARMS *fp, uint32_t ***pdcch_dmrs, uint32_t Nid)
 {
   uint32_t x1 = 0, x2 = 0;
   uint8_t reset;
-  NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
-  uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
   int pdcch_dmrs_init_length =  (((fp->N_RB_DL<<1)*3)>>5)+1;
 
   for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {

openair1/PHY/NR_REFSIG/nr_refsig.h

@@ -43,7 +43,7 @@ void nr_init_prs(PHY_VARS_gNB* gNB);
 @param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
 @param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
  */
-void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
+void nr_init_pdcch_dmrs(NR_DL_FRAME_PARMS *fp,uint32_t ***pdcch_dmrs, uint32_t Nid);
 void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
 void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
 

openair1/PHY/NR_TRANSPORT/nr_dci.c

@@ -30,7 +30,7 @@
 * \warning
 */
 
-
+#include "PHY/defs_nr_UE.h"
 #include "nr_dci.h"
 #include "nr_dlsch.h"
 #include "nr_sch_dmrs.h"
@@ -66,7 +66,7 @@ void nr_pdcch_scrambling(uint32_t *in,
   }
 }
 
-void nr_generate_dci(PHY_VARS_gNB *gNB,
+void nr_generate_dci(PHY_VARS_gNB *gNB, PHY_VARS_NR_UE *ue,
                      nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
                      int32_t *txdataF,
                      int16_t amp,
@@ -77,13 +77,19 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
   uint8_t cset_start_symb, cset_nsymb;
   int k,l,k_prime,dci_idx, dmrs_idx;
 
+  AssertFatal((gNB&&(!ue)) || (ue&&(!gNB)),"This should be either for gNB (%p) or UE (%p)\n",gNB,ue);
+
   // fill reg list per symbol
   int reg_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL * NR_NB_REG_PER_CCE];
-  nr_fill_reg_list(reg_list, pdcch_pdu_rel15);
+  if (gNB) nr_fill_reg_list(reg_list, pdcch_pdu_rel15);
   // compute rb_offset and n_prb based on frequency allocation
   int rb_offset;
   int n_rb;
-  get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
+  if (gNB) get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
+  else {
+    rb_offset=pdcch_pdu_rel15->FreqDomainResource[0];
+    n_rb = pdcch_pdu_rel15->FreqDomainResource[1];
+  }
   cset_start_sc = frame_parms->first_carrier_offset + (pdcch_pdu_rel15->BWPStart + rb_offset) * NR_NB_SC_PER_RB;
 
   int16_t mod_dmrs[pdcch_pdu_rel15->StartSymbolIndex+pdcch_pdu_rel15->DurationSymbols][(((n_rb+rb_offset+pdcch_pdu_rel15->BWPStart)*6+15)>>4)<<4] __attribute__((aligned(16))); // 3 for the max coreset duration
@@ -95,13 +101,14 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
      * in time: by its first slot and its first symbol*/
     const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
 
-    if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
+    if(gNB && dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
       gNB->pdcch_gold_init = dci_pdu->ScramblingId;
-      nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
+      nr_init_pdcch_dmrs(&gNB->frame_parms,gNB->nr_gold_pdcch_dmrs, dci_pdu->ScramblingId);
     }
-
-    uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
-
+    uint32_t **gold_pdcch_dmrs=NULL;
+    if (gNB) gold_pdcch_dmrs= gNB->nr_gold_pdcch_dmrs[slot];
+    else if (ue) gold_pdcch_dmrs = ue->nr_gold_pscch_dmrs[slot];
+    
     cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
     cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
     dci_idx = 0;
@@ -139,7 +146,8 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
     uint16_t scrambling_RNTI = dci_pdu->ScramblingRNTI;
 
     polar_encoder_fast((uint64_t*)dci_pdu->Payload, (void*)encoder_output, n_RNTI, 1, 
-                       NR_POLAR_DCI_MESSAGE_TYPE, dci_pdu->PayloadSizeBits, dci_pdu->AggregationLevel);
+                       gNB ? NR_POLAR_DCI_MESSAGE_TYPE : NR_POLAR_SCI_MESSAGE_TYPE, 
+                       dci_pdu->PayloadSizeBits, dci_pdu->AggregationLevel);
 #ifdef DEBUG_CHANNEL_CODING
 //debug dump dci
     printf("polar rnti %x,length %d, L %d\n",n_RNTI, dci_pdu->PayloadSizeBits,pdcch_pdu_rel15->dci_pdu->AggregationLevel);
@@ -176,23 +184,27 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
     if (cset_start_sc >= frame_parms->ofdm_symbol_size)
       cset_start_sc -= frame_parms->ofdm_symbol_size;
 
-    int num_regs = dci_pdu->AggregationLevel * NR_NB_REG_PER_CCE / pdcch_pdu_rel15->DurationSymbols;
+    int num_regs = gNB ? dci_pdu->AggregationLevel * NR_NB_REG_PER_CCE / pdcch_pdu_rel15->DurationSymbols : dci_pdu->AggregationLevel;
+
     /*Mapping the encoded DCI along with the DMRS */
     for(int symbol_idx = 0; symbol_idx < pdcch_pdu_rel15->DurationSymbols; symbol_idx++) {
       // allocating rbs per symbol
       for (int reg_count = 0; reg_count < num_regs; reg_count++) {
-        k = cset_start_sc + reg_list[d][reg_count] * NR_NB_SC_PER_RB;
-        LOG_D(PHY, "REG %d k %d\n", reg_list[d][reg_count], k);
+        if (gNB) {
+          k = cset_start_sc + reg_list[d][reg_count] * NR_NB_SC_PER_RB;
+          LOG_D(PHY, "REG %d k %d\n", reg_list[d][reg_count], k);
+        }
+        else if (reg_count ==0) k=cset_start_sc+pdcch_pdu_rel15->dci_pdu[d].CceIndex * NR_NB_SC_PER_RB;
         if (k >= frame_parms->ofdm_symbol_size)
           k -= frame_parms->ofdm_symbol_size;
 
         l = cset_start_symb + symbol_idx;
 
         // dmrs index depends on reference point for k according to 38.211 7.4.1.3.2
-        if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
+        if (gNB && pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
           dmrs_idx = (reg_list[d][reg_count] + pdcch_pdu_rel15->BWPStart) * 3;
         else
-          dmrs_idx = (reg_list[d][reg_count] + rb_offset) * 3;
+          dmrs_idx = gNB ? ((reg_list[d][reg_count] + rb_offset) * 3) : (pdcch_pdu_rel15->dci_pdu[d].CceIndex + rb_offset) * 3;
 
         k_prime = 0;
 
@@ -251,9 +263,9 @@ void nr_generate_dci_top(processingData_L1tx_t *msgTx,
                          NR_DL_FRAME_PARMS *frame_parms) {
 
   for (int i=0; i<msgTx->num_ul_pdcch; i++)
-    nr_generate_dci(msgTx->gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
+    nr_generate_dci(msgTx->gNB,NULL,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
   for (int i=0; i<msgTx->num_dl_pdcch; i++)
-    nr_generate_dci(msgTx->gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
+    nr_generate_dci(msgTx->gNB,NULL,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
 
 }
 

openair1/PHY/NR_UE_TRANSPORT/nr_pscch_tx.c

@@ -43,22 +43,33 @@
 
 #include "T.h"
 
+void nr_generate_dci(void *gNB, PHY_VARS_NR_UE *ue,
+                     nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
+                     int32_t *txdataF,
+                     int16_t amp,
+                     NR_DL_FRAME_PARMS *frame_parms,
+                     int slot);
 
-void nr_generate_psfch0(const PHY_VARS_NR_UE *ue,
-                        c16_t **txdataF,
-                        const NR_DL_FRAME_PARMS *frame_parms,
-                        const int16_t amp,
-                        const int nr_slot_tx,
-                        const sl_nr_tx_config_psfch_pdu_t *psfch_pdu)
+void nr_generate_sci1(const PHY_VARS_NR_UE *ue,
+                      c16_t *txdataF,
+                      const NR_DL_FRAME_PARMS *frame_parms,
+                      const int16_t amp,
+                      const int nr_slot_tx,
+                      const sl_nr_tx_config_pscch_pssch_pdu_t *pscch_pssch_pdu)
 {
 
-  fapi_nr_ul_config_pucch_pdu pucch_pdu;
-
-  pucch_pdu.start_symbol_index   = psfch_pdu->start_symbol_index;
-  pucch_pdu.hopping_id           = psfch_pdu->hopping_id;
-  pucch_pdu.prb_start            = psfch_pdu->prb;
-  pucch_pdu.initial_cyclic_shift = psfch_pdu->initial_cyclic_shift;
-  pucch_pdu.mcs                  = psfch_pdu->mcs;
-
-  nr_generate_pucch0(ue,txdataF,frame_parms,amp,nr_slot_tx,&pucch_pdu); 
+  nfapi_nr_dl_tti_pdcch_pdu_rel15_t pdcch_pdu_rel15={0};
+  // for SCI we put the startRB and number of RBs for PSCCH in the first 2 FAPI FreqDomainResource fields
+  pdcch_pdu_rel15.FreqDomainResource[0]          = pscch_pssch_pdu->startrb;
+  pdcch_pdu_rel15.FreqDomainResource[1]          = pscch_pssch_pdu->pscch_numrbs;
+  pdcch_pdu_rel15.StartSymbolIndex               = 1;
+  pdcch_pdu_rel15.DurationSymbols                = pscch_pssch_pdu->pscch_numsym;
+  pdcch_pdu_rel15.numDlDci                       = 1;
+  pdcch_pdu_rel15.dci_pdu[0].ScramblingId        = pscch_pssch_pdu->pscch_dmrs_scrambling_id;
+  pdcch_pdu_rel15.dci_pdu[0].PayloadSizeBits     = pscch_pssch_pdu->pscch_sci_payload_len;
+  // for SCI we put the number of PRBs in the FAPI AggregationLevel field
+  pdcch_pdu_rel15.dci_pdu[0].AggregationLevel    = pscch_pssch_pdu->pscch_numrbs;
+  pdcch_pdu_rel15.dci_pdu[0].ScramblingRNTI      = 1010;
+  *(uint64_t*)pdcch_pdu_rel15.dci_pdu[0].Payload = *(uint64_t *)pscch_pssch_pdu->pscch_sci_payload; 
+  nr_generate_dci(NULL,(PHY_VARS_NR_UE *)ue,&pdcch_pdu_rel15,(int32_t *)txdataF,amp,(NR_DL_FRAME_PARMS*)frame_parms,nr_slot_tx); 
 } 

openair1/PHY/NR_UE_TRANSPORT/nr_psfch_tx.c

+/*
+ * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.
+ * The OpenAirInterface Software Alliance licenses this file to You under
+ * the OAI Public License, Version 1.1  (the "License"); you may not use this file
+ * except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *      http://www.openairinterface.org/?page_id=698
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *-------------------------------------------------------------------------------
+ * For more information about the OpenAirInterface (OAI) Software Alliance:
+ *      contact@openairinterface.org
+ */
+
+/*! \file PHY/NR_UE_TRANSPORT/pucch_nr.c
+* \brief Top-level routines for generating and decoding the PSFCH physical channel
+* \author R. Knopp 
+* \date 2023
+* \version 0.1
+* \company Eurecom
+* \email:
+* \note
+* \warning
+*/
+//#include "PHY/defs.h"
+#include "PHY/impl_defs_nr.h"
+#include "PHY/defs_nr_common.h"
+#include "PHY/defs_nr_UE.h"
+//#include "PHY/extern.h"
+#include "PHY/NR_UE_TRANSPORT/pucch_nr.h"
+#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
+#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
+#include <openair1/PHY/CODING/nrSmallBlock/nr_small_block_defs.h>
+#include "common/utils/LOG/log.h"
+#include "common/utils/LOG/vcd_signal_dumper.h"
+
+#include "T.h"
+
+
+void nr_generate_psfch0(const PHY_VARS_NR_UE *ue,
+                        c16_t **txdataF,
+                        const NR_DL_FRAME_PARMS *frame_parms,
+                        const int16_t amp,
+                        const int nr_slot_tx,
+                        const sl_nr_tx_config_psfch_pdu_t *psfch_pdu)
+{
+
+  fapi_nr_ul_config_pucch_pdu pucch_pdu;
+
+  pucch_pdu.start_symbol_index   = psfch_pdu->start_symbol_index;
+  pucch_pdu.hopping_id           = psfch_pdu->hopping_id;
+  pucch_pdu.prb_start            = psfch_pdu->prb;
+  pucch_pdu.initial_cyclic_shift = psfch_pdu->initial_cyclic_shift;
+  pucch_pdu.mcs                  = psfch_pdu->mcs;
+
+  nr_generate_pucch0(ue,txdataF,frame_parms,amp,nr_slot_tx,&pucch_pdu); 
+} 

openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h

@@ -425,6 +425,14 @@ void nr_tx_psbch(PHY_VARS_NR_UE *UE, uint32_t frame_tx, uint32_t slot_tx,
                  c16_t **txdataF);
 
 int sl_nr_slss_search(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc, int num_frames);
+
+void nr_generate_sci1(const PHY_VARS_NR_UE *ue,
+                      c16_t *txdataF,
+                      const NR_DL_FRAME_PARMS *frame_parms,
+                      const int16_t amp,
+                      const int nr_slot_tx,
+                      const sl_nr_tx_config_pscch_pssch_pdu_t *pscch_pssch_pdu);
+
 /**@}*/
 #endif
 

openair1/PHY/defs_nr_UE.h

@@ -656,6 +656,8 @@ typedef struct {
   sl_nr_sidelink_mode_t sl_mode;
   sl_nr_ue_phy_params_t SL_UE_PHY_PARAMS;
   bool phy_config_request_sent;
+  int pscch_dmrs_gold_init;
+  uint32_t ***nr_gold_pscch_dmrs;  
 } PHY_VARS_NR_UE;
 
 typedef struct {

openair1/SCHED_NR_UE/fapi_nr_ue_l1.c

@@ -389,12 +389,23 @@ void configure_ta_command(PHY_VARS_NR_UE *ue, fapi_nr_ta_command_pdu *ta_command
 int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
 
   bool found = false;
+  
   if(scheduled_response != NULL){
-
+    LOG_I(NR_PHY,"In schedule_response %d.%d SL_RX %p SL_TX %p\n",scheduled_response->frame,scheduled_response->slot,scheduled_response->sl_rx_config,scheduled_response->sl_tx_config);
     if (scheduled_response->sl_rx_config || scheduled_response->sl_tx_config) {
       sl_handle_scheduled_response(scheduled_response);
+      nr_phy_data_tx_t *phy_data=(nr_phy_data_tx_t *)scheduled_response->phy_data;
+      if (phy_data->nr_sl_pssch_pscch_pdu) {
+        LOG_I(NR_PHY,"nr_ue_scheduled_response: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
+        LOG_I(NR_PHY,"format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload_len,
+              (unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload,
+              phy_data->nr_sl_pssch_pscch_pdu->sci2_payload_len,
+              (unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->sci2_payload,
+              phy_data->nr_sl_pssch_pscch_pdu->mcs,
+              phy_data->nr_sl_pssch_pscch_pdu->tbslbrm);
+      }
       return 0;
-    }
+    } 
 
     module_id_t module_id = scheduled_response->module_id;
     uint8_t cc_id = scheduled_response->CC_id;
@@ -734,8 +745,16 @@ int8_t sl_handle_scheduled_response(nr_scheduled_response_t *scheduled_response)
                         sl_tx_config->tx_config_list[0].tx_psbch_config_pdu.tx_slss_id;
         break;
       case SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH:
-       phy_data_tx->sl_tx_action = SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH;
-       LOG_I(NR_PHY,"Received CONFIG_TYPE_TX_PSCCH_PSSCH\n");
+        phy_data_tx->sl_tx_action = SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH;
+        phy_data_tx->nr_sl_pssch_pscch_pdu = &sl_tx_config->tx_config_list[0].tx_pscch_pssch_config_pdu;
+        LOG_I(NR_PHY,"sl_handle_scheduled_response: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data_tx->nr_sl_pssch_pscch_pdu->startrb,phy_data_tx->nr_sl_pssch_pscch_pdu->pscch_numrbs);
+        LOG_I(NR_PHY,"format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data_tx->nr_sl_pssch_pscch_pdu->pscch_sci_payload_len,
+              (unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu->pscch_sci_payload,
+              phy_data_tx->nr_sl_pssch_pscch_pdu->sci2_payload_len,
+              (unsigned long long)*phy_data_tx->nr_sl_pssch_pscch_pdu->sci2_payload,
+              phy_data_tx->nr_sl_pssch_pscch_pdu->mcs,
+              phy_data_tx->nr_sl_pssch_pscch_pdu->tbslbrm);
+       break;
       default:
         AssertFatal(0,"Incorrect sl_tx config req pdutype \n");
         break;

openair1/SCHED_NR_UE/phy_procedures_nr_ue_sl.c

@@ -278,15 +278,20 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
 
   //VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX_SL,VCD_FUNCTION_IN);
 
+  if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures 1: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
   const int samplesF_per_slot = NR_SYMBOLS_PER_SLOT * fp->ofdm_symbol_size;
   c16_t txdataF_buf[fp->nb_antennas_tx * samplesF_per_slot] __attribute__((aligned(32)));
-  memset(txdataF_buf, 0, sizeof(txdataF_buf));
+  if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures 0: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
+  printf("txdataF_buf size %d (nb_antennas_tx %d, samplesF_per_slot %d)\n",sizeof(txdataF_buf),fp->nb_antennas_tx,samplesF_per_slot);
+  //memset(txdataF_buf, 0, sizeof(txdataF_buf));
+  if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures 2: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
   c16_t *txdataF[fp->nb_antennas_tx]; /* workaround to be compatible with current txdataF usage in all tx procedures. */
   for(int i=0; i< fp->nb_antennas_tx; ++i)
     txdataF[i] = &txdataF_buf[i * samplesF_per_slot];
 
   LOG_I(PHY,"****** start Sidelink TX-Chain for AbsSubframe %d.%d ******\n",
                                                                 frame_tx, slot_tx);
+  if (phy_data->nr_sl_pssch_pscch_pdu) LOG_I(NR_PHY,"phy_procedures: Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
 
   start_meas(&sl_phy_params->phy_proc_sl_tx);
 
@@ -309,7 +314,16 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
     tx_action = 1;
   }
   else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSCCH_PSSCH) {
-   LOG_I(NR_PHY,"Generating PSCCH ( )\n");
+   LOG_I(NR_PHY,"Generating PSCCH (%d.%d)\n",frame_tx,slot_tx);
+
+        LOG_I(NR_PHY,"Received CONFIG_TYPE_TX_PSCCH_PSSCH, PSCCH startRB %d, PSCCH numRB %d\n",phy_data->nr_sl_pssch_pscch_pdu->startrb,phy_data->nr_sl_pssch_pscch_pdu->pscch_numrbs);
+        LOG_I(NR_PHY,"format 1A length %d :%llx, format 2x length %d : %llx, PSSCH mcs %d, PSSCH tbslrm %d\n",phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload_len,
+              (unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->pscch_sci_payload,
+              phy_data->nr_sl_pssch_pscch_pdu->sci2_payload_len,
+              (unsigned long long)*phy_data->nr_sl_pssch_pscch_pdu->sci2_payload,
+              phy_data->nr_sl_pssch_pscch_pdu->mcs,
+              phy_data->nr_sl_pssch_pscch_pdu->tbslbrm);
+   nr_generate_sci1(ue,txdataF[0],fp,AMP,slot_tx,phy_data->nr_sl_pssch_pscch_pdu); 
   }
   else if (phy_data->sl_tx_action == SL_NR_CONFIG_TYPE_TX_PSFCH) {
    LOG_I(NR_PHY,"Generating PSFCH ( )\n");

openair2/LAYER2/NR_MAC_UE/nr_slsch_scheduler.c

@@ -55,6 +55,7 @@ bool nr_schedule_slsch(nr_sci_pdu_t *sci_pdu,nr_sci_pdu_t *sci2_pdu,uint8_t *sls
    sci_pdu->psfch_overhead.val = 0;
    sci_pdu->reserved.val = 0;
    sci_pdu->conflict_information_receiver.val = 0;
+   sci_pdu->beta_offset_indicator = 0;
 
 // Fill SCI2A
    sci2_pdu->harq_pid = 0;

openair2/LAYER2/NR_MAC_UE/nr_ue_sci_slsch.c

@@ -61,6 +61,11 @@
 #include "common/utils/LOG/vcd_signal_dumper.h"
 
 
+const int sl_dmrs_mask2[2][8] = { {34,34,34,264,264,1032,1032,1032},
+                                  {34,34,34,272,272,1040,1040,1040}};
+const int sl_dmrs_mask3[5]    = {146,146,546,546,2114};
+const int sl_dmrs_mask4[3]    = {1170,1170,1170};
+
 uint32_t nr_sci_size(const NR_SL_ResourcePool_r16_t *sl_res_pool,
 	             nr_sci_pdu_t *sci_pdu,
 	             const nr_sci_format_t format) {
@@ -241,7 +246,7 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
   nr_sl_pssch_pscch_pdu->num_subch = *sl_res_pool->sl_NumSubchannel_r16;
   // Size of subchannels in RBs
   nr_sl_pssch_pscch_pdu->subchannel_size = *sl_res_pool->sl_SubchannelSize_r16;
-  //PSCCH PSSCH TX: Size of subchannels in a PSSCH resource (l_subch)
+  //_PSCCH PSSCH TX: Size of subchannels in a PSSCH resource (l_subch)
   AssertFatal(sci_pdu->time_resource_assignment.val == 0, "need to handle a non-zero time_resource_assignment (2 or 3 time hops, N=2,3)\n");
   convNRFRIV(sci_pdu->frequency_resource_assignment.val,
              nr_sl_pssch_pscch_pdu->num_subch,
@@ -338,10 +343,31 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
   int N_REsci2  = get_NREsci2(sl_res_pool,nr_sl_pssch_pscch_pdu,mcs_tb_ind);
   int N_RE      = N_REprime*nr_sl_pssch_pscch_pdu->l_subch*nr_sl_pssch_pscch_pdu->subchannel_size - N_REsci1 - N_REsci2;
 
-  nr_sl_pssch_pscch_pdu->tbslbrm = nr_compute_tbs_sl(nr_get_Qm_ul(sci_pdu->mcs,mcs_tb_ind),
-                                                     nr_get_code_rate_ul(sci_pdu->mcs,mcs_tb_ind),
+  nr_sl_pssch_pscch_pdu->mod_order = nr_get_Qm_ul(sci_pdu->mcs,mcs_tb_ind);
+  nr_sl_pssch_pscch_pdu->target_coderate = nr_get_code_rate_ul(sci_pdu->mcs,mcs_tb_ind);
+  nr_sl_pssch_pscch_pdu->tbslbrm = nr_compute_tbs_sl(nr_sl_pssch_pscch_pdu->mod_order,
+                                                     nr_sl_pssch_pscch_pdu->target_coderate,
 						     N_RE,1+(sci_pdu->number_of_dmrs_port&1));
 
+  nr_sl_pssch_pscch_pdu->mcs = sci_pdu->mcs;
+  nr_sl_pssch_pscch_pdu->num_layers = sci_pdu->number_of_dmrs_port+1;
+  nr_sl_pssch_pscch_pdu->mcs_table=mcs_tb_ind;
+  nr_sl_pssch_pscch_pdu->rv_index = sci2_pdu->rv_index;
+  nr_sl_pssch_pscch_pdu->ndi = sci2_pdu->ndi;
+  int num_dmrs_symbols;
+  AssertFatal(sci_pdu->dmrs_pattern.val < sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_PSSCH_DMRS_TimePatternList_r16->list.count,"dmrs.pattern %d out of bounds for list size %d\n",sci_pdu->dmrs_pattern.val,sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_PSSCH_DMRS_TimePatternList_r16->list.count);
+  num_dmrs_symbols = *sl_res_pool->sl_PSSCH_Config_r16->choice.setup->sl_PSSCH_DMRS_TimePatternList_r16->list.array[sci_pdu->dmrs_pattern.val];
+  if (num_dmrs_symbols == 2) {
+    AssertFatal(nr_sl_pssch_pscch_pdu->pssch_numsym>5, "num_pssch_ymbols %d is not ok for 2 DMRS (min 6)\n",nr_sl_pssch_pscch_pdu->pssch_numsym);
+    nr_sl_pssch_pscch_pdu->dmrs_symbol_position = sl_dmrs_mask2[nr_sl_pssch_pscch_pdu->pscch_numsym-2][nr_sl_pssch_pscch_pdu->pssch_numsym-6];
+  } else if (num_dmrs_symbols == 3) {
+    AssertFatal(nr_sl_pssch_pscch_pdu->pssch_numsym>8, "num_pssch_ymbols %d is not ok for 3 DMRS (min 9)\n",nr_sl_pssch_pscch_pdu->pssch_numsym);
+    nr_sl_pssch_pscch_pdu->dmrs_symbol_position = sl_dmrs_mask3[nr_sl_pssch_pscch_pdu->pssch_numsym-9];
+  } else if (num_dmrs_symbols == 4) {
+    AssertFatal(nr_sl_pssch_pscch_pdu->pssch_numsym>10, "num_pssch_ymbols %d is not ok for 4 DMRS (min 11)\n",nr_sl_pssch_pscch_pdu->pssch_numsym);
+    nr_sl_pssch_pscch_pdu->dmrs_symbol_position = sl_dmrs_mask4[nr_sl_pssch_pscch_pdu->pssch_numsym-11];
+  }
+  
   pos=0;
   switch(format2) {
     case NR_SL_SCI_FORMAT_2A:
@@ -572,10 +598,6 @@ int nr_ue_process_sci1_indication_pdu(NR_UE_MAC_INST_t *mac,frame_t frame, int s
 }
 
 
-const int sl_dmrs_mask2[2][8] = { {34,34,34,264,264,1032,1032,1032},
-                                  {34,34,34,272,272,1040,1040,1040}};
-const int sl_dmrs_mask3[5]    = {146,146,546,546,2114};
-const int sl_dmrs_mask4[3]    = {1170,1170,1170};
 
 void config_pssch_sci_pdu_rx(sl_nr_rx_config_pssch_sci_pdu_t *nr_sl_pssch_sci_pdu,
                              nr_sci_format_t sci2_format,
@@ -600,7 +622,7 @@ void config_pssch_sci_pdu_rx(sl_nr_rx_config_pssch_sci_pdu_t *nr_sl_pssch_sci_pd
 
   nr_sl_pssch_sci_pdu->targetCodeRate = nr_get_code_rate_ul(sci_pdu->mcs,mcs_tb_ind);
   nr_sl_pssch_sci_pdu->mod_order      = nr_get_Qm_ul(sci_pdu->mcs,mcs_tb_ind);
-  nr_sl_pssch_sci_pdu->num_layers     = sci_pdu->number_of_dmrs_port;
+  nr_sl_pssch_sci_pdu->num_layers     = 1+sci_pdu->number_of_dmrs_port;
 
   // Derived from PSCCH CRC Refer 38.211 section 8.3.1.1
   // to be used for PSSCH DMRS and PSSCH 38.211 Scrambling