Commit 0af8f618 authored by Raphael Defosseux's avatar Raphael Defosseux

Merge remote-tracking branch 'origin/enable_ta_for_phytest' into develop_integration_2020_w26

parents 233f5195 72aa2963
...@@ -361,7 +361,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -361,7 +361,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
int CC_id, UE_id = 0; int CC_id, UE_id = 0;
gNB_MAC_INST *gNB = RC.nrmac[module_idP]; gNB_MAC_INST *gNB = RC.nrmac[module_idP];
NR_UE_list_t *UE_list = &gNB->UE_list; NR_UE_list_t *UE_list = &gNB->UE_list;
NR_UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
NR_COMMON_channels_t *cc = gNB->common_channels; NR_COMMON_channels_t *cc = gNB->common_channels;
NR_sched_pucch *pucch_sched = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch)); NR_sched_pucch *pucch_sched = (NR_sched_pucch*) malloc(sizeof(NR_sched_pucch));
...@@ -397,40 +396,44 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, ...@@ -397,40 +396,44 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
rnti = 0;//UE_RNTI(module_idP, i); rnti = 0;//UE_RNTI(module_idP, i);
CC_id = 0;//UE_PCCID(module_idP, i); CC_id = 0;//UE_PCCID(module_idP, i);
} //END if (UE_list->active[i]) } //END if (UE_list->active[i])
} //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++) } //END for (i = 0; i < MAX_MOBILES_PER_GNB; i++)
*/ */
// This schedules MIB // This schedules MIB
if((slot_txP == 0) && (frame_txP & 7) == 0){ if((slot_txP == 0) && (frame_txP & 7) == 0){
schedule_nr_mib(module_idP, frame_txP, slot_txP); schedule_nr_mib(module_idP, frame_txP, slot_txP);
} }
// TbD once RACH is available, start ta_timer when UE is connected // Phytest scheduling
if (ue_sched_ctl->ta_timer) ue_sched_ctl->ta_timer--; if (get_softmodem_params()->phy_test) {
NR_UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
if (ue_sched_ctl->ta_timer == 0) {
gNB->ta_command = ue_sched_ctl->ta_update; // TbD once RACH is available, start ta_timer when UE is connected
/* if time is up, then set the timer to not send it for 5 frames if (ue_sched_ctl->ta_timer)
// regardless of the TA value */ ue_sched_ctl->ta_timer--;
ue_sched_ctl->ta_timer = 100;
/* reset ta_update */ if (ue_sched_ctl->ta_timer == 0) {
ue_sched_ctl->ta_update = 31; gNB->ta_command = ue_sched_ctl->ta_update;
/* MAC CE flag indicating TA length */ /* if time is up, then set the timer to not send it for 5 frames
gNB->ta_len = 2; // regardless of the TA value */
ue_sched_ctl->ta_timer = 100;
/* reset ta_update */
ue_sched_ctl->ta_update = 31;
/* MAC CE flag indicating TA length */
gNB->ta_len = 2;
}
if (slot_txP == 1){
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, pucch_sched, NULL);
// resetting ta flag
gNB->ta_len = 0;
}
} }
if (get_softmodem_params()->phy_test == 0) if (get_softmodem_params()->phy_test == 0)
nr_schedule_RA(module_idP, frame_txP, slot_txP); nr_schedule_RA(module_idP, frame_txP, slot_txP);
// Phytest scheduling
if (get_softmodem_params()->phy_test && slot_txP==1){
nr_schedule_uss_dlsch_phytest(module_idP, frame_txP, slot_txP, pucch_sched, NULL);
// resetting ta flag
gNB->ta_len = 0;
}
/* /*
// Allocate CCEs for good after scheduling is done // Allocate CCEs for good after scheduling is done
......
...@@ -33,10 +33,10 @@ gNBs = ...@@ -33,10 +33,10 @@ gNBs =
# downlinkConfigCommon # downlinkConfigCommon
#frequencyInfoDL #frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP) # this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 633032; absoluteFrequencySSB = 641032;
dl_frequencyBand = 78; dl_frequencyBand = 78;
# this is 3480 MHz # this is 3600 MHz
dl_absoluteFrequencyPointA = 632000; dl_absoluteFrequencyPointA = 640000;
#scs-SpecificCarrierList #scs-SpecificCarrierList
dl_offstToCarrier = 0; dl_offstToCarrier = 0;
# subcarrierSpacing # subcarrierSpacing
...@@ -153,7 +153,7 @@ gNBs = ...@@ -153,7 +153,7 @@ gNBs =
# ssb_PositionsInBurs_BitmapPR # ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long # 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2; ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 255; ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell # ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1 # 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
...@@ -242,7 +242,8 @@ RUs = ( ...@@ -242,7 +242,8 @@ RUs = (
max_pdschReferenceSignalPower = -27; max_pdschReferenceSignalPower = -27;
max_rxgain = 114; max_rxgain = 114;
eNB_instances = [0]; eNB_instances = [0];
sdr_addrs = "type=x300"; sdr_addrs = "type=x300";
clock_src = "external";
} }
); );
......
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