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lizhongxiao
OpenXG-RAN
Commits
0ead4bdb
Commit
0ead4bdb
authored
Feb 25, 2019
by
Louis Adrien Dufrene
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some format for eNB_scheduler_RA.c and rar_tools.c + some fix in RAR PDU
parent
a3d3b0cd
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2
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2 changed files
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206 additions
and
135 deletions
+206
-135
openair2/LAYER2/MAC/eNB_scheduler_RA.c
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+131
-86
openair2/LAYER2/MAC/rar_tools.c
openair2/LAYER2/MAC/rar_tools.c
+75
-49
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openair2/LAYER2/MAC/eNB_scheduler_RA.c
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0ead4bdb
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openair2/LAYER2/MAC/rar_tools.c
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0ead4bdb
...
...
@@ -110,98 +110,124 @@ fill_rar(const module_id_t module_idP,
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
//------------------------------------------------------------------------------
/*
* Fill the RAR buffer (header + PDU) for LTE-M devices
*/
unsigned
short
fill_rar_br
(
eNB_MAC_INST
*
eNB
,
int
CC_id
,
RA_t
*
ra
,
const
frame_t
frameP
,
const
sub_frame_t
subframeP
,
uint8_t
*
const
dlsch_buffer
,
const
uint8_t
ce_level
)
int
CC_id
,
RA_t
*
ra
,
const
frame_t
frameP
,
const
sub_frame_t
subframeP
,
uint8_t
*
const
dlsch_buffer
,
const
uint8_t
ce_level
)
//------------------------------------------------------------------------------
{
RA_HEADER_RAPID
*
rarh
=
(
RA_HEADER_RAPID
*
)
dlsch_buffer
;
RA_HEADER_RAPID
*
rarh
=
(
RA_HEADER_RAPID
*
)
dlsch_buffer
;
COMMON_channels_t
*
cc
=
&
eNB
->
common_channels
[
CC_id
];
uint8_t
*
rar
=
(
uint8_t
*
)(
dlsch_buffer
+
1
);
uint32_t
rballoc
,
reps
;
uint32_t
TPC
,
ULdelay
,
cqireq
,
mpdcch_nb_index
;
int
input_buffer_length
;
uint8_t
*
rar
=
(
uint8_t
*
)(
dlsch_buffer
+
1
);
uint32_t
rballoc
=
0
;
uint32_t
reps
=
0
;
uint32_t
ULdelay
=
0
;
uint32_t
cqireq
=
0
;
uint32_t
mpdcch_nb_index
=
0
;
uint32_t
TPC
=
0
;
int
input_buffer_length
=
0
;
int
N_NB_index
=
0
;
AssertFatal
(
ra
!=
NULL
,
"RA is null
\n
"
);
/
/ subheader fixed
/
* Subheader fixed */
rarh
->
E
=
0
;
// First and last RAR
rarh
->
T
=
1
;
// 0 for E/T/R/R/BI subheader, 1 for E/T/RAPID subheader
rarh
->
RAPID
=
ra
->
preamble_index
;
// Respond to Preamble 0 only for the moment
ra
->
timing_offset
/=
16
;
//T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar
[
0
]
=
(
uint8_t
)
(
ra
->
timing_offset
>>
(
2
+
4
));
// 7 MSBs of timing advance + divide by 4
rar
[
1
]
=
(
uint8_t
)
(
ra
->
timing_offset
<<
(
4
-
2
))
&
0xf0
;
// 4 LSBs of timing advance + divide by 4
int
N_NB_index
;
rarh
->
RAPID
=
ra
->
preamble_index
;
// Respond to Preamble
/* RAR PDU */
/* TA Command */
ra
->
timing_offset
/=
16
;
// T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar
[
0
]
=
(
uint8_t
)
(
ra
->
timing_offset
>>
4
)
&
0x7f
;
// 7 MSBs of timing advance
rar
[
1
]
=
(
uint8_t
)
(
ra
->
timing_offset
&
0x0f
)
<<
4
;
// 4 LSBs of timing advance
/
/ Copy the Msg2 narrowband
/
* Copy the Msg2 narrowband */
ra
->
msg34_narrowband
=
ra
->
msg2_narrowband
;
ra
->
msg3_first_rb
=
0
;
ra
->
msg3_nb_rb
=
2
;
if
(
ce_level
<
2
)
{
//CE Level 0,1, CEmodeA
if
(
ce_level
<
2
)
{
// CE Level 0, 1 (CEmodeA)
input_buffer_length
=
6
;
N_NB_index
=
get_numnarrowbandbits
(
cc
->
mib
->
message
.
dl_Bandwidth
);
rar
[
4
]
=
(
uint8_t
)(
ra
->
rnti
>>
8
);
rar
[
5
]
=
(
uint8_t
)(
ra
->
rnti
&
0xff
);
//cc->ra[ra_idx].timing_offset = 0;
/* UL Grant */
reps
=
0
;
ra
->
msg3_mcs
=
7
;
TPC
=
3
;
// no power increase
ULdelay
=
0
;
cqireq
=
0
;
mpdcch_nb_index
=
0
;
rballoc
=
mac_computeRIV
(
6
,
ra
->
msg3_first_rb
,
ra
->
msg3_nb_rb
);
rballoc
=
mac_computeRIV
(
6
,
ra
->
msg3_first_rb
,
ra
->
msg3_nb_rb
);
uint32_t
buffer
=
0
;
buffer
|=
ra
->
msg34_narrowband
<<
(
16
+
(
4
-
N_NB_index
));
buffer
|=
((
rballoc
&
0x
F
F
)
<<
(
12
+
(
4
-
N_NB_index
)));
buffer
|=
((
rballoc
&
0x
0
F
)
<<
(
12
+
(
4
-
N_NB_index
)));
buffer
|=
((
reps
&
0x03
)
<<
(
10
+
(
4
-
N_NB_index
)));
buffer
|=
((
ra
->
msg3_mcs
&
0x07
)
<<
(
7
+
(
4
-
N_NB_index
)));
buffer
|=
((
TPC
&
0x07
)
<<
(
4
+
(
4
-
N_NB_index
)));
buffer
|=
((
cqireq
&
0x01
)
<<
(
3
+
(
4
-
N_NB_index
)));
buffer
|=
((
ULdelay
&
0x01
)
<<
(
2
+
(
4
-
N_NB_index
)));
buffer
|=
(
mpdcch_nb_index
<<
(
4
-
N_NB_index
));
rar
[
1
]
=
(
buffer
>>
16
)
&
0x0F
;
rar
[
2
]
=
(
buffer
>>
8
)
&
0xFF
;
rar
[
3
]
=
buffer
&
0xFF
;
}
else
{
// CE level 2,3 => CEModeB
AssertFatal
(
1
==
0
,
"Shouldn't get here ...
\n
"
);
input_buffer_length
=
5
;
rar
[
1
]
|=
(
uint8_t
)
(
buffer
>>
16
)
&
0x0F
;
rar
[
2
]
=
(
uint8_t
)
(
buffer
>>
8
)
&
0xFF
;
rar
[
3
]
=
(
uint8_t
)
buffer
&
0xFF
;
/* RA CRNTI */
rar
[
4
]
=
(
uint8_t
)(
ra
->
rnti
>>
8
);
rar
[
5
]
=
(
uint8_t
)(
ra
->
rnti
&
0xff
);
}
else
{
// CE level 2, 3 (CEModeB)
rar
[
3
]
=
(
uint8_t
)(
ra
->
rnti
>>
8
);
rar
[
4
]
=
(
uint8_t
)(
ra
->
rnti
&
0xff
);
AssertFatal
(
1
==
0
,
"Shouldn't get here ...
\n
"
);
input_buffer_length
=
5
;
rar
[
3
]
=
(
uint8_t
)(
ra
->
rnti
>>
8
);
rar
[
4
]
=
(
uint8_t
)(
ra
->
rnti
&
0xff
);
}
LOG_I
(
MAC
,
"[RAPROC] Frame %d Subframe %d : Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x,preamble %d/%d,TIMING OFFSET %d
\n
"
,
frameP
,
subframeP
,
*
(
uint8_t
*
)
rarh
,
rar
[
0
],
rar
[
1
],
rar
[
2
],
rar
[
3
],
rar
[
4
],
rar
[
5
],
LOG_I
(
MAC
,
"[RAPROC] Frame %d Subframe %d : Generating RAR BR (%02x|%02x.%02x.%02x.%02x.%02x.%02x) for ce_level %d, CRNTI %x, preamble %d/%d, TIMING OFFSET %d
\n
"
,
frameP
,
subframeP
,
*
(
uint8_t
*
)
rarh
,
rar
[
0
],
rar
[
1
],
rar
[
2
],
rar
[
3
],
rar
[
4
],
rar
[
5
],
ce_level
,
ra
->
rnti
,
rarh
->
RAPID
,
ra
->
preamble_index
,
rarh
->
RAPID
,
ra
->
preamble_index
,
ra
->
timing_offset
);
if
(
opt_enabled
)
{
trace_pdu
(
DIRECTION_DOWNLINK
,
dlsch_buffer
,
input_buffer_length
,
eNB
->
Mod_id
,
WS_RA_RNTI
,
1
,
eNB
->
frame
,
eNB
->
subframe
,
0
,
0
);
LOG_D
(
OPT
,
"[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d
\n
"
,
frameP
,
ra
->
rnti
,
rarh
->
RAPID
,
input_buffer_length
);
trace_pdu
(
DIRECTION_DOWNLINK
,
dlsch_buffer
,
input_buffer_length
,
eNB
->
Mod_id
,
WS_RA_RNTI
,
1
,
eNB
->
frame
,
eNB
->
subframe
,
0
,
0
);
LOG_D
(
OPT
,
"[RAPROC] RAR Frame %d trace pdu for rnti %x and rapid %d size %d
\n
"
,
frameP
,
ra
->
rnti
,
rarh
->
RAPID
,
input_buffer_length
);
}
return
(
ra
->
rnti
);
...
...
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