Skip to content

O
OpenXG-RAN
Commit 156b806a authored by Ejaz Ahmed's avatar Ejaz Ahmed
Browse files
Options

Updated code for psfch tx side

parent d4e030cc
Hide whitespace changes
Inline Side-by-side
Showing with 172 additions and 45 deletions
nfapi/open-nFAPI/nfapi/public_inc/sidelink_nr_ue_interface.h
View file @ 156b806a
......@@ -30,6 +30,7 @@ typedef enum sl_nr_rx_config_type_enum {
SL_NR_CONFIG_TYPE_RX_PSCCH,
SL_NR_CONFIG_TYPE_RX_PSSCH_SCI,
SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH,
SL_NR_CONFIG_TYPE_RX_PSFCH,
SL_NR_CONFIG_TYPE_RX_MAXIMUM
} sl_nr_rx_config_type_enum_t;
......@@ -302,9 +303,25 @@ typedef struct sl_nr_tx_config_psfch_pdu {
uint8_t prb;
uint16_t initial_cyclic_shift;
uint8_t mcs;
uint8_t psfch_payload;
} sl_nr_tx_config_psfch_pdu_t;
typedef struct sl_nr_rx_config_psfch_pdu {
// These fields map directly to the same fields in nfapi_nr_ul_config_pucch_pdu
uint8_t freq_hop_flag;
uint8_t group_hop_flag;
uint8_t sequence_hop_flag;
uint16_t second_hop_prb;
uint8_t nr_of_symbols;
uint8_t start_symbol_index;
uint8_t hopping_id;
uint8_t prb;
uint16_t initial_cyclic_shift;
uint8_t mcs;
uint8_t psfch_payload;
} sl_nr_rx_config_psfch_pdu_t;
// MAC commands PHY to perform an action on TX RESOURCE POOL or TX PSBCH using this TX CONFIG
typedef struct {
sl_nr_tx_config_type_enum_t pdu_type; // indicates the type of TX config request
......
openair1/PHY/NR_UE_TRANSPORT/nr_psfch_tx.c
View file @ 156b806a
......@@ -59,5 +59,7 @@ void nr_generate_psfch0(const PHY_VARS_NR_UE *ue,
pucch_pdu.prb_start = psfch_pdu->prb;
pucch_pdu.initial_cyclic_shift = psfch_pdu->initial_cyclic_shift;
pucch_pdu.mcs = psfch_pdu->mcs;
nr_generate_pucch0(ue,txdataF,frame_parms,amp,nr_slot_tx,&pucch_pdu);
}
pucch_pdu.nr_of_symbols = psfch_pdu->nr_of_symbols;
pucch_pdu.payload = psfch_pdu->psfch_payload;
nr_generate_pucch0(ue,txdataF,frame_parms,amp,nr_slot_tx,&pucch_pdu);
}
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
View file @ 156b806a
......@@ -161,6 +161,7 @@ void nr_generate_pucch0(const PHY_VARS_NR_UE *ue,
txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset].r = (int16_t)(((int32_t)(amp) * x_n_re[l][n])>>15);
txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset].i = (int16_t)(((int32_t)(amp) * x_n_im[l][n])>>15);
LOG_I(NR_PHY, "re %x, i %x\n", txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset].r, txdataF[0][(l2*frame_parms->ofdm_symbol_size) + re_offset].i);
//((int16_t *)txptr[0][re_offset])[0] = (int16_t)((int32_t)amp * x_n_re[(12*l)+n])>>15;
//((int16_t *)txptr[0][re_offset])[1] = (int16_t)((int32_t)amp * x_n_im[(12*l)+n])>>15;
//txptr[re_offset] = (x_n_re[(12*l)+n]<<16) + x_n_im[(12*l)+n];
......
openair1/PHY/defs_nr_UE.h
View file @ 156b806a
......@@ -222,6 +222,17 @@ typedef struct {
} NR_UE_PUCCH;
typedef struct {
int max_nb_pucch;
/// \brief Pointers (dynamic) to the received data in the frequency domain.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: ? [0..2*ofdm_symbol_size*frame_parms->symbols_per_tti[
c16_t **rxdataF;
/// \brief holds the transmit data in the frequency domain.
/// For IFFT_FPGA this points to the same memory as PHY_vars->rx_vars[a].RX_DMA_BUFFER. //?
/// - first index: eNB id [0..2] (hard coded)
/// - second index: tx antenna [0..14[ where 14 is the total supported antenna ports.
/// - third index: sample [0..samples_per_frame_woCP]
c16_t **txdataF;
/// \brief Holds the transmit data in time domain.
/// For IFFT_FPGA this points to the same memory as PHY_vars->tx_vars[a].TX_DMA_BUFFER.
/// - first index: tx antenna [0..nb_antennas_tx[
......@@ -709,6 +720,7 @@ typedef struct nr_phy_data_s {
sl_nr_rx_config_pscch_pdu_t nr_sl_pscch_pdu;
sl_nr_rx_config_pssch_sci_pdu_t nr_sl_pssch_sci_pdu;
sl_nr_rx_config_pssch_pdu_t nr_sl_pssch_pdu;
sl_nr_rx_config_psfch_pdu_t nr_sl_psfch_pdu;
} nr_phy_data_t;
/* this structure is used to pass both UE phy vars and
* proc to the function UE_thread_rxn_txnp4
......
openair1/PHY/defs_nr_sl_UE.h
View file @ 156b806a
......@@ -183,6 +183,15 @@ typedef struct SL_NR_UE_PSBCH {
} SL_NR_UE_PSBCH_t;
typedef struct SL_NR_UE_PSFCH {
// STATS - Receptions with CRC OK
uint16_t rx_ok;
// STATS - transmissions of PSFCH by the UE
uint16_t num_psfch_tx;
} SL_NR_UE_PSFCH_t;
typedef struct sl_nr_ue_phy_params {
SL_NR_UE_INIT_PARAMS_t init_params;
......@@ -198,6 +207,9 @@ typedef struct sl_nr_ue_phy_params {
// sidelink phy parameters used for pssch reception/txn
SL_NR_UE_PSSCH_t pssch;
// sidelink phy parameters used for psfch reception/txn
SL_NR_UE_PSFCH_t psfch;
//Configuration parameters from MAC
sl_nr_phy_config_request_t sl_config;
......
openair1/SCHED_NR_UE/phy_procedures_nr_ue_sl.c
View file @ 156b806a
......@@ -91,7 +91,7 @@ void nr_fill_sl_rx_indication(sl_nr_rx_indication_t *rx_ind,
rx_slsch_pdu->pdu = slsch_status->rdata->ulsch_harq->b;
rx_slsch_pdu->pdu_length = slsch_status->rdata->ulsch_harq->TBS;
rx_slsch_pdu->harq_pid = slsch_status->rdata->harq_pid;
rx_slsch_pdu->ack_nack = (slsch_status->rxok==true) ? 1 : 1; // Revert it, for testing only
rx_slsch_pdu->ack_nack = (slsch_status->rxok==true) ? 1 : 0;
if (slsch_status->rxok==true) ue->SL_UE_PHY_PARAMS.pssch.rx_ok++;
else ue->SL_UE_PHY_PARAMS.pssch.rx_errors[0]++;
......@@ -268,7 +268,7 @@ void nr_postDecode_slsch(PHY_VARS_NR_UE *UE, notifiedFIFO_elt_t *req,UE_nr_rxtx_
slsch_status.rxok = true;
//dumpsig=1;
} else {
LOG_D(NR_PHY,
LOG_I(NR_PHY,
"[UE] SLSCH: Setting NAK for SFN/SF %d/%d (pid %d, ndi %d, status %d, round %d, RV %d, prb_start %d, prb_size %d, "
"TBS %d) r %d\n",
slsch->frame,
......@@ -289,8 +289,11 @@ void nr_postDecode_slsch(PHY_VARS_NR_UE *UE, notifiedFIFO_elt_t *req,UE_nr_rxtx_
// dumpsig=1;
}
slsch->last_iteration_cnt = rdata->decodeIterations;
sl_rx_indication.sfn = proc->frame_rx;
sl_rx_indication.slot = proc->nr_slot_rx;
nr_fill_sl_rx_indication(&sl_rx_indication,SL_NR_RX_PDU_TYPE_SLSCH,UE,1,proc,(void*)&slsch_status,0);
nr_fill_sl_indication(&sl_indication,&sl_rx_indication,NULL,proc,UE,phy_data);
LOG_D(NR_PHY, "sl_ind frame %d, slot %d\n", sl_indication.rx_ind->sfn, sl_indication.rx_ind->slot);
if (UE->if_inst && UE->if_inst->sl_indication)
UE->if_inst->sl_indication(&sl_indication);
/*
......@@ -436,6 +439,10 @@ void psbch_pscch_pssch_processing(PHY_VARS_NR_UE *ue,
sl_phy_params->pssch.rx_errors[1],
sl_phy_params->pssch.rx_errors[2],
sl_phy_params->pssch.rx_errors[3]);
LOG_I(NR_PHY, "%s[UE%d] %d:%d PSFCH Stats: TX %d, RX \n",KGRN,
ue->Mod_id, frame_rx, nr_slot_rx,
sl_phy_params->psfch.num_psfch_tx
);
LOG_I(NR_PHY,"============================================\n");
}
......@@ -726,9 +733,11 @@ int phy_procedures_nrUE_SL_TX(PHY_VARS_NR_UE *ue,
AMP,
slot_tx,
&phy_data->nr_sl_psfch_pdu);
sl_phy_params->psfch.num_psfch_tx ++;
tx_action = 1;
}
if (tx_action) {
LOG_D(PHY, "Sending SL data \n");
LOG_D(PHY, "Sending SL data frame %d slot %d\n", frame_tx, slot_tx);
nr_ue_pusch_common_procedures(ue,
proc->nr_slot_tx,
fp,
......
openair2/LAYER2/NR_MAC_UE/mac_defs.h
View file @ 156b806a
......@@ -449,9 +449,11 @@ typedef struct NR_sched_pssch {
typedef struct {
bool is_waiting;
bool is_active;
uint8_t ndi;
uint8_t round;
uint16_t feedback_slot;
uint16_t feedback_frame;
/// sched_pusch keeps information on MCS etc used for the initial transmission
NR_sched_pssch_t sched_pssch;
......
openair2/LAYER2/NR_MAC_UE/mac_proto.h
View file @ 156b806a
......@@ -498,6 +498,10 @@ bool nr_schedule_slsch(NR_UE_MAC_INST_t *mac, int frameP, int slotP, nr_sci_pdu_
uint8_t *slsch_pdu,
nr_sci_format_t format2,
uint16_t *slsch_pdu_length);
void config_psfch_pdu_rx(NR_UE_MAC_INST_t *mac,
sl_nr_rx_config_psfch_pdu_t *nr_sl_psfch_pdu,
const NR_SL_BWP_Generic_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool);
void config_pscch_pdu_rx(sl_nr_rx_config_pscch_pdu_t *nr_sl_pscch_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
......
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures_sl.c
View file @ 156b806a
......@@ -633,43 +633,66 @@ void nr_ue_process_mac_sl_pdu(int module_idP,
uint8_t *pduP = (rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.pdu;
int32_t pdu_len = (int32_t)(rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.pdu_length;
uint8_t done = 0;
NR_UE_sl_harq_t *harq_proc;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
int frame = rx_ind->sfn;
int slot = rx_ind->slot;
uint16_t sched_frame, sched_slot;
if (!pduP){
return;
}
LOG_I(NR_MAC, "Filling psfch pdu %d\n", module_idP);
if ((rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack == 1) {
uint16_t m0 = nr_ue_configure_psfch(module_idP);
mac->sl_tx_config_psfch_pdu = calloc(1, sizeof(sl_nr_tx_config_psfch_pdu_t));
mac->sl_tx_config_psfch_pdu->initial_cyclic_shift = m0;
if (mac->sci1_pdu.second_stage_sci_format == 2 ||
mac->sci_pdu_rx.cast_type == 1 ||
mac->sci_pdu_rx.cast_type == 2) {
mac->sl_tx_config_psfch_pdu->mcs = sequence_cyclic_shift_harq_ack_or_ack_or_only_nack[1]; // TODO: Update to use index 0 as well.
} else if (mac->sci1_pdu.second_stage_sci_format == 1 ||
(mac->sci1_pdu.second_stage_sci_format == 1 && mac->sci_pdu_rx.cast_type == 3)) {
mac->sl_tx_config_psfch_pdu->mcs = sequence_cyclic_shift_harq_ack_or_ack_or_only_nack[0];
}
NR_SL_PSFCH_Config_r16_t *sl_psfch_config = mac->sl_tx_res_pool->sl_PSFCH_Config_r16->choice.setup;
const uint8_t time_gap[] = {2, 3};
uint8_t psfch_min_time_gap = time_gap[*sl_psfch_config->sl_MinTimeGapPSFCH_r16];
uint8_t harq_pid = (rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.harq_pid;
mac->sl_info.list[0] = calloc(1, sizeof(NR_SL_UE_info_t));
harq_proc = &mac->sl_info.list[0]->UE_sched_ctrl.sl_harq_processes[harq_pid];
mac->sl_info.list[0]->dest_id = mac->sci_pdu_rx.source_id;
mac->sl_info.list[0]->uid = module_idP;
long psfch_period = *sl_psfch_config->sl_PSFCH_Period_r16;
int delta_slots = (slot + psfch_min_time_gap) % psfch_period ? psfch_period - (slot + psfch_min_time_gap) % psfch_period: 0;
sched_slot = slot + psfch_min_time_gap + delta_slots;
LOG_D(NR_MAC, "psfch_period %d, slot %d, delta_slots %d, sched_slot %d, time_gap %d\n", psfch_period, slot, delta_slots, sched_slot, psfch_min_time_gap);
sched_frame = frame;
if (sched_slot >= NR_MAX_SLOTS_PER_FRAME) {
sched_slot %= NR_MAX_SLOTS_PER_FRAME;
sched_frame = (sched_frame + 1) %1024;
}
harq_proc->feedback_slot = sched_slot;
harq_proc->feedback_frame = sched_frame;
harq_proc->is_active = true;
LOG_D(NR_MAC, "feedback_slot %d, feedback_frame %d, slot %d, frame %d\n", harq_proc->feedback_slot, harq_proc->feedback_frame, slot, frame);
uint8_t ack_nack = (rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack;
uint16_t m0 = nr_ue_configure_psfch(module_idP);
LOG_I(NR_MAC, "EJAZ:: m0\n", m0);
mac->sl_tx_config_psfch_pdu = calloc(1, sizeof(sl_nr_tx_config_psfch_pdu_t));
mac->sl_tx_config_psfch_pdu->initial_cyclic_shift = m0;
if (mac->sci1_pdu.second_stage_sci_format == 2 ||
mac->sci_pdu_rx.cast_type == 1 ||
mac->sci_pdu_rx.cast_type == 2) {
mac->sl_tx_config_psfch_pdu->mcs = sequence_cyclic_shift_harq_ack_or_ack_or_only_nack[ack_nack];
} else if (mac->sci1_pdu.second_stage_sci_format == 1 ||
(mac->sci1_pdu.second_stage_sci_format == 1 && mac->sci_pdu_rx.cast_type == 3)) {
mac->sl_tx_config_psfch_pdu->mcs = sequence_cyclic_shift_harq_ack_or_ack_or_only_nack[0];
}
const uint8_t values[] = {7, 8, 9, 10, 11, 12, 13, 14};
NR_SL_BWP_Generic_r16_t *sl_bwp = mac->sl_bwp->sl_BWP_Generic_r16;
uint8_t sl_num_symbols = (sl_bwp->sl_LengthSymbols_r16) ?
uint8_t sl_num_symbols = *sl_bwp->sl_LengthSymbols_r16 ?
values[*sl_bwp->sl_LengthSymbols_r16] : 0;
mac->sl_tx_config_psfch_pdu->start_symbol_index = *mac->sl_bwp->sl_BWP_Generic_r16->sl_StartSymbol_r16 + sl_num_symbols - 2; // start_symbol_index has been used as lprime and lprime should be computed as lprime = start symbol + sl_LengthSymbols_r16 - 2
mac->sl_tx_config_psfch_pdu->start_symbol_index = *sl_bwp->sl_StartSymbol_r16 + sl_num_symbols - 2; // start_symbol_index has been used as lprime and lprime should be computed as lprime = start symbol + sl_LengthSymbols_r16 - 2
mac->sl_tx_config_psfch_pdu->hopping_id = *mac->sl_bwp->sl_BWP_PoolConfigCommon_r16->sl_TxPoolSelectedNormal_r16->list.array[0]->sl_ResourcePool_r16->sl_PSFCH_Config_r16->choice.setup->sl_PSFCH_HopID_r16;
mac->sl_tx_config_psfch_pdu->prb = 2;
mac->sl_tx_config_psfch_pdu->prb = 1;
mac->sl_tx_config_psfch_pdu->psfch_payload = 1;
LOG_D(NR_MAC,"Filled psfch pdu %d\n", module_idP);
LOG_D(NR_MAC,"pucch_pdu->hopping_id %d\n", mac->sl_tx_config_psfch_pdu->hopping_id);
LOG_D(NR_MAC,"pucch_pdu->initial_cyclic_shift %d\n", mac->sl_tx_config_psfch_pdu->initial_cyclic_shift);
LOG_D(NR_MAC,"pucch_pdu->mcs %d\n", mac->sl_tx_config_psfch_pdu->mcs);
LOG_D(NR_MAC,"start_sym_index %d\n", mac->sl_tx_config_psfch_pdu->start_symbol_index);
}
if ((rx_ind->rx_indication_body + pdu_id)->rx_slsch_pdu.ack_nack == 0)
return;
......
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @ 156b806a
......@@ -3385,7 +3385,22 @@ bool nr_ue_sl_pssch_scheduler(NR_UE_MAC_INST_t *mac,
}
return true;
}
void nr_ue_sl_psfch_rx_scheduler(NR_UE_MAC_INST_t *mac,
nr_sidelink_indication_t *sl_ind,
const NR_SL_BWP_Generic_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
sl_nr_rx_config_request_t *rx_config,
uint8_t *config_type) {
*config_type = SL_NR_CONFIG_TYPE_RX_PSFCH;
rx_config->number_pdus = 1;
rx_config->sfn = sl_ind->frame_rx;
rx_config->slot = sl_ind->slot_rx;
rx_config->sl_rx_config_list[0].pdu_type = *config_type;
config_psfch_pdu_rx(mac, &rx_config->sl_rx_config_list[0].rx_pscch_config_pdu,
sl_bwp,
sl_res_pool);
LOG_D(NR_MAC, "[UE%d] TTI-%d:%d RX PSFCH REQ \n", sl_ind->module_id,sl_ind->frame_rx, sl_ind->slot_rx);
}
void nr_ue_sl_pscch_rx_scheduler(nr_sidelink_indication_t *sl_ind,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool,
......@@ -3570,8 +3585,18 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) {
if (((1<<slot_mod_period) % mask) == 0) rx_allowed=false;
}
if (sl_ind->slot_type==SIDELINK_SLOT_TYPE_TX || sl_ind->phy_data==NULL) rx_allowed=false;
if (((get_nrUE_params()->sync_ref && sl_ind->slot_rx > 9) ||
(!get_nrUE_params()->sync_ref && sl_ind->slot_rx < 10)) && rx_allowed && !is_psbch_slot) {
LOG_D(NR_MAC, "sync_ref %d, slot_rx %d, rx_allowed %d, psbch slot %d\n", get_nrUE_params()->sync_ref, sl_ind->slot_rx, rx_allowed, !is_psbch_slot);
if (get_nrUE_params()->sync_ref && rx_allowed && !is_psbch_slot) {
NR_SL_PSFCH_Config_r16_t *sl_psfch_config = mac->sl_rx_res_pool->sl_PSFCH_Config_r16->choice.setup;
long psfch_period = *sl_psfch_config->sl_PSFCH_Period_r16;
if (slot%psfch_period == 0) {
LOG_D(NR_MAC,"Scheduling PSFCH RX processing slot %d, sync_ref %d\n",slot,get_nrUE_params()->sync_ref);
nr_ue_sl_psfch_rx_scheduler(mac, sl_ind, mac->sl_bwp->sl_BWP_Generic_r16, mac->sl_rx_res_pool, &rx_config, &tti_action);
}
}
if (((get_nrUE_params()->sync_ref && sl_ind->slot_rx > 9) ||
(!get_nrUE_params()->sync_ref && sl_ind->slot_rx < 10)) && rx_allowed && !is_psbch_slot) {
LOG_D(NR_MAC,"Scheduling PSCCH RX processing slot %d, sync_ref %d\n",slot,get_nrUE_params()->sync_ref);
nr_ue_sl_pscch_rx_scheduler(sl_ind, mac->sl_bwp, mac->sl_rx_res_pool,&rx_config, &tti_action);
}
......@@ -3582,19 +3607,20 @@ void nr_ue_sidelink_scheduler(nr_sidelink_indication_t *sl_ind) {
if (sl_ind->slot_type == SIDELINK_SLOT_TYPE_TX && mac->sci_pdu_rx.harq_feedback) {
NR_SL_PSFCH_Config_r16_t *sl_psfch_config = mac->sl_tx_res_pool->sl_PSFCH_Config_r16->choice.setup;
long psfch_period = *sl_psfch_config->sl_PSFCH_Period_r16;
long psfch_min_time_gap = *sl_psfch_config->sl_MinTimeGapPSFCH_r16;
sl_ind->slot_tx = (slot + psfch_min_time_gap) % NR_MAX_SLOTS_PER_FRAME;
if (slot + psfch_min_time_gap >= NR_MAX_SLOTS_PER_FRAME) {
sl_ind->frame_tx = (frame + 1) % 1024;
}
// Need to check further weather New slot is SIDELINK SLOT or not
// Add further check based on HARQ-ACK indication in SCI
if (slot%psfch_period == 0) {
nr_ue_sl_psfch_scheduler(mac, sl_ind, mac->sl_bwp, mac->sl_tx_res_pool, &tx_config, &tti_action);
NR_UE_sl_harq_t *current_harq;
for (int harq_pid = 0; harq_pid < 16; harq_pid++) {
current_harq = &mac->sl_info.list[0]->UE_sched_ctrl.sl_harq_processes[harq_pid];
sl_ind->slot_tx = current_harq->feedback_slot;
sl_ind->frame_tx = current_harq->feedback_frame;
if (slot%psfch_period == 0 && current_harq->feedback_slot == slot && current_harq->feedback_frame == frame && current_harq->is_active) {
LOG_I(NR_MAC, "Scheduling PSFCH transmission at frame %d slot %d \n", current_harq->feedback_frame, current_harq->feedback_slot);
nr_ue_sl_psfch_scheduler(mac, sl_ind, mac->sl_bwp, mac->sl_tx_res_pool, &tx_config, &tti_action);
current_harq->is_active = false;
break;
}
}
}
}
if (tti_action == SL_NR_CONFIG_TYPE_RX_PSBCH || tti_action == SL_NR_CONFIG_TYPE_RX_PSCCH || tti_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SCI || tti_action == SL_NR_CONFIG_TYPE_RX_PSSCH_SLSCH) {
fill_scheduled_response(&scheduled_response, NULL, NULL, NULL, &rx_config, NULL, mod_id, 0,frame, slot, sl_ind->phy_data);
}
......@@ -3633,15 +3659,15 @@ void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac,
}
if (sl_ind->slot_type != SIDELINK_SLOT_TYPE_TX) return false;
if (slot > 9 && get_nrUE_params()->sync_ref) return false;
// if (slot > 9 && get_nrUE_params()->sync_ref) return false;
if (slot < 10 && !get_nrUE_params()->sync_ref) return false;
// if (slot < 10 && !get_nrUE_params()->sync_ref) return false;
/*
if ((frame&127) > 0) return false;
if ((slot % 10) != 6) return false;
*/
LOG_I(NR_MAC,"[UE%d] SL-PSFCH SCHEDULER: Frame:SLOT %d:%d, slot_type:%d\n",
LOG_D(NR_MAC,"[UE%d] SL-PSFCH SCHEDULER: Frame:SLOT %d:%d, slot_type:%d\n",
sl_ind->module_id, frame, slot,sl_ind->slot_type);
sl_nr_tx_config_psfch_pdu_t *tx_psfch_pdu = &tx_config->tx_config_list[0].tx_psfch_config_pdu;
......@@ -3655,12 +3681,12 @@ void nr_ue_sl_psfch_scheduler(NR_UE_MAC_INST_t *mac,
tx_psfch_pdu->group_hop_flag = 0;
tx_psfch_pdu->sequence_hop_flag = 0;
tx_psfch_pdu->nr_of_symbols = 1;
const uint8_t sh_size = sizeof(NR_MAC_SUBHEADER_LONG);
tx_psfch_pdu->psfch_payload = mac->sl_tx_config_psfch_pdu->psfch_payload;
*config_type = SL_NR_CONFIG_TYPE_TX_PSFCH;
tx_config->number_pdus = 1;
tx_config->sfn = frame;
tx_config->slot = slot;
tx_config->tx_config_list[0].pdu_type = *config_type;
//TODO: Add PSFCH related further configurations.
}
\ No newline at end of file
openair2/LAYER2/NR_MAC_UE/nr_ue_sci_slsch.c
View file @ 156b806a
......@@ -355,7 +355,7 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
N_RE,1+(sci_pdu->number_of_dmrs_port&1))>>3;
nr_sl_pssch_pscch_pdu->mcs = sci_pdu->mcs;
nr_sl_pssch_pscch_pdu->num_layers = sci_pdu->number_of_dmrs_port+1;
LOG_D(NR_MAC,"PSSCH: mcs %d, coderate %d, Nl %d => tbs %d\n",sci_pdu->mcs,nr_sl_pssch_pscch_pdu->target_coderate,nr_sl_pssch_pscch_pdu->num_layers,nr_sl_pssch_pscch_pdu->tb_size);
LOG_I(NR_MAC,"PSSCH: mcs %d, coderate %d, Nl %d => tbs %d\n",sci_pdu->mcs,nr_sl_pssch_pscch_pdu->target_coderate,nr_sl_pssch_pscch_pdu->num_layers,nr_sl_pssch_pscch_pdu->tb_size);
nr_sl_pssch_pscch_pdu->tbslbrm = nr_compute_tbslbrm(mcs_tb_ind,NRRIV2BW(sl_bwp->sl_BWP_Generic_r16->sl_BWP_r16->locationAndBandwidth,273),nr_sl_pssch_pscch_pdu->num_layers);
nr_sl_pssch_pscch_pdu->mcs_table=mcs_tb_ind;
nr_sl_pssch_pscch_pdu->rv_index = sci2_pdu->rv_index;
......@@ -462,7 +462,26 @@ void fill_pssch_pscch_pdu(sl_nr_tx_config_pscch_pssch_pdu_t *nr_sl_pssch_pscch_p
nr_sl_pssch_pscch_pdu->slsch_payload_length = slsch_pdu_length;
};
void config_psfch_pdu_rx(NR_UE_MAC_INST_t *mac,
sl_nr_rx_config_psfch_pdu_t *nr_sl_psfch_pdu,
const NR_SL_BWP_Generic_r16_t *sl_bwp,
const NR_SL_ResourcePool_r16_t *sl_res_pool) {
nr_sl_psfch_pdu->freq_hop_flag = 0;
nr_sl_psfch_pdu->group_hop_flag = 0;
nr_sl_psfch_pdu->sequence_hop_flag = 0;
nr_sl_psfch_pdu->second_hop_prb = 0;
nr_sl_psfch_pdu->nr_of_symbols = 1;
const uint8_t values[] = {7, 8, 9, 10, 11, 12, 13, 14};
LOG_D(NR_MAC, "E1 *sl_bwp->sl_LengthSymbols_r16 %d\n", *sl_bwp->sl_LengthSymbols_r16);
uint8_t sl_num_symbols = *sl_bwp->sl_LengthSymbols_r16 ?
values[*sl_bwp->sl_LengthSymbols_r16] : 0;
nr_sl_psfch_pdu->start_symbol_index = *sl_bwp->sl_StartSymbol_r16 + sl_num_symbols - 2;
nr_sl_psfch_pdu->hopping_id = 0;
nr_sl_psfch_pdu->prb = 1;
// nr_sl_psfch_pdu->initial_cyclic_shift = mac->sl_;
// nr_sl_psfch_pdu->mcs = mac->sl_;
nr_sl_psfch_pdu->psfch_payload = 0;
}
void config_pscch_pdu_rx(sl_nr_rx_config_pscch_pdu_t *nr_sl_pscch_pdu,
const NR_SL_BWP_ConfigCommon_r16_t *sl_bwp,
......
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
View file @ 156b806a
......@@ -1498,7 +1498,7 @@ void sl_nr_process_rx_ind(uint16_t mod_id,
break;
case SL_NR_RX_PDU_TYPE_SLSCH:
LOG_D(NR_MAC, "%s[UE%d]SL-MAC Received SLSCH: rx_slsch_pdu:%p, rx_slsch_len %d, ack_nack %d, harq_pid %d\n",KGRN,
LOG_I(NR_MAC, "%s[UE%d]SL-MAC Received SLSCH: rx_slsch_pdu:%p, rx_slsch_len %d, ack_nack %d, harq_pid %d\n",KGRN,
mod_id,rx_ind->rx_indication_body[num_pdus - 1].rx_slsch_pdu.pdu,
rx_ind->rx_indication_body[num_pdus - 1].rx_slsch_pdu.pdu_length,
rx_ind->rx_indication_body[num_pdus - 1].rx_slsch_pdu.ack_nack,
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment