Commit 213c948d authored by hardy's avatar hardy

Merge remote-tracking branch 'origin/develop-sib1' into integration_2021_wk02_wMR988

 Conflicts:
	openair1/PHY/NR_UE_TRANSPORT/nr_dlsch_decoding.c
	openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
parents e5aabd88 ab107c98
......@@ -295,6 +295,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- NR RRC (38.331) Rel 15 messages using new asn1c
- LTE RRC (36.331) also updated to Rel 15
- Generation of CellGroupConfig (for eNB) and MIB
- Generation of system information block 1 (SIB1)
- Application to read configuration file and program gNB RRC
- RRC can configure PDCP, RLC, MAC
......@@ -305,7 +306,8 @@ The following features are valid for the gNB and the 5G-NR UE.
**gNB MAC**
- MAC -> PHY configuration using NR FAPI P5 interface
- MAC <-> PHY data interface using FAPI P7 interface for BCH PDU, DCI PDU, PDSCH PDU
- Scheduler for RA procedreat gNB
- Scheduler procedures for SIB1
- Scheduler procedures for RA
- MAC downlink scheduler (fixed allocations)
- MAC header generation (including timing advance)
- ACK / NACK handling and HARQ procedures for downlink
......@@ -350,11 +352,13 @@ The following features are valid for the gNB and the 5G-NR UE.
## UE Higher Layers ##
**gNB MAC**
- Initial sync and MIB detection
- MAC -> PHY configuration of PHY via UE FAPI P5 interface
- Basic MAC to control PHY via UE FAPI P7 interface
- Random access procedure
**UE MAC**
* Minimum system information (MSI)
- Initial sync and MIB detection
- System information block 1 (SIB1) reception
* MAC -> PHY configuration of PHY via UE FAPI P5 interface
* Basic MAC to control PHY via UE FAPI P7 interface
* Random access procedure
**RLC**
......
......@@ -132,6 +132,40 @@ With the RF simulator (on the same machine):
`sudo RFSIMULATOR=127.0.0.1 ./nr-uesoftmodem --do-ra --rfsim --parallel-config PARALLEL_SINGLE_THREAD`
## sa setup with OAI
The sa flag is used to run gNB in standalone mode. Currently OAI in NR standalone mode transmits and receives SIB1.
In order to run gNB in standalone mode, the following flag is needed at gNB:
`--sa`
### Run OAI in sa mode
At the gNB the --sa flag does the following
- it reads the RRC configuration from the configuration file
- it encodes the RRCConfiguration and the RBconfig message and stores them in the binary files rbconfig.raw and reconfig.raw
- the RRC encodes SIB1 according the configuration file and transmits it through PDSCH
At the UE the --sa flag will
- read the binary files rbconfig.raw and reconfig.raw from the current directory (a different directory can be specified with the flag --rrc_config_path) and process them.
From the `cmake_targets/ran_build/build` folder:
gNB on machine 1:
`sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf --sa`
UE on machine 2:
`sudo ./nr-uesoftmodem --rrc_config_path . --sa`
With the RF simulator (on the same machine):
`sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf --rfsim --sa`
`sudo ./nr-uesoftmodem --rrc_config_path . --rfsim --sa`
## IF setup with OAI
The -C and -CO flags can be used together at UE side to set custom downlink and uplink FR1 intermediate frequencies for the IF equipment.
......
......@@ -343,7 +343,7 @@ int create_gNB_tasks(uint32_t gnb_nb) {
}
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) {
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0 && get_softmodem_params()->sa==0)) {
if (gnb_nb > 0) {
/*
if (itti_create_task (TASK_SCTP, sctp_eNB_task, NULL) < 0) {
......@@ -767,6 +767,9 @@ int main( int argc, char **argv )
if (get_softmodem_params()->do_ra)
AssertFatal(get_softmodem_params()->phy_test == 0,"RA and phy_test are mutually exclusive\n");
if (get_softmodem_params()->sa)
AssertFatal(get_softmodem_params()->phy_test == 0,"Standalone mode and phy_test are mutually exclusive\n");
#if T_TRACER
T_Config_Init();
#endif
......
......@@ -745,14 +745,13 @@ void *UE_thread(void *arg) {
if (tmp->proc.decoded_frame_rx != -1)
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | tmp->proc.decoded_frame_rx);
//decoded_frame_rx=tmp->proc.decoded_frame_rx;
else
decoded_frame_rx=-1;
pushNotifiedFIFO_nothreadSafe(&freeBlocks,res);
}
if ( (decoded_frame_rx != curMsg->proc.frame_rx) &&
(((decoded_frame_rx+1) % MAX_FRAME_NUMBER) != curMsg->proc.frame_rx) &&
(((decoded_frame_rx+2) % MAX_FRAME_NUMBER) != curMsg->proc.frame_rx))
if ( decoded_frame_rx>0 && decoded_frame_rx != curMsg->proc.frame_rx)
LOG_E(PHY,"Decoded frame index (%d) is not compatible with current context (%d), UE should go back to synch mode\n",
decoded_frame_rx, curMsg->proc.frame_rx );
......@@ -781,7 +780,7 @@ void *UE_thread(void *arg) {
msgToPush->key=slot_nr;
pushTpool(&(get_nrUE_params()->Tpool), msgToPush);
if (IS_SOFTMODEM_RFSIM || IS_SOFTMODEM_NOS1) { //getenv("RFSIMULATOR")
if ( IS_SOFTMODEM_RFSIM || IS_SOFTMODEM_NOS1) { //getenv("RFSIMULATOR")
// FixMe: Wait previous thread is done, because race conditions seems too bad
// in case of actual RF board, the overlap between threads mitigate the issue
// We must receive one message, that proves the slot processing is done
......@@ -791,6 +790,8 @@ void *UE_thread(void *arg) {
if (tmp->proc.decoded_frame_rx != -1)
decoded_frame_rx=(((mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused)<<4) | tmp->proc.decoded_frame_rx);
else
decoded_frame_rx=-1;
//decoded_frame_rx=tmp->proc.decoded_frame_rx;
pushNotifiedFIFO_nothreadSafe(&freeBlocks,res);
......
......@@ -513,6 +513,9 @@ int main( int argc, char **argv ) {
if (get_softmodem_params()->do_ra)
AssertFatal(get_softmodem_params()->phy_test == 0,"RA and phy_test are mutually exclusive\n");
if (get_softmodem_params()->sa)
AssertFatal(get_softmodem_params()->phy_test == 0,"Standalone mode and phy_test are mutually exclusive\n");
for (int CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
......
......@@ -56,6 +56,7 @@ extern "C"
#define CONFIG_HLP_UELOOP "get softmodem (UE) to loop through memory instead of acquiring from HW\n"
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
#define CONFIG_HLP_DORA "test gNB and UE with RA procedures\n"
#define CONFIG_HLP_SA "run gNB in standalone mode\n"
#define CONFIG_HLP_EXTS "tells hardware to use an external timing reference\n"
#define CONFIG_HLP_DMRSSYNC "tells RU to insert DMRS in subframe 1 slot 0"
#define CONFIG_HLP_CLK "tells hardware to use a clock reference (0:internal, 1:external, 2:gpsdo)\n"
......@@ -100,6 +101,7 @@ extern "C"
#define TP_CONFIG softmodem_params.threadPoolConfig
#define PHY_TEST softmodem_params.phy_test
#define DO_RA softmodem_params.do_ra
#define SA softmodem_params.sa
#define WAIT_FOR_SYNC softmodem_params.wait_for_sync
#define SINGLE_THREAD_FLAG softmodem_params.single_thread_flag
#define CHAIN_OFFSET softmodem_params.chain_offset
......@@ -119,6 +121,7 @@ extern "C"
{"thread-pool", CONFIG_HLP_TPOOL, 0, strptr:(char **)&TP_CONFIG, defstrval:"n", TYPE_STRING, sizeof(TP_CONFIG)}, \
{"phy-test", CONFIG_HLP_PHYTST, PARAMFLAG_BOOL, iptr:&PHY_TEST, defintval:0, TYPE_INT, 0}, \
{"do-ra", CONFIG_HLP_DORA, PARAMFLAG_BOOL, iptr:&DO_RA, defintval:0, TYPE_INT, 0}, \
{"sa", CONFIG_HLP_SA, PARAMFLAG_BOOL, iptr:&SA, defintval:0, TYPE_INT, 0}, \
{"usim-test", CONFIG_HLP_USIM, PARAMFLAG_BOOL, u8ptr:&USIM_TEST, defintval:0, TYPE_UINT8, 0}, \
{"clock-source", CONFIG_HLP_CLK, 0, uptr:&CLOCK_SOURCE, defintval:0, TYPE_UINT, 0}, \
{"time-source", CONFIG_HLP_TME, 0, uptr:&TIMING_SOURCE, defintval:0, TYPE_UINT, 0}, \
......@@ -213,6 +216,7 @@ typedef struct {
char threadPoolConfig[1024];
int phy_test;
int do_ra;
int sa;
uint8_t usim_test;
int emulate_rf;
int wait_for_sync; //eNodeB only
......
......@@ -44,7 +44,7 @@
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH 0x03
#define FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH 0x04
#define FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
......
......@@ -30,6 +30,7 @@
* \warning
*/
#include <LAYER2/NR_MAC_gNB/nr_mac_gNB.h>
#include "nr_dci.h"
#include "nr_dlsch.h"
#include "nr_sch_dmrs.h"
......@@ -81,17 +82,13 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
int rb_offset;
int n_rb;
// compute rb_offset and n_prb based on frequency allocation
nr_fill_cce_list(gNB,0,pdcch_pdu_rel15);
get_coreset_rballoc(pdcch_pdu_rel15->FreqDomainResource,&n_rb,&rb_offset);
// compute rb_offset and n_prb based on frequency allocation
cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
if (pdcch_pdu_rel15->CoreSetType == NFAPI_NR_CSET_CONFIG_MIB_SIB1) {
cset_start_sc = frame_parms.first_carrier_offset +
(frame_parms.ssb_start_subcarrier/NR_NB_SC_PER_RB + rb_offset)*NR_NB_SC_PER_RB;
} else
cset_start_sc = frame_parms.first_carrier_offset + rb_offset*NR_NB_SC_PER_RB;
cset_start_sc = cset_start_sc + RC.nrmac[gNB->Mod_id]->type0_PDCCH_CSS_config.cset_start_rb*NR_NB_SC_PER_RB;
}
for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++) {
/*The coreset is initialised
......@@ -105,8 +102,6 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
LOG_D(PHY, "Coreset rb_offset %d, nb_rb %d\n",rb_offset,n_rb);
LOG_D(PHY, "Coreset starting subcarrier %d on symbol %d (%d symbols)\n", cset_start_sc, cset_start_symb, cset_nsymb);
// DMRS length is per OFDM symbol
AssertFatal(pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED,
"Interleaved CCE REG MAPPING not supported\n");
uint32_t dmrs_length = (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED)?
(n_rb*6) : (pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*36/cset_nsymb); //2(QPSK)*3(per RB)*6(REG per CCE)
uint32_t encoded_length = pdcch_pdu_rel15->dci_pdu.AggregationLevel[d]*108; //2(QPSK)*9(per RB)*6(REG per CCE)
......@@ -198,7 +193,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
for (int m=0; m<NR_NB_SC_PER_RB; m++) {
if ( m == (k_prime<<2)+1) { // DMRS if not already mapped
if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
//if (pdcch_pdu_rel15->CceRegMappingType == NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED) {
((int16_t *)txdataF)[(l*frame_parms.ofdm_symbol_size + k)<<1] = (amp * mod_dmrs[l][dmrs_idx<<1]) >> 15;
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (amp * mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_PDCCH_DMRS
......@@ -206,7 +201,7 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
((int16_t *)txdataF)[((l*frame_parms.ofdm_symbol_size + k)<<1)+1]);
#endif
dmrs_idx++;
}
//}
k_prime++;
} else { // DCI payload
......@@ -225,7 +220,10 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
k -= frame_parms.ofdm_symbol_size;
} // m
} // reg_idx
LOG_I(PHY, "DCI: payloadSize = %d | payload = %llx\n",
*pdcch_pdu_rel15->dci_pdu.PayloadSizeBits,*(unsigned long long*)pdcch_pdu_rel15->dci_pdu.Payload);
} // for (int d=0;d<pdcch_pdu_rel15->numDlDci;d++)
}
......
......@@ -289,7 +289,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
/// Resource mapping
// Non interleaved VRB to PRB mapping
uint16_t start_sc = frame_parms->first_carrier_offset + rel15->rbStart*NR_NB_SC_PER_RB;
uint16_t start_sc = frame_parms->first_carrier_offset + (rel15->rbStart+rel15->BWPStart)*NR_NB_SC_PER_RB;
if (start_sc >= frame_parms->ofdm_symbol_size)
start_sc -= frame_parms->ofdm_symbol_size;
......
......@@ -653,6 +653,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short BWPStart,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch)
{
......@@ -686,7 +687,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
#endif
// generate pilot for gNB port number 1000+p
uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12;
uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12 - BWPStart;
uint8_t config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
int8_t delta = get_delta(p, config_type);
nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][symbol][0], &pilot[0],1000,0,nb_rb_pdsch+rb_offset);
......
......@@ -73,6 +73,7 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
unsigned char Ns,
unsigned short p,
unsigned char symbol,
unsigned short BWPStart,
unsigned short bwp_start_subcarrier,
unsigned short nb_rb_pdsch);
......
......@@ -36,6 +36,8 @@
#include <string.h>
#endif
#include <LAYER2/NR_MAC_UE/mac_defs.h>
#include <LAYER2/NR_MAC_UE/mac_proto.h>
#include "executables/softmodem-common.h"
#include "nr_transport_proto_ue.h"
......@@ -371,7 +373,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
LOG_DDD("n_BWP_start=%d, coreset_nbr_rb=%d\n",n_BWP_start,coreset_nbr_rb);
int c_rb_by6;
c_rb = n_BWP_start;
c_rb = 0;
for (int rb=0;rb<coreset_nbr_rb;rb++,c_rb++) {
c_rb_by6 = c_rb/6;
// skip zeros in frequency domain bitmap
......@@ -386,7 +388,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
// first we set initial conditions for pointer to rxdataF depending on the situation of the first RB within the CORESET (c_rb = n_BWP_start)
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): even case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
LOG_DDD("in even case c_rb (%d) is lower than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
}
......@@ -394,7 +396,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
if ((c_rb >= (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) == 0)) {
// number of RBs is even and c_rb is higher than half system bandwidth (we don't skip DC)
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
LOG_DDD("in even case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size))));
//rxF = &rxdataF[aarx][(1 + 12*(c_rb - (frame_parms->N_RB_DL>>1)) + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
......@@ -406,7 +408,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
if ((c_rb < (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
//if RB to be treated is lower than middle system bandwidth then rxdataF pointed at (offset + c_br + symbol * ofdm_symbol_size): odd case
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
#ifdef NR_PDCCH_DCI_DEBUG
LOG_D(PHY,"in odd case c_rb (%d) is lower or equal than half N_RB_DL -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
......@@ -416,7 +418,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
if ((c_rb > (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) {
// number of RBs is odd and c_rb is higher than half system bandwidth + 1
// if these conditions are true the pointer has to be situated at the 1st part of the rxdataF just after the first IQ symbols of the RB containing DC
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))]; // we point at the 1st part of the rxdataF in symbol
rxF = &rxdataF[aarx][(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12]; // we point at the 1st part of the rxdataF in symbol
#ifdef NR_PDCCH_DCI_DEBUG
LOG_D(PHY,"in odd case c_rb (%d) is higher than half N_RB_DL (not DC) -> rxF = &rxdataF[aarx = (%d)][(12*(c_rb - frame_parms->N_RB_DL) - 5 + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(12*(c_rb - (frame_parms->N_RB_DL>>1)) - 6 + (symbol * (frame_parms->ofdm_symbol_size))));
......@@ -426,7 +428,7 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
if ((c_rb == (frame_parms->N_RB_DL >> 1)) && ((frame_parms->N_RB_DL & 1) != 0)) { // treatment of RB containing the DC
// if odd number RBs in system bandwidth and first RB to be treated is higher than middle system bandwidth (around DC)
// we have to treat the RB in two parts: first part from i=0 to 5, the data is at the end of rxdataF (pointing at the end of the table)
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))];
rxF = &rxdataF[aarx][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size)))+n_BWP_start*12];
#ifdef NR_PDCCH_DCI_DEBUG
LOG_D(PHY,"in odd case c_rb (%d) is half N_RB_DL + 1 we treat DC case -> rxF = &rxdataF[aarx = (%d)][(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))) = (%d)]\n",
c_rb,aarx,(frame_parms->first_carrier_offset + 12 * c_rb + (symbol * (frame_parms->ofdm_symbol_size))));
......@@ -887,7 +889,8 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
n_rnti = rel15->rnti;
if (crc == n_rnti) {
LOG_D(PHY,"Decoded crc %x matches rnti %x for DCI format %d\n", crc, n_rnti, rel15->dci_format_options[k]);
LOG_I(PHY, "(%i.%i) Received dci indication (rnti %x,dci format %d,n_CCE %d,payloadSize %d,payload %llx)\n",
proc->frame_rx, proc->nr_slot_rx,n_rnti,rel15->dci_format_options[k],CCEind,dci_length,*(unsigned long long*)dci_estimation);
dci_ind->SFN = proc->frame_rx;
dci_ind->slot = proc->nr_slot_rx;
dci_ind->dci_list[dci_ind->number_of_dcis].rnti = n_rnti;
......@@ -898,7 +901,7 @@ uint8_t nr_dci_decoding_procedure(PHY_VARS_NR_UE *ue,
dci_ind->number_of_dcis++;
break; // If DCI is found, no need to check for remaining DCI lengths
} else {
LOG_D(PHY,"Decoded crc %x does not match rnti %x for DCI format %d\n", crc, n_rnti, rel15->dci_format_options[k]);
LOG_D(PHY,"(%i.%i) Decoded crc %x does not match rnti %x for DCI format %d\n", proc->frame_rx, proc->nr_slot_rx, crc, n_rnti, rel15->dci_format_options[k]);
}
}
}
......
......@@ -577,16 +577,17 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
// Fixme: correct type is unsigned, but nrLDPC_decoder and all called behind use signed int
if (check_crc((uint8_t*)llrProcBuf,length_dec,harq_process->F,crc_type)) {
LOG_D(PHY,"Segment %u CRC OK\n\033[0m",r);
if (r==0)
for (int i=0;i<10;i++) LOG_D(PHY,"byte %d : %x\n",i,((uint8_t*)llrProcBuf)[i]);
LOG_I(PHY,"Segment %u CRC OK\n\033[0m",r);
if (r==0) {
for (int i=0;i<10;i++) LOG_D(PHY,"byte %d : %x\n",i,((uint8_t*)llrProcBuf)[i]);
}
//Temporary hack
no_iteration_ldpc = dlsch->max_ldpc_iterations;
ret = no_iteration_ldpc;
}
else {
LOG_I(PHY,"CRC NOK\n\033[0m");
LOG_D(PHY,"CRC NOT OK\n\033[0m");
ret = 1 + dlsch->max_ldpc_iterations;
}
......
......@@ -404,7 +404,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
symbol,
pilots,
config_type,
start_rb,
start_rb + dlsch0_harq->BWPStart,
nb_rb_pdsch,
nr_slot_rx,
ue->high_speed_flag,
......@@ -422,7 +422,7 @@ int nr_rx_pdsch(PHY_VARS_NR_UE *ue,
}
len = (pilots==1)? ((config_type==pdsch_dmrs_type1)?nb_rb*(12-6*dlsch0_harq->n_dmrs_cdm_groups): nb_rb*(12-4*dlsch0_harq->n_dmrs_cdm_groups)):(nb_rb*12);
#if UE_TIMING_TRACE
stop_meas(&ue->generic_stat_bis[proc->thread_id][slot]);
#if DISABLE_LOG_X
......@@ -1621,6 +1621,8 @@ void nr_dlsch_channel_level(int **dl_ch_estimates_ext,
int16_t y = (len)>>x;
//printf("len = %d = %d * 2^(%d)\n",len,y,x);
AssertFatal(y!=0,"Cannot divide by zero: in function %s of file %s\n", __func__, __FILE__);
for (aatx=0; aatx<frame_parms->nb_antenna_ports_gNB; aatx++)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
......
This diff is collapsed.
......@@ -104,6 +104,7 @@
#define NR_MAX_PDSCH_ENCODED_LENGTH NR_MAX_NB_RB*NR_SYMBOLS_PER_SLOT*NR_NB_SC_PER_RB*8*NR_MAX_NB_LAYERS // 8 is the maximum modulation order (it was 950984 before !!)
#define NR_MAX_PUSCH_ENCODED_LENGTH NR_MAX_PDSCH_ENCODED_LENGTH
#define NR_MAX_PDSCH_TBS 3824
#define NR_MAX_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits.
#define MAX_NUM_NR_DLSCH_SEGMENTS 34
#define MAX_NR_DLSCH_PAYLOAD_BYTES (MAX_NUM_NR_DLSCH_SEGMENTS*1056)
......
......@@ -84,6 +84,11 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
LOG_D(PHY,"FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH\n");
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_ra[0];
}
else if (dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH){
dlsch0 = PHY_vars_UE_g[module_id][cc_id]->dlsch_SI[0];
dlsch0->rnti_type = _SI_RNTI_;
dlsch0->harq_processes[dlsch0->current_harq_pid]->status = ACTIVE;
}
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
uint8_t current_harq_pid = dlsch_config_pdu->harq_process_nbr;
......
......@@ -32,6 +32,7 @@
#define _GNU_SOURCE
#include "nr/nr_common.h"
#include "assertions.h"
#include "defs.h"
#include "PHY/defs_nr_UE.h"
......@@ -729,12 +730,12 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
if (!dlsch1) {
int harq_pid = dlsch0->current_harq_pid;
uint16_t BWPStart = dlsch0->harq_processes[harq_pid]->BWPStart;
// uint16_t BWPSize = dlsch0->harq_processes[harq_pid]->BWPSize;
uint16_t pdsch_start_rb = dlsch0->harq_processes[harq_pid]->start_rb;
uint16_t pdsch_nb_rb = dlsch0->harq_processes[harq_pid]->nb_rb;
uint16_t s0 = dlsch0->harq_processes[harq_pid]->start_symbol;
uint16_t s1 = dlsch0->harq_processes[harq_pid]->nb_symbols;
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch0->harq_processes[harq_pid];
uint16_t BWPStart = dlsch0_harq->BWPStart;
uint16_t pdsch_start_rb = dlsch0_harq->start_rb;
uint16_t pdsch_nb_rb = dlsch0_harq->nb_rb;
uint16_t s0 = dlsch0_harq->start_symbol;
uint16_t s1 = dlsch0_harq->nb_symbols;
LOG_D(PHY,"[UE %d] PDSCH type %d active in nr_slot_rx %d, harq_pid %d (%d), rb_start %d, nb_rb %d, symbol_start %d, nb_symbols %d, DMRS mask %x\n",ue->Mod_id,pdsch,nr_slot_rx,harq_pid,dlsch0->harq_processes[harq_pid]->status,pdsch_start_rb,pdsch_nb_rb,s0,s1,dlsch0->harq_processes[harq_pid]->dlDmrsSymbPos);
......@@ -747,6 +748,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
nr_slot_rx,
aatx /*p*/,
m,
BWPStart,
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
pdsch_nb_rb);
LOG_D(PHY,"PDSCH Channel estimation gNB id %d, PDSCH antenna port %d, slot %d, symbol %d\n",0,aatx,nr_slot_rx,m);
......@@ -765,16 +767,29 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
break;
}
}
uint16_t first_symbol_with_data = s0;
uint32_t dmrs_data_re;
if (ue->dmrs_DownlinkConfig.pdsch_dmrs_type == pdsch_dmrs_type1)
dmrs_data_re = 12 - 6 * dlsch0_harq->n_dmrs_cdm_groups;
else
dmrs_data_re = 12 - 4 * dlsch0_harq->n_dmrs_cdm_groups;
while ((dmrs_data_re == 0) && (dlsch0_harq->dlDmrsSymbPos & (1 << first_symbol_with_data))) {
first_symbol_with_data++;
}
for (m = s0; m < (s1 + s0); m++) {
dual_stream_UE = 0;
eNB_id_i = eNB_id+1;
i_mod = 0;
if ((m==s0) && (m<3))
first_symbol_flag = 1;
if (( m==first_symbol_with_data ) && (m<4))
first_symbol_flag = 1;
else
first_symbol_flag = 0;
first_symbol_flag = 0;
#if UE_TIMING_TRACE
uint8_t slot = 0;
if(m >= ue->frame_parms.symbols_per_slot>>1)
......@@ -784,7 +799,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
// process DLSCH received in first slot
// skip DMRS symbols (will have to check later if PDSCH/DMRS are multiplexed
if (((1<<m)&dlsch0->harq_processes[harq_pid]->dlDmrsSymbPos) == 0) {
if (nr_rx_pdsch(ue,
if (nr_rx_pdsch(ue,
proc,
pdsch,
eNB_id,
......@@ -797,10 +812,10 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
i_mod,
dlsch0->current_harq_pid) < 0)
return -1;
}
}
else { // This is to adjust the llr offset in the case of skipping over a dmrs symbol (i.e. in case of no PDSCH REs in DMRS)
if (pdsch == RA_PDSCH) ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]=ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m-1];
else if (pdsch == PDSCH) {
if (pdsch == RA_PDSCH) ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]=ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m-1];
else if (pdsch == PDSCH || pdsch == SI_PDSCH) {
if (nr_rx_pdsch(ue,
proc,
pdsch,
......@@ -815,7 +830,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int eNB_
dlsch0->current_harq_pid) < 0)
return -1;
}
else AssertFatal(1==0,"not RA_PDSCH or PDSCH\n");
else AssertFatal(1==0,"Not RA_PDSCH, SI_PDSCH or PDSCH\n");
}
if (pdsch == PDSCH) LOG_D(PHY,"Done processing symbol %d : llr_offset %d\n",m,ue->pdsch_vars[proc->thread_id][eNB_id]->llr_offset[m]);
#if UE_TIMING_TRACE
......@@ -1219,6 +1234,9 @@ void nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
case PDSCH:
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
case SI_PDSCH:
rx_ind.rx_indication_body[0].pdu_type = FAPI_NR_RX_PDU_TYPE_SIB;
break;
default:
break;
}
......@@ -1809,29 +1827,30 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
0,
0);
dci_cnt = 0;
for(int n_ss = 0; n_ss<pdcch_vars->nb_search_space; n_ss++) {
// note: this only works if RBs for PDCCH are contigous!
LOG_D(PHY,"pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n",
fp->first_carrier_offset,pdcch_vars->pdcch_config[0].BWPStart,coreset_start_rb);
LOG_D(PHY, "pdcch_channel_estimation: first_carrier_offset %d, BWPStart %d, coreset_start_rb %d\n",
fp->first_carrier_offset, pdcch_vars->pdcch_config[n_ss].BWPStart, coreset_start_rb);
if (coreset_nb_rb > 0)
nr_pdcch_channel_estimation(ue,
proc,
0,
nr_slot_rx,
l,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[0].BWPStart + coreset_start_rb)*12,
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
coreset_nb_rb);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_OUT);
#if UE_TIMING_TRACE
stop_meas(&ue->ofdm_demod_stats);
#endif
//printf("phy procedure pdcch start measurement l =%d\n",l);
//nr_ue_measurement_procedures(l,ue,proc,gNB_id,(nr_slot_rx),mode);
}
dci_cnt = nr_ue_pdcch_procedures(gNB_id, ue, proc);
dci_cnt = dci_cnt + nr_ue_pdcch_procedures(gNB_id, ue, proc);
}
}
if (dci_cnt > 0) {
......@@ -1840,6 +1859,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch = NULL;
if (ue->dlsch[proc->thread_id][gNB_id][0]->active == 1){
dlsch = ue->dlsch[proc->thread_id][gNB_id][0];
} else if (ue->dlsch_SI[0]->active == 1){
dlsch = ue->dlsch_SI[0];
} else if (ue->dlsch_ra[0]->active == 1){
dlsch = ue->dlsch_ra[0];
}
......
......@@ -447,7 +447,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
return (FALSE);
}
int max_code_rate = 0;
//int max_code_rate = 0;
//int Q_m = BITS_PER_SYMBOL_QPSK; /* default pucch modulation type is QPSK with 2 bits per symbol */
int N_sc_ctrl_RB = 0;
int O_CRC = 0;
......@@ -504,7 +504,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if (format != pucch_format0_nr) {
if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1 != NULL) {
max_code_rate = code_rate_r_time_100[mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1->choice.setup->maxCodeRate[0]]; /* it is code rate * 10 */
//max_code_rate = code_rate_r_time_100[mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1->choice.setup->maxCodeRate[0]]; /* it is code rate * 10 */
if ((O_ACK != 0) && (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format1->choice.setup->simultaneousHARQ_ACK_CSI[0] == 0)) {
N_UCI = N_UCI - O_CSI;
......
......@@ -146,6 +146,10 @@ int is_x2ap_enabled(void)
return 0;
}
int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len) {
return 0;
}
// needed for some functions
openair0_config_t openair0_cfg[MAX_CARDS];
void update_ptrs_config(NR_CellGroupConfig_t *secondaryCellGroup, uint16_t *rbSize, uint8_t *mcsIndex,int8_t *ptrs_arg);
......@@ -526,7 +530,7 @@ int main(int argc, char **argv)
break;
}
}
logInit();
set_glog(loglvl);
T_stdout = 1;
......@@ -756,16 +760,16 @@ int main(int argc, char **argv)
nr_l2_init_ue(NULL);
UE_mac = get_mac_inst(0);
UE->if_inst = nr_ue_if_module_init(0);
UE->if_inst->scheduled_response = nr_ue_scheduled_response;
UE->if_inst->phy_config_request = nr_ue_phy_config_request;
UE->if_inst->dl_indication = nr_ue_dl_indication;
UE->if_inst->ul_indication = dummy_nr_ue_ul_indication;
UE_mac->if_module = nr_ue_if_module_init(0);
unsigned int available_bits=0;
unsigned char *estimated_output_bit;
unsigned char *test_input_bit;
......@@ -823,7 +827,7 @@ int main(int argc, char **argv)
reset_meas(&gNB->tinput);
reset_meas(&gNB->tprep);
reset_meas(&gNB->tparity);
reset_meas(&gNB->toutput);
reset_meas(&gNB->toutput);
clear_pdsch_stats(gNB);
......@@ -922,7 +926,7 @@ int main(int argc, char **argv)
}
int tx_offset = frame_parms->get_samples_slot_timestamp(slot,frame_parms,0);
if (n_trials==1) printf("tx_offset %d, txdataF_offset %d \n", tx_offset,txdataF_offset);
//TODO: loop over slots
for (aa=0; aa<gNB->frame_parms.nb_antennas_tx; aa++) {
......@@ -984,7 +988,7 @@ int main(int argc, char **argv)
}
}
}
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
nr_ue_scheduled_response(&scheduled_response);
......@@ -997,7 +1001,7 @@ int main(int argc, char **argv)
//printf("dlsim round %d ends\n",round);
round++;
} // round
//----------------------------------------------------------
//---------------------- count errors ----------------------
//----------------------------------------------------------
......@@ -1036,7 +1040,7 @@ int main(int argc, char **argv)
}
for (i = 0; i < TBS; i++) {
estimated_output_bit[i] = (UE_harq_process->b[i/8] & (1 << (i & 7))) >> (i & 7);
test_input_bit[i] = (gNB_dlsch->harq_processes[harq_pid]->b[i / 8] & (1 << (i & 7))) >> (i & 7); // Further correct for multiple segments
......
......@@ -107,6 +107,10 @@ int is_x2ap_enabled(void)
return 0;
}
int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len) {
return 0;
}
int main(int argc, char **argv){
char c;
......
......@@ -126,6 +126,10 @@ int is_x2ap_enabled(void)
return 0;
}
int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len) {
return 0;
}
// needed for some functions
uint16_t n_rnti = 0x1234;
openair0_config_t openair0_cfg[MAX_CARDS];
......
......@@ -399,8 +399,8 @@ typedef struct NbIoTRrcConfigurationReq_s {
// gNB: GNB_APP -> RRC messages
typedef struct NRRrcConfigurationReq_s {
uint32_t cell_identity;
uint16_t tac;
uint64_t cell_identity;
uint32_t tac;
uint16_t mcc[PLMN_LIST_MAX_SIZE];
uint16_t mnc[PLMN_LIST_MAX_SIZE];
uint8_t mnc_digit_length[PLMN_LIST_MAX_SIZE];
......
......@@ -39,6 +39,7 @@
/* cell configuration section name */
#define GNB_CONFIG_STRING_GNB_LIST "gNBs"
#define GNB_CONFIG_STRING_PDCCH_CONFIGSIB1 "pdcch_ConfigSIB1"
#define GNB_CONFIG_STRING_SERVINGCELLCONFIGCOMMON "servingCellConfigCommon"
#define GNB_CONFIG_STRING_PHYSCELLID "physCellId"
#define GNB_CONFIG_STRING_NTIMINGADVANCEOFFSET "n_TimingAdvanceOffset"
......@@ -210,6 +211,21 @@
#define CARRIERBANDWIDTH_OKVALUES {11,18,24,25,31,32,38,51,52,65,66,78,79,93,106,107,121,132,133,135,160,162,189,216,217,245,264,270,273}
/*--------------------------------------------------------------------------------------------------------------------*/
/* pdcch_ConfigSIB1 parameters */
/*--------------------------------------------------------------------------------------------------------------------*/
#define CONTROL_RESOURCE_SET_ZERO "controlResourceSetZero"
#define SEARCH_SPACE_ZERO "searchSpaceZero"
#define PDCCH_CONFIGSIB1PARAMS_DESC(pdcch_ConfigSIB1) { \
{CONTROL_RESOURCE_SET_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->controlResourceSetZero, defintval:0, TYPE_INT64, 0}, \
{SEARCH_SPACE_ZERO, NULL, 0, i64ptr:&pdcch_ConfigSIB1->searchSpaceZero, defintval:0, TYPE_INT64, 0} \
}
#define CONTROL_RESOURCE_SET_ZERO_IDX 0
#define SEARCH_SPACE_ZERO_IDX 1
/*--------------------------------------------------------------------------------------------------------------------*/
/*-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* Serving Cell Config Common configuration parameters */
/* optname helpstr paramflags XXXptr defXXXval type numelt */
......
......@@ -574,6 +574,17 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
gnb_id = *(GNBParamList.paramarray[i][GNB_GNB_ID_IDX].uptr);
}
// pdcch_ConfigSIB1
rrc->carrier.pdcch_ConfigSIB1 = calloc(1,sizeof(NR_PDCCH_ConfigSIB1_t));
paramdef_t pdcch_ConfigSIB1[] = PDCCH_CONFIGSIB1PARAMS_DESC(rrc->carrier.pdcch_ConfigSIB1);
paramlist_def_t pdcch_ConfigSIB1ParamList = {GNB_CONFIG_STRING_PDCCH_CONFIGSIB1, NULL, 0};
sprintf(aprefix, "%s.[%i]", GNB_CONFIG_STRING_GNB_LIST, 0);
config_getlist(&pdcch_ConfigSIB1ParamList, NULL, 0, aprefix);
if (pdcch_ConfigSIB1ParamList.numelt > 0) {
sprintf(aprefix, "%s.[%i].%s.[%i]", GNB_CONFIG_STRING_GNB_LIST,0,GNB_CONFIG_STRING_PDCCH_CONFIGSIB1, 0);
config_get(pdcch_ConfigSIB1,sizeof(pdcch_ConfigSIB1)/sizeof(paramdef_t),aprefix);
}
sprintf(aprefix, "%s.[%i]", GNB_CONFIG_STRING_GNB_LIST, 0);
config_getlist(&SCCsParamList, NULL, 0, aprefix);
......@@ -1009,7 +1020,7 @@ void NRRCConfig(void) {
paramdef_t GNBSParams[] = GNBSPARAMS_DESC;
/* get global parameters, defined outside any section in the config file */
LOG_I(GNB_APP, "Getting GNBSParams\n");
config_get( GNBSParams,sizeof(GNBSParams)/sizeof(paramdef_t),NULL);
......
......@@ -78,7 +78,6 @@ typedef enum {
#define GNB_CONFIG_STRING_ASN1_VERBOSITY_NONE "none"
#define GNB_CONFIG_STRING_ASN1_VERBOSITY_ANNOYING "annoying"
#define GNB_CONFIG_STRING_ASN1_VERBOSITY_INFO "info"
/* global parameters, not under a specific section */
#define GNB_CONFIG_STRING_ASN1_VERBOSITY "Asn1_verbosity"
......
......@@ -32,9 +32,24 @@
#ifndef __LAYER2_NR_MAC_COMMON_H__
#define __LAYER2_NR_MAC_COMMON_H__
#include "NR_MIB.h"
#include "NR_PDSCH-Config.h"
#include "NR_CellGroupConfig.h"
#include "nr_mac.h"
#include "openair1/PHY/impl_defs_nr.h"
#define TABLE_38213_13_1_NUM_INDEXES 15
#define TABLE_38213_13_2_NUM_INDEXES 14
#define TABLE_38213_13_3_NUM_INDEXES 9
#define TABLE_38213_13_4_NUM_INDEXES 16
#define TABLE_38213_13_5_NUM_INDEXES 9
#define TABLE_38213_13_6_NUM_INDEXES 10
#define TABLE_38213_13_7_NUM_INDEXES 12
#define TABLE_38213_13_8_NUM_INDEXES 8
#define TABLE_38213_13_9_NUM_INDEXES 4
#define TABLE_38213_13_10_NUM_INDEXES 8
#define TABLE_38213_13_11_NUM_INDEXES 16
#define TABLE_38213_13_12_NUM_INDEXES 14
// ===============================================
......@@ -45,8 +60,8 @@
#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
typedef enum frequency_range_e {
FR1 = 0,
FR2
FR1 = 0,
FR2
} frequency_range_t;
// PRACH occasion details
......@@ -99,6 +114,52 @@ typedef enum {
NR_RNTI_MCS_C,
} nr_rnti_type_t;
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef enum nr_ssb_and_cset_mux_pattern_type_e {
NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=1,
NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
} nr_ssb_and_cset_mux_pattern_type_t;
typedef enum {
SFN_C_MOD_2_EQ_0,
SFN_C_MOD_2_EQ_1,
SFN_C_IMPOSSIBLE
} SFN_C_TYPE;
typedef struct Type0_PDCCH_CSS_config_s {
int32_t num_rbs;
int32_t num_symbols;
int32_t rb_offset; // Offset from SSB RB0
uint32_t type0_pdcch_ss_mux_pattern;
uint16_t frame;
SFN_C_TYPE sfn_c;
uint32_t n_c;
uint32_t n_0;
uint32_t number_of_search_space_per_slot;
uint32_t first_symbol_index;
uint32_t search_space_duration;
uint32_t ssb_length;
uint32_t ssb_index;
uint32_t cset_start_rb;
} NR_Type0_PDCCH_CSS_config_t;
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
void get_frame_type(uint16_t nr_bandP, uint8_t scs_index, lte_frame_type_t *current_type);
......@@ -188,6 +249,13 @@ int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmr
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
int get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
NR_MIB_t *mib,
uint8_t extra_bits,
uint32_t ssb_length,
uint32_t ssb_index,
uint32_t ssb_offset_point_a);
int16_t get_N_RA_RB (int delta_f_RA_PRACH,int delta_f_PUSCH);
bool set_dl_ptrs_values(NR_PTRS_DownlinkConfig_t *ptrs_config,
......
......@@ -77,5 +77,66 @@ extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX];
extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif*/
// Type0-PDCCH search space
extern const int32_t table_38213_13_1_c1[16];
extern const int32_t table_38213_13_1_c2[16];
extern const int32_t table_38213_13_1_c3[16];
extern const int32_t table_38213_13_1_c4[16];
extern const int32_t table_38213_13_2_c1[16];
extern const int32_t table_38213_13_2_c2[16];
extern const int32_t table_38213_13_2_c3[16];
extern const int32_t table_38213_13_2_c4[16];
extern const int32_t table_38213_13_3_c1[16];
extern const int32_t table_38213_13_3_c2[16];
extern const int32_t table_38213_13_3_c3[16];
extern const int32_t table_38213_13_3_c4[16];
extern const int32_t table_38213_13_4_c1[16];
extern const int32_t table_38213_13_4_c2[16];
extern const int32_t table_38213_13_4_c3[16];
extern const int32_t table_38213_13_4_c4[16];
extern const int32_t table_38213_13_5_c1[16];
extern const int32_t table_38213_13_5_c2[16];
extern const int32_t table_38213_13_5_c3[16];
extern const int32_t table_38213_13_5_c4[16];
extern const int32_t table_38213_13_6_c1[16];
extern const int32_t table_38213_13_6_c2[16];
extern const int32_t table_38213_13_6_c3[16];
extern const int32_t table_38213_13_6_c4[16];
extern const int32_t table_38213_13_7_c1[16];
extern const int32_t table_38213_13_7_c2[16];
extern const int32_t table_38213_13_7_c3[16];
extern const int32_t table_38213_13_7_c4[16];
extern const int32_t table_38213_13_8_c1[16];
extern const int32_t table_38213_13_8_c2[16];
extern const int32_t table_38213_13_8_c3[16];
extern const int32_t table_38213_13_8_c4[16];
extern const int32_t table_38213_13_9_c1[16];
extern const int32_t table_38213_13_9_c2[16];
extern const int32_t table_38213_13_9_c3[16];
extern const int32_t table_38213_13_9_c4[16];
extern const int32_t table_38213_13_10_c1[16];
extern const int32_t table_38213_13_10_c2[16];
extern const int32_t table_38213_13_10_c3[16];
extern const int32_t table_38213_13_10_c4[16];
extern const float table_38213_13_11_c1[16];
extern const int32_t table_38213_13_11_c2[16];
extern const float table_38213_13_11_c3[16];
extern const int32_t table_38213_13_11_c4[16];
extern const float table_38213_13_12_c1[16];
extern const int32_t table_38213_13_12_c2[16];
extern const float table_38213_13_12_c3[16];
extern const int32_t table_38213_10_1_1_c2[5];
#endif //DEF_H
......@@ -390,13 +390,71 @@ void config_control_ue(NR_UE_MAC_INST_t *mac){
NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id];
AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(*css->controlResourceSetId == mac->coreset[bwp_id - 1][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(css->searchSpaceId != 0, "css->searchSpaceId is 0\n");
AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[0][0][ss_id] = css;
ss_id++;
}
// TODO: Merge this code in a single function as fill_default_searchSpaceZero() in rrc_gNB_reconfig.c
// Search space zero
if(mac->search_space_zero == NULL) mac->search_space_zero=calloc(1,sizeof(*mac->search_space_zero));
if(mac->search_space_zero->controlResourceSetId == NULL) mac->search_space_zero->controlResourceSetId=calloc(1,sizeof(*mac->search_space_zero->controlResourceSetId));
if(mac->search_space_zero->monitoringSymbolsWithinSlot == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot = calloc(1,sizeof(*mac->search_space_zero->monitoringSymbolsWithinSlot));
if(mac->search_space_zero->monitoringSymbolsWithinSlot->buf == NULL) mac->search_space_zero->monitoringSymbolsWithinSlot->buf = calloc(1,2);
if(mac->search_space_zero->nrofCandidates == NULL) mac->search_space_zero->nrofCandidates = calloc(1,sizeof(*mac->search_space_zero->nrofCandidates));
if(mac->search_space_zero->searchSpaceType == NULL) mac->search_space_zero->searchSpaceType = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType));
if(mac->search_space_zero->searchSpaceType->choice.common == NULL) mac->search_space_zero->searchSpaceType->choice.common=calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common));
if(mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*mac->search_space_zero->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
mac->search_space_zero->searchSpaceId = 0;
*mac->search_space_zero->controlResourceSetId = 0;
mac->search_space_zero->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*mac->search_space_zero->monitoringSlotPeriodicityAndOffset));
mac->search_space_zero->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
mac->search_space_zero->duration=NULL;
// should be '1100 0000 0000 00'B (LSB first!), first two symbols in slot, adjust if needed
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[1] = 0;
mac->search_space_zero->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6);
mac->search_space_zero->monitoringSymbolsWithinSlot->size = 2;
mac->search_space_zero->monitoringSymbolsWithinSlot->bits_unused = 2;
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
mac->search_space_zero->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
mac->search_space_zero->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1;
mac->search_space_zero->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
mac->search_space_zero->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
// Coreset0
if(mac->coreset0 == NULL) mac->coreset0 = calloc(1,sizeof(*mac->coreset0));
mac->coreset0->controlResourceSetId = 0;
// frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B,
if(mac->coreset0->frequencyDomainResources.buf == NULL) mac->coreset0->frequencyDomainResources.buf = calloc(1,6);
mac->coreset0->frequencyDomainResources.buf[0] = 0xff;
mac->coreset0->frequencyDomainResources.buf[1] = 0;
mac->coreset0->frequencyDomainResources.buf[2] = 0;
mac->coreset0->frequencyDomainResources.buf[3] = 0;
mac->coreset0->frequencyDomainResources.buf[4] = 0;
mac->coreset0->frequencyDomainResources.buf[5] = 0;
mac->coreset0->frequencyDomainResources.size = 6;
mac->coreset0->frequencyDomainResources.bits_unused = 3;
mac->coreset0->duration = 1;
mac->coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*mac->coreset0->cce_REG_MappingType.choice.interleaved));
mac->coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
mac->coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = NULL;
mac->coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
if(mac->coreset0->tci_StatesPDCCH_ToAddList == NULL) mac->coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*mac->coreset0->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8];
for (int i=0;i<8;i++) {
tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i;
ASN_SEQUENCE_ADD(&mac->coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]);
}
mac->coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
mac->coreset0->tci_PresentInDCI = NULL;
mac->coreset0->pdcch_DMRS_ScramblingID = NULL;
}
int nr_rrc_mac_config_req_ue(
......
......@@ -76,13 +76,6 @@
/*!\brief value for indicating BSR Timer is not running */
#define NR_MAC_UE_BSR_TIMER_NOT_RUNNING (0xFFFF)
typedef enum {
SFN_C_MOD_2_EQ_0,
SFN_C_MOD_2_EQ_1,
SFN_C_IMPOSSIBLE
} SFN_C_TYPE;
// LTE structure, might need to be adapted for NR
typedef struct {
/// buffer status for each lcgid
......@@ -267,6 +260,11 @@ typedef struct {
/// PHR
uint8_t PHR_reporting_active;
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config;
NR_SearchSpace_t *search_space_zero;
NR_ControlResourceSet_t *coreset0;
} NR_UE_MAC_INST_t;
typedef enum seach_space_mask_e {
......@@ -277,24 +275,6 @@ typedef enum seach_space_mask_e {
type3_pdcch = 0x10
} search_space_mask_t;
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef struct {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
......
......@@ -34,58 +34,6 @@
//extern NR_UE_MAC_INST_t *UE_mac_inst;
// Type0-PDCCH search space
extern const int32_t table_38213_13_1_c2[16];
extern const int32_t table_38213_13_1_c3[16];
extern const int32_t table_38213_13_1_c4[16];
extern const int32_t table_38213_13_2_c2[16];
extern const int32_t table_38213_13_2_c3[16];
extern const int32_t table_38213_13_2_c4[16];
extern const int32_t table_38213_13_3_c2[16];
extern const int32_t table_38213_13_3_c3[16];
extern const int32_t table_38213_13_3_c4[16];
extern const int32_t table_38213_13_4_c2[16];
extern const int32_t table_38213_13_4_c3[16];
extern const int32_t table_38213_13_4_c4[16];
extern const int32_t table_38213_13_5_c2[16];
extern const int32_t table_38213_13_5_c3[16];
extern const int32_t table_38213_13_5_c4[16];
extern const int32_t table_38213_13_6_c2[16];
extern const int32_t table_38213_13_6_c3[16];
extern const int32_t table_38213_13_6_c4[16];
extern const int32_t table_38213_13_7_c2[16];
extern const int32_t table_38213_13_7_c3[16];
extern const int32_t table_38213_13_7_c4[16];
extern const int32_t table_38213_13_8_c2[16];
extern const int32_t table_38213_13_8_c3[16];
extern const int32_t table_38213_13_8_c4[16];
extern const int32_t table_38213_13_9_c2[16];
extern const int32_t table_38213_13_9_c3[16];
extern const int32_t table_38213_13_9_c4[16];
extern const int32_t table_38213_13_10_c2[16];
extern const int32_t table_38213_13_10_c3[16];
extern const int32_t table_38213_13_10_c4[16];
extern const float table_38213_13_11_c1[16];
extern const int32_t table_38213_13_11_c2[16];
extern const float table_38213_13_11_c3[16];
extern const int32_t table_38213_13_11_c4[16];
extern const float table_38213_13_12_c1[16];
extern const int32_t table_38213_13_12_c2[16];
extern const float table_38213_13_12_c3[16];
extern const int32_t table_38213_10_1_1_c2[5];
// DCI extraction
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
extern uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3];
......
......@@ -58,6 +58,19 @@ int8_t nr_ue_decode_mib(
void *pduP,
uint16_t cell_id );
/**\brief decode sib1 pdu in NR_UE, from if_module dl_ind
\param module_id module id
\param cc_id component carrier id
\param gNB_index gNB index
\param sibs_mask sibs mask
\param pduP pointer to pdu
\param pdu_length length of pdu */
int8_t nr_ue_decode_sib1(module_id_t module_id,
int cc_id,
unsigned int gNB_index,
uint32_t sibs_mask,
uint8_t *pduP,
uint32_t pdu_len);
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
\param module_id module id
......@@ -125,8 +138,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
int nr_ue_process_dci_indication_pdu(module_id_t module_id, int cc_id, int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci);
uint32_t get_ssb_frame(uint32_t test);
uint32_t get_ssb_slot(uint32_t ssb_index);
uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
......
......@@ -32,64 +32,6 @@
#include "mac_defs.h"
#define reserved 0xffff
// specification mapping talbe, table_38$x_$y_$z_c$a
// - $x: specification
// - $y: subclause-major
// - $z: subclause-minor
// - $a: ($a)th of column in table, start from zero
const int32_t table_38213_13_1_c2[16] = {24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, 96, 96, 96, reserved}; // index 15 reserved
const int32_t table_38213_13_1_c3[16] = { 2, 2, 2, 3, 3, 3, 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved}; // index 15 reserved
const int32_t table_38213_13_1_c4[16] = { 0, 2, 4, 0, 2, 4, 12, 16, 12, 16, 12, 16, 38, 38, 38, reserved}; // index 15 reserved
const int32_t table_38213_13_2_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved}; // index 14-15 reserved
const int32_t table_38213_13_2_c3[16] = { 2, 2, 2, 2, 3, 3, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved}; // index 14-15 reserved
const int32_t table_38213_13_2_c4[16] = { 5, 6, 7, 8, 5, 6, 7, 8, 18, 20, 18, 20, 18, 20, reserved, reserved}; // index 14-15 reserved
const int32_t table_38213_13_3_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
const int32_t table_38213_13_3_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
const int32_t table_38213_13_3_c4[16] = { 2, 6, 2, 6, 2, 6, 28, 28, 28, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
const int32_t table_38213_13_4_c2[16] = {24, 24, 24, 24, 24, 24, 24, 24, 24, 24, 48, 48, 48, 48, 48, 48};
const int32_t table_38213_13_4_c3[16] = { 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 1, 1, 1, 2, 2, 2};
const int32_t table_38213_13_4_c4[16] = { 0, 1, 2, 3, 4, 0, 1, 2, 3, 4, 12, 14, 16, 12, 14, 16};
const int32_t table_38213_13_5_c2[16] = {48, 48, 48, 96, 96, 96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
const int32_t table_38213_13_5_c3[16] = { 1, 2, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
const int32_t table_38213_13_5_c4[16] = { 4, 4, 4, 0, 56, 0, 56, 0, 56, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 09-15 reserved
const int32_t table_38213_13_6_c2[16] = {24, 24, 24, 24, 48, 48, 48, 48, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
const int32_t table_38213_13_6_c3[16] = { 2, 2, 3, 3, 1, 1, 2, 2, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
const int32_t table_38213_13_6_c4[16] = { 0, 4, 0, 4, 0, 28, 0, 28, 0, 28, reserved, reserved, reserved, reserved, reserved, reserved}; // index 10-15 reserved
const int32_t table_38213_13_7_c2[16] = {48, 48, 48, 48, 48, 48, 96, 96, 48, 48, 96, 96, reserved, reserved, reserved, reserved}; // index 12-15 reserved
const int32_t table_38213_13_7_c3[16] = { 1, 1, 2, 2, 3, 3, 1, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved}; // index 12-15 reserved
const int32_t table_38213_13_7_c4[16] = { 0, 8, 0, 8, 0, 8, 28, 28,-41, 49,-41, 97, reserved, reserved, reserved, reserved}; // index 12-15 reserved, condition A as default
const int32_t table_38213_13_8_c2[16] = { 1, 1, 1, 1, 3, 3, 3, 3, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved
const int32_t table_38213_13_8_c3[16] = {24, 24, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved
const int32_t table_38213_13_8_c4[16] = { 0, 4, 14, 14,-20, 24,-20, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 15 reserved, condition A as default
const int32_t table_38213_13_9_c2[16] = {96, 96, 96, 96, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
const int32_t table_38213_13_9_c3[16] = { 1, 1, 2, 2, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
const int32_t table_38213_13_9_c4[16] = { 0, 16, 0, 16, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 04-15 reserved
const int32_t table_38213_13_10_c2[16] = {48, 48, 48, 48, 24, 24, 48, 48, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
const int32_t table_38213_13_10_c3[16] = { 1, 1, 2, 2, 1, 1, 1, 1, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved
const int32_t table_38213_13_10_c4[16] = { 0, 8, 0, 8,-41, 25,-41, 49, reserved, reserved, reserved, reserved, reserved, reserved, reserved, reserved}; // index 08-15 reserved, condition A as default
const float table_38213_13_11_c1[16] = { 0, 0, 2, 2, 5, 5, 7, 7, 0, 5, 0, 0, 2, 2, 5, 5}; // O
const int32_t table_38213_13_11_c2[16] = { 1, 2, 1, 2, 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1};
const float table_38213_13_11_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 0.5f, 1, 1, 1, 1, 1, 1, 1, 1}; // M
const int32_t table_38213_13_11_c4[16] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 1, 2, 1, 2}; // i is even as default
const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7.5f, 7.5f, 7.5f, 0, 5, reserved, reserved}; // O, index 14-15 reserved
const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved
const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
/*
#define mu_pusch 1
// definition table j Table 6.1.2.1.1-4
......
......@@ -38,6 +38,7 @@
#include "common/utils/nr/nr_common.h"
#include "executables/softmodem-common.h"
#include <stdio.h>
#include "nfapi_nr_interface.h"
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
#define LOG_DCI_D(a...) printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) ->" a)
......@@ -54,6 +55,23 @@ void fill_dci_search_candidates(NR_SearchSpace_t *ss,fapi_nr_dl_config_dci_dl_pd
LOG_D(MAC,"Filling search candidates for DCI\n");
if(ss->searchSpaceId == 0) {
// TODO: Update the maximum number of PDCCH candidates accordingly with Aggregation Level
rel15->number_of_candidates=1;
rel15->CCE[0]=0;
rel15->L[0]=6;
} else {
rel15->number_of_candidates=4;
rel15->CCE[0]=0;
rel15->L[0]=4;
rel15->CCE[1]=4;
rel15->L[1]=4;
rel15->CCE[2]=8;
rel15->L[2]=4;
rel15->CCE[3]=12;
rel15->L[3]=4;
}
uint8_t aggregation;
find_aggregation_candidates(&aggregation,
&rel15->number_of_candidates,
......@@ -75,11 +93,21 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_DownlinkCommon_t *bwp_Common = mac->DLbwp[bwp_id - 1]->bwp_Common;
NR_BWP_DownlinkCommon_t *initialDownlinkBWP = scc->downlinkConfigCommon->initialDownlinkBWP;
NR_SearchSpace_t *ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];
// CORESET configuration
NR_ControlResourceSet_t *coreset = mac->coreset[bwp_id - 1][coreset_id - 1];
NR_SearchSpace_t *ss;
NR_ControlResourceSet_t *coreset;
if(ss_id>=0) {
ss = mac->SSpace[bwp_id - 1][coreset_id - 1][ss_id];
coreset = mac->coreset[bwp_id - 1][coreset_id - 1];
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
} else {
ss = mac->search_space_zero;
coreset = mac->coreset0;
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
}
rel15->coreset.duration = coreset->duration;
for (int i = 0; i < 6; i++)
rel15->coreset.frequency_domain_resource[i] = coreset->frequencyDomainResources.buf[i];
rel15->coreset.CceRegMappingType = coreset->cce_REG_MappingType.present == NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved ? FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED : FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED;
......@@ -94,7 +122,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->coreset.InterleaverSize = 0;
rel15->coreset.ShiftIndex = 0;
}
rel15->coreset.CoreSetType = 1;
rel15->coreset.precoder_granularity = coreset->precoderGranularity;
// Scrambling RNTI
......@@ -144,6 +172,20 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
case NR_RNTI_SP_CSI:
break;
case NR_RNTI_SI:
// we use DL BWP dedicated
sps = bwp_Common->genericParameters.cyclicPrefix == NULL ? 14 : 12;
// for SPS=14 8 MSBs in positions 13 down to 6
monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
rel15->rnti = SI_RNTI; // SI-RNTI - 3GPP TS 38.321 Table 7.1-1: RNTI values
rel15->BWPSize = mac->type0_PDCCH_CSS_config.num_rbs;
rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon;
for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0);
}
break;
case NR_RNTI_SFI:
break;
......@@ -205,8 +247,11 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
// Fetch configuration for searchSpaceZero
// note: The search space with the SearchSpaceId = 0 identifies the search space configured via PBCH (MIB) and in ServingCellConfigCommon (searchSpaceZero).
if (pdcch_ConfigCommon->choice.setup->searchSpaceZero){
if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 == NULL){
pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
}
*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 = 0;
LOG_D(MAC, "[DCI_CONFIG] Configure SearchSpace#0 of the initial BWP\n");
LOG_W(MAC, "[DCI_CONFIG] This should not be available yet...");
}
if (ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0){
// check available SS IDs
......@@ -326,4 +371,25 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
break;
}
}
// Search space 0, CORESET ID 0
NR_BWP_DownlinkCommon_t *bwp_Common = bwp->bwp_Common;
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
NR_SearchSpace_t *ss0 = mac->search_space_zero;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
if (ss0->searchSpaceId == *pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
if( (frame%2 == mac->type0_PDCCH_CSS_config.sfn_c) && (slot == mac->type0_PDCCH_CSS_config.n_0) ){
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(ss0, rel15);
}
}
}
}
......@@ -385,6 +385,8 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
if (secondaryCellGroup) {
RC.nrmac[Mod_idP]->secondaryCellGroupCommon = secondaryCellGroup;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
if (add_ue == 1 && get_softmodem_params()->phy_test) {
const int UE_id = add_new_nr_ue(Mod_idP,rnti);
......
......@@ -388,6 +388,11 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedules MIB
schedule_nr_mib(module_idP, frame, slot, nr_slots_per_frame[*scc->ssbSubcarrierSpacing]);
// This schedules SIB1
if ( get_softmodem_params()->sa == 1 )
schedule_nr_sib1(module_idP, frame, slot);
// This schedule PRACH if we are not in phy_test mode
if (get_softmodem_params()->phy_test == 0) {
/* we need to make sure that resources for PRACH are free. To avoid that
......
......@@ -176,7 +176,13 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
// NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int coreset_id = coreset->controlResourceSetId;
int *cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id];
int *cce_list;
if(bwp->bwp_Id == 0) {
cce_list = nr_mac->cce_list[1][0];
} else {
cce_list = nr_mac->cce_list[bwp->bwp_Id][coreset_id];
}
int n_rb=0;
for (int i=0;i<6;i++)
......@@ -830,8 +836,12 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
pdcch_pdu->ShiftIndex = 0;
}
pdcch_pdu->CoreSetType = 1;
if(coreset->controlResourceSetId == 0) {
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_MIB_SIB1;
} else{
pdcch_pdu->CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
}
//precoderGranularity
pdcch_pdu->precoderGranularity = coreset->precoderGranularity;
......@@ -1326,22 +1336,42 @@ void fill_dci_pdu_rel15(NR_ServingCellConfigCommon_t *scc,
break;
case NR_RNTI_SI:
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment.val>>(fsize-i-1))&1)<<(dci_size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val>>(3-i))&1)<<(dci_size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
// Redundancy version 2bit
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
pos=1;
// Freq domain assignment 0-16 bit
fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
for (int i=0; i<fsize; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment.val>>(fsize-1-i))&1)<<(dci_size-pos++);
// Time domain assignment 4 bit
for (int i=0; i<4; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment.val>>(3-i))&1)<<(dci_size-pos++);
// VRB to PRB mapping 1 bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping.val&1)<<(dci_size-pos++);
// MCS 5bit //bit over 32, so dci_pdu ++
for (int i=0; i<5; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->mcs>>(4-i))&1)<<(dci_size-pos++);
// Redundancy version 2 bit
for (int i=0; i<2; i++)
*dci_pdu |= (((uint64_t)dci_pdu_rel15->rv>>(1-i))&1)<<(dci_size-pos++);
// System information indicator 1bit
*dci_pdu |= ((uint64_t)dci_pdu_rel15->system_info_indicator&1)<<(dci_size-pos++);
// reserved 15 bits
LOG_D(PHY,"dci_size = %i\n", dci_size);
LOG_D(PHY,"fsize = %i\n", fsize);
LOG_D(PHY,"dci_pdu_rel15->frequency_domain_assignment.val = %i\n", dci_pdu_rel15->frequency_domain_assignment.val);
LOG_D(PHY,"dci_pdu_rel15->time_domain_assignment.val = %i\n", dci_pdu_rel15->time_domain_assignment.val);
LOG_D(PHY,"dci_pdu_rel15->vrb_to_prb_mapping.val = %i\n", dci_pdu_rel15->vrb_to_prb_mapping.val);
LOG_D(PHY,"dci_pdu_rel15->mcs = %i\n", dci_pdu_rel15->mcs);
LOG_D(PHY,"dci_pdu_rel15->rv = %i\n", dci_pdu_rel15->rv);
LOG_D(PHY,"dci_pdu_rel15->system_info_indicator = %i\n", dci_pdu_rel15->system_info_indicator);
break;
case NR_RNTI_TC:
......
......@@ -80,6 +80,15 @@ void nr_schedule_ue_spec(module_id_t module_id,
sub_frame_t slot,
int num_slots_per_tdd);
void schedule_control_sib1(module_id_t module_id,
int CC_id,
int time_domain_allocation,
uint8_t mcsTableIdx,
uint8_t mcs,
int num_total_bytes);
void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP);
/* \brief default preprocessor */
void nr_simple_dlsch_preprocessor(module_id_t module_id,
frame_t frame,
......
......@@ -62,6 +62,8 @@
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
/* MAC */
#include "LAYER2/MAC/mac.h"
#include "LAYER2/MAC/mac_proto.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include "NR_TAG.h"
......@@ -552,6 +554,11 @@ typedef struct gNB_MAC_INST_s {
nr_pp_impl_dl pre_processor_dl;
/// UL preprocessor for differentiated scheduling
nr_pp_impl_ul pre_processor_ul;
NR_UE_sched_ctrl_t *sched_ctrlCommon;
NR_CellGroupConfig_t *secondaryCellGroupCommon;
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config;
} gNB_MAC_INST;
#endif /*__LAYER2_NR_MAC_GNB_H__ */
......@@ -60,9 +60,9 @@ int handle_bcch_bch(module_id_t module_id, int cc_id, unsigned int gNB_index, ui
// L2 Abstraction Layer
int handle_bcch_dlsch(module_id_t module_id, int cc_id, unsigned int gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
return 0;
return nr_ue_decode_sib1(module_id, cc_id, gNB_index, sibs_mask, pduP, pdu_len);
}
// L2 Abstraction Layer
int handle_dci(module_id_t module_id, int cc_id, unsigned int gNB_index, frame_t frame, int slot, fapi_nr_dci_indication_pdu_t *dci){
......
......@@ -35,6 +35,8 @@
#include "pdcp.h"
#include "msc.h"
#include "common/ran_context.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "intertask_interface.h"
......@@ -43,6 +45,103 @@
extern RAN_CONTEXT_t RC;
int generate_pdcch_ConfigSIB1(NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1,
long ssbSubcarrierSpacing,
long subCarrierSpacingCommon,
channel_bandwidth_t min_channel_bw) {
nr_ssb_and_cset_mux_pattern_type_t mux_pattern = 0;
switch (ssbSubcarrierSpacing) {
case NR_SubcarrierSpacing_kHz15:
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz15) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_1_NUM_INDEXES;
mux_pattern = table_38213_13_1_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz30) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_2_NUM_INDEXES;
mux_pattern = table_38213_13_2_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else {
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
}
break;
case NR_SubcarrierSpacing_kHz30:
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz15) {
if ( (min_channel_bw == bw_5MHz) || (min_channel_bw == bw_10MHz) ) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_3_NUM_INDEXES;
mux_pattern = table_38213_13_3_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else if (min_channel_bw == bw_40MHz) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_5_NUM_INDEXES;
mux_pattern = table_38213_13_5_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else {
AssertFatal(true,"Invalid min_bandwidth\n");
}
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz30) {
if ( (min_channel_bw == bw_5MHz) || (min_channel_bw == bw_10MHz) ) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_4_NUM_INDEXES;
mux_pattern = table_38213_13_4_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else if (min_channel_bw == bw_40MHz) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_6_NUM_INDEXES;
mux_pattern = table_38213_13_6_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else {
AssertFatal(true,"Invalid min_bandwidth\n");
}
} else {
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
}
break;
case NR_SubcarrierSpacing_kHz120:
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz60) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_7_NUM_INDEXES;
mux_pattern = table_38213_13_7_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz120) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_8_NUM_INDEXES;
mux_pattern = table_38213_13_8_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else {
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
}
break;
case NR_SubcarrierSpacing_kHz240:
if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz60) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_9_NUM_INDEXES;
mux_pattern = table_38213_13_9_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else if (subCarrierSpacingCommon == NR_SubcarrierSpacing_kHz120) {
pdcch_ConfigSIB1->controlResourceSetZero = rand() % TABLE_38213_13_10_NUM_INDEXES;
mux_pattern = table_38213_13_10_c1[pdcch_ConfigSIB1->controlResourceSetZero];
} else {
AssertFatal(true,"Invalid subCarrierSpacingCommon\n");
}
break;
default:
AssertFatal(true,"Invalid ssbSubcarrierSpacing\n");
break;
}
frequency_range_t frequency_range = FR1;
if(ssbSubcarrierSpacing>=60) {
frequency_range = FR2;
}
pdcch_ConfigSIB1->searchSpaceZero = 0;
if(mux_pattern == NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 && frequency_range == FR1){
pdcch_ConfigSIB1->searchSpaceZero = rand() % TABLE_38213_13_11_NUM_INDEXES;
}
if(mux_pattern == NR_SSB_AND_CSET_MUX_PATTERN_TYPE1 && frequency_range == FR2){
pdcch_ConfigSIB1->searchSpaceZero = rand() % TABLE_38213_13_12_NUM_INDEXES;
}
return 0;
}
int
nr_rrc_mac_remove_ue(module_id_t mod_idP,
rnti_t rntiP){
......@@ -129,41 +228,54 @@ int8_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
LOG_D(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%ld\n",Mod_idP,Srb_id);
#endif
gNB_RRC_INST *rrc;
rrc_gNB_carrier_data_t *carrier;
NR_BCCH_BCH_Message_t *mib;
NR_SRB_INFO * srb_info;
char payload_size, *payload_pP;
rrc = RC.nrrrc[Mod_idP];
carrier = &rrc->carrier;
mib = &carrier->mib;
srb_info = &carrier->Srb0;
/* MIBCH */
if( (Srb_id & RAB_OFFSET ) == MIBCH) {
mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
NULL,
(void *)mib,
carrier->MIB,
24);
LOG_D(NR_RRC,"Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n",frameP,sfn_msb,carrier->MIB,enc_rval.encoded);
buffer_pP[0]=carrier->MIB[0];
buffer_pP[1]=carrier->MIB[1];
buffer_pP[2]=carrier->MIB[2];
LOG_D(NR_RRC,"MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n",buffer_pP[0],buffer_pP[1],buffer_pP[2]);
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
enc_rval.failed_type->name, enc_rval.encoded);
return(3);
}
rrc_gNB_carrier_data_t *carrier;
NR_BCCH_BCH_Message_t *mib;
NR_SRB_INFO *srb_info;
char payload_size, *payload_pP;
carrier = &RC.nrrrc[Mod_idP]->carrier;
mib = &carrier->mib;
srb_info = &carrier->Srb0;
/* MIBCH */
if ((Srb_id & RAB_OFFSET) == MIBCH) {
// Currently we are getting the pdcch_ConfigSIB1 from the configuration file.
// Uncomment this function for a dynamic pdcch_ConfigSIB1.
//channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1
//generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1,
// *carrier->servingcellconfigcommon->ssbSubcarrierSpacing,
// carrier->mib.message.choice.mib->subCarrierSpacingCommon,
// min_channel_bw);
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero;
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero;
mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
NULL,
(void *) mib,
carrier->MIB,
24);
LOG_D(NR_RRC, "Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n", frameP, sfn_msb, carrier->MIB,
enc_rval.encoded);
buffer_pP[0] = carrier->MIB[0];
buffer_pP[1] = carrier->MIB[1];
buffer_pP[2] = carrier->MIB[2];
LOG_D(NR_RRC, "MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n", buffer_pP[0], buffer_pP[1],
buffer_pP[2]);
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
enc_rval.failed_type->name, enc_rval.encoded);
return (3);
}
/* TODO BCCH SIB1 SIBs */
if ((Srb_id & RAB_OFFSET ) == BCCH) {
memcpy(&buffer_pP[0],
RC.rrc[Mod_idP]->carrier[CC_id].SIB1_MBMS,
RC.rrc[Mod_idP]->carrier[CC_id].sizeof_SIB1_MBMS);
memcpy(&buffer_pP[0],
RC.nrrrc[Mod_idP]->carrier.SIB1,
RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1);
return RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1;
}
/* CCCH */
......
This diff is collapsed.
......@@ -403,6 +403,7 @@ typedef struct {
int pucch_TargetSNRx10;
NR_BCCH_DL_SCH_Message_t *siblock1;
NR_ServingCellConfigCommon_t *servingcellconfigcommon;
NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1;
NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS];
NR_SRB_INFO SI;
NR_SRB_INFO Srb0;
......
......@@ -71,6 +71,12 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
void rrc_remove_nsa_user(gNB_RRC_INST *rrc, int rnti);
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon);
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0);
void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CellGroupConfig_t *secondaryCellGroup,
int scg_id,
......
......@@ -225,7 +225,7 @@ static void init_NR_SI(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration
(NR_CellGroupConfig_t *)NULL
);
if (get_softmodem_params()->phy_test > 0 || get_softmodem_params()->do_ra > 0) {
if (get_softmodem_params()->phy_test > 0 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa > 0) {
// This is for phytest only, emulate first X2 message if uecap.raw file is present
FILE *fd;
fd = fopen("uecap.raw","r");
......
......@@ -98,7 +98,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc,
total_size = (enc_rval.encoded+7)>>3;
FILE *fd; // file to be generated for nr-ue
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0) {
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa == 1) {
// This is for phytest only, emulate first X2 message if uecap.raw file is present
LOG_I(RRC,"Dumping NR_RRCReconfiguration message (%jd bytes)\n",(enc_rval.encoded+7)>>3);
for (int i=0; i<(enc_rval.encoded+7)>>3; i++) {
......@@ -123,7 +123,7 @@ int generate_CG_Config(gNB_RRC_INST *rrc,
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0) {
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra > 0 || get_softmodem_params()->sa == 1) {
LOG_I(RRC,"Dumping scg_RB_Config message (%jd bytes)\n",(enc_rval.encoded+7)>>3);
for (int i=0; i<(enc_rval.encoded+7)>>3; i++) {
......
......@@ -162,7 +162,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
NR_RRCReconfiguration_IEs_t *reconfig_ies=calloc(1,sizeof(NR_RRCReconfiguration_IEs_t));
ue_context_p->ue_context.reconfig->criticalExtensions.choice.rrcReconfiguration = reconfig_ies;
carrier->initial_csi_index[rrc->Nb_ue] = 0;
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1){
if (get_softmodem_params()->phy_test == 1 || get_softmodem_params()->do_ra == 1 || get_softmodem_params()->sa == 1){
ue_context_p->ue_context.rb_config = calloc(1,sizeof(NR_RRCReconfiguration_t));
fill_default_rbconfig(ue_context_p->ue_context.rb_config);
}
......
......@@ -48,6 +48,99 @@
#define false 0
#define true 1
void fill_default_initialDownlinkBWP(NR_BWP_Downlink_t *bwp, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
bwp->bwp_Id = 0;
bwp->bwp_Common=calloc(1,sizeof(*bwp->bwp_Common));
memcpy((void*)&bwp->bwp_Common,
&servingcellconfigcommon->downlinkConfigCommon->initialDownlinkBWP,
sizeof(bwp->bwp_Common));
bwp->bwp_Dedicated=calloc(1,sizeof(*bwp->bwp_Dedicated));
bwp->bwp_Dedicated->pdsch_Config = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config));
bwp->bwp_Dedicated->pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition));
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0;
}
void fill_default_coresetZero(NR_ControlResourceSet_t *coreset0, NR_ServingCellConfigCommon_t *servingcellconfigcommon) {
coreset0->controlResourceSetId = 0;
// frequencyDomainResources '11111111 00000000 00000000 00000000 00000000 00000'B,
if(coreset0->frequencyDomainResources.buf == NULL) coreset0->frequencyDomainResources.buf = calloc(1,6);
coreset0->frequencyDomainResources.buf[0] = 0xff;
coreset0->frequencyDomainResources.buf[1] = 0;
coreset0->frequencyDomainResources.buf[2] = 0;
coreset0->frequencyDomainResources.buf[3] = 0;
coreset0->frequencyDomainResources.buf[4] = 0;
coreset0->frequencyDomainResources.buf[5] = 0;
coreset0->frequencyDomainResources.size = 6;
coreset0->frequencyDomainResources.bits_unused = 3;
coreset0->duration = 1;
coreset0->cce_REG_MappingType.present=NR_ControlResourceSet__cce_REG_MappingType_PR_interleaved;
coreset0->cce_REG_MappingType.choice.interleaved=calloc(1,sizeof(*coreset0->cce_REG_MappingType.choice.interleaved));
coreset0->cce_REG_MappingType.choice.interleaved->reg_BundleSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__reg_BundleSize_n6;
coreset0->cce_REG_MappingType.choice.interleaved->interleaverSize = NR_ControlResourceSet__cce_REG_MappingType__interleaved__interleaverSize_n2;
coreset0->cce_REG_MappingType.choice.interleaved->shiftIndex = servingcellconfigcommon->physCellId;
coreset0->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
if(coreset0->tci_StatesPDCCH_ToAddList == NULL) coreset0->tci_StatesPDCCH_ToAddList = calloc(1,sizeof(*coreset0->tci_StatesPDCCH_ToAddList));
NR_TCI_StateId_t *tci[8];
for (int i=0;i<8;i++) {
tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i;
ASN_SEQUENCE_ADD(&coreset0->tci_StatesPDCCH_ToAddList->list,tci[i]);
}
coreset0->tci_StatesPDCCH_ToReleaseList = NULL;
coreset0->tci_PresentInDCI = NULL;
coreset0->pdcch_DMRS_ScramblingID = NULL;
}
void fill_default_searchSpaceZero(NR_SearchSpace_t *ss0) {
if(ss0->controlResourceSetId == NULL) ss0->controlResourceSetId=calloc(1,sizeof(*ss0->controlResourceSetId));
if(ss0->monitoringSymbolsWithinSlot == NULL) ss0->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss0->monitoringSymbolsWithinSlot));
if(ss0->monitoringSymbolsWithinSlot->buf == NULL) ss0->monitoringSymbolsWithinSlot->buf = calloc(1,2);
if(ss0->nrofCandidates == NULL) ss0->nrofCandidates = calloc(1,sizeof(*ss0->nrofCandidates));
if(ss0->searchSpaceType == NULL) ss0->searchSpaceType = calloc(1,sizeof(*ss0->searchSpaceType));
if(ss0->searchSpaceType->choice.common == NULL) ss0->searchSpaceType->choice.common=calloc(1,sizeof(*ss0->searchSpaceType->choice.common));
if(ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 == NULL) ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss0->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
ss0->searchSpaceId = 0;
*ss0->controlResourceSetId = 0;
ss0->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss0->monitoringSlotPeriodicityAndOffset));
ss0->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
ss0->duration=NULL;
// should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed
ss0->monitoringSymbolsWithinSlot->buf[1] = 0;
ss0->monitoringSymbolsWithinSlot->buf[0] = (1<<7) | (1<<6);
ss0->monitoringSymbolsWithinSlot->size = 2;
ss0->monitoringSymbolsWithinSlot->bits_unused = 2;
// FIXME: update values from TS38.213 Section 10.1 Table 10.1-1: CCE aggregation levels and maximum number of PDCCH candidates per CCE aggregation level for CSS sets configured by searchSpaceSIB1
ss0->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss0->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n0;
ss0->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
ss0->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n1;
ss0->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
ss0->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
}
void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CellGroupConfig_t *secondaryCellGroup,
......@@ -457,7 +550,8 @@ void fill_default_secondaryCellGroup(NR_ServingCellConfigCommon_t *servingcellco
ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss);
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=0;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->pagingSearchSpace=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace));
......
......@@ -46,16 +46,17 @@ nr_mac_rrc_data_ind_ue(
const sdu_size_t pdu_len){
switch(channel){
case NR_BCCH_BCH:
AssertFatal( nr_rrc_ue_decode_NR_BCCH_BCH_Message( module_id, gNB_index, (uint8_t*)pduP, pdu_len) == 0, "UE decode BCCH-BCH error!\n");
break;
default:
break;
case NR_BCCH_BCH:
AssertFatal( nr_rrc_ue_decode_NR_BCCH_BCH_Message(module_id, gNB_index, (uint8_t*)pduP, pdu_len) == 0, "UE decode BCCH-BCH error!\n");
break;
case NR_BCCH_DL_SCH:
AssertFatal( nr_rrc_ue_decode_NR_SIB1_Message(module_id, gNB_index, (uint8_t*)pduP, pdu_len) == 0, "UE decode BCCH-DLSCH error!\n");
break;
default:
break;
}
return(0);
}
int8_t mac_rrc_nr_data_req_ue(const module_id_t Mod_idP,
......
......@@ -458,7 +458,7 @@ NR_UE_RRC_INST_t* openair_rrc_top_init_ue_nr(char* rrc_config_path){
RRC_LIST_INIT(NR_UE_rrc_inst[nr_ue].CSI_ReportConfig_list, NR_maxNrofCSI_ReportConfigurations);
}
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra==1) {
if (get_softmodem_params()->phy_test==1 || get_softmodem_params()->do_ra==1 || get_softmodem_params()->sa == 1) {
// read in files for RRCReconfiguration and RBconfig
FILE *fd;
char filename[1024];
......@@ -1477,6 +1477,39 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB
return rval;
}
/*brief decode SIB1 message*/
int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len) {
NR_BCCH_DL_SCH_Message_t *bcch_message = NULL;
asn_dec_rval_t dec_rval = uper_decode_complete(NULL,
&asn_DEF_NR_BCCH_DL_SCH_Message,
(void **)&bcch_message,
(const void *)bufferP,
buffer_len);
if ((dec_rval.code != RC_OK) || (dec_rval.consumed == 0)) {
LOG_D(RRC,"NR_BCCH_DL_SCH decode error\n");
SEQUENCE_free( &asn_DEF_NR_BCCH_DL_SCH_Message, (void *)bcch_message, 1 );
return -1;
}
else {
NR_SIB1_t *sib1 = NR_UE_rrc_inst[module_id].sib1[gNB_index];
if(sib1 != NULL){
SEQUENCE_free(&asn_DEF_NR_BCCH_BCH_Message, (void *)sib1, 1 );
}
sib1 = bcch_message->message.choice.c1->choice.systemInformationBlockType1;
if (*(int64_t*)sib1 != 1) {
LOG_D(RRC, "SIB1 address: %lx\n", *(int64_t*)sib1);
xer_fprint(stdout, &asn_DEF_NR_SIB1, (const void*)sib1);
}
else
LOG_E(PHY, "sib1 is starting by 8 times 0\n");
}
return 0;
}
// from NR SRB3
int8_t nr_rrc_ue_decode_NR_DL_DCCH_Message(
......
......@@ -51,6 +51,7 @@
#include "NR_asn_constant.h"
#include "NR_SchedulingRequestToAddMod.h"
#include "NR_MIB.h"
#include "NR_SIB1.h"
#include "NR_BCCH-BCH-Message.h"
#include "NR_DL-DCCH-Message.h"
#include "../NR/nr_rrc_defs.h"
......
......@@ -86,6 +86,13 @@ int8_t nr_rrc_ue_process_radio_bearer_config(NR_RadioBearerConfig_t *radio_beare
\param sdu_len length of buffer*/
int8_t nr_rrc_ue_decode_NR_BCCH_BCH_Message(const module_id_t module_id, const uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len);
/**\brief decode NR SIB1 message
\param module_idP module id
\param gNB_index gNB index
\param sduP pointer to buffer of ASN message
\param sdu_len length of buffer*/
int8_t nr_rrc_ue_decode_NR_SIB1_Message(module_id_t module_id, uint8_t gNB_index, uint8_t *const bufferP, const uint8_t buffer_len);
/**\brief Decode NR DCCH from gNB, sent from lower layer through SRB3
\param module_id module id
\param gNB_index gNB index
......
......@@ -284,7 +284,7 @@ int create_gNB_tasks(uint32_t gnb_nb) {
}
}
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0)) {
if (AMF_MODE_ENABLED && (get_softmodem_params()->phy_test==0 && get_softmodem_params()->do_ra==0 && get_softmodem_params()->sa==0)) {
if (gnb_nb > 0) {
if (itti_create_task (TASK_NGAP, ngap_gNB_task, NULL) < 0) {
LOG_E(S1AP, "Create task for NGAP failed\n");
......
......@@ -91,13 +91,13 @@ extern RAN_CONTEXT_t RC;
static int rfsimu_setchanmod_cmd(char *buff, int debug, telnet_printfunc_t prnt, void *arg);
static telnetshell_cmddef_t rfsimu_cmdarray[] = {
{"setmodel","<model name>",(cmdfunc_t)rfsimu_setchanmod_cmd,TELNETSRV_CMDFLAG_PUSHINTPOOLQ},
{"setmodel","<model name>",(cmdfunc_t)rfsimu_setchanmod_cmd,TELNETSRV_CMDFLAG_PUSHINTPOOLQ},
{"","",NULL},
};
static telnetshell_vardef_t rfsimu_vardef[] = {
{"",0,NULL}
};
};
pthread_mutex_t Sockmutex;
typedef struct complex16 sample_t; // 2*16 bits complex number
......@@ -170,11 +170,13 @@ void allocCirBuf(rfsimulator_state_t *bridge, int sock) {
static bool init_done=false;
if (!init_done) {
uint64_t rand;
FILE *h=fopen("/dev/random","r");
uint64_t rand;
FILE *h=fopen("/dev/random","r");
if ( 1 != fread(&rand,sizeof(rand),1,h) )
LOG_W(HW, "Simulator can't read /dev/random\n");
fclose(h);
fclose(h);
randominit(rand);
tableNor(rand);
init_done=true;
......@@ -189,7 +191,6 @@ void allocCirBuf(rfsimulator_state_t *bridge, int sock) {
bridge->chan_offset, // maybe used for TA
bridge->chan_pathloss); // path_loss in dB
set_channeldesc_owner(ptr->channel_model, RFSIMU_MODULEID);
random_channel(ptr->channel_model,false);
}
}
......@@ -317,25 +318,29 @@ void rfsimulator_readconfig(rfsimulator_state_t *rfsimulator) {
}
static int rfsimu_setchanmod_cmd(char *buff, int debug, telnet_printfunc_t prnt, void *arg) {
char *modelname=NULL;
char *modelname=NULL;
int s = sscanf(buff,"%ms\n",&modelname);
if (s == 1) {
int channelmod=modelid_fromname(modelname);
if (channelmod<0)
prnt("ERROR: model %s unknown\n",modelname);
else {
rfsimulator_state_t *t = (rfsimulator_state_t *)arg;
for (int i=0; i<FD_SETSIZE; i++) {
rfsimulator_state_t *t = (rfsimulator_state_t *)arg;
for (int i=0; i<FD_SETSIZE; i++) {
buffer_t *b=&t->buf[i];
if (b->conn_sock >= 0 ) {
channel_desc_t *newmodel=new_channel_desc_scm(t->tx_num_channels,t->rx_num_channels,
channelmod,
t->sample_rate,
t->tx_bw,
30e-9, // TDL delay-spread parameter
t->chan_forgetfact, // forgetting_factor
t->chan_offset, // maybe used for TA
t->chan_pathloss); // path_loss in dB
channelmod,
t->sample_rate,
t->tx_bw,
30e-9, // TDL delay-spread parameter
t->chan_forgetfact, // forgetting_factor
t->chan_offset, // maybe used for TA
t->chan_pathloss); // path_loss in dB
set_channeldesc_owner(newmodel, RFSIMU_MODULEID);
random_channel(newmodel,false);
channel_desc_t *oldmodel=b->channel_model;
......@@ -346,8 +351,9 @@ static int rfsimu_setchanmod_cmd(char *buff, int debug, telnet_printfunc_t prnt,
}
}
} else {
prnt("ERROR: no model specified\n");
prnt("ERROR: no model specified\n");
}
free(modelname);
return CMDSTATUS_FOUND;
}
......@@ -368,7 +374,7 @@ sin_addr:
};
bind(t->listen_sock, (struct sockaddr *)&addr, sizeof(addr));
AssertFatal(listen(t->listen_sock, 5) == 0, "");
struct epoll_event ev={0};
struct epoll_event ev= {0};
ev.events = EPOLLIN;
ev.data.fd = t->listen_sock;
AssertFatal(epoll_ctl(t->epollfd, EPOLL_CTL_ADD, t->listen_sock, &ev) != -1, "");
......@@ -440,7 +446,7 @@ static int rfsimulator_write_internal(rfsimulator_state_t *t, openair0_timestamp
if (t->lastWroteTS > timestamp+nsamps)
LOG_E(HW,"Not supported to send Tx out of order (same in USRP) %lu, %lu\n",
t->lastWroteTS, timestamp);
t->lastWroteTS, timestamp);
t->lastWroteTS=timestamp+nsamps;
......@@ -505,9 +511,9 @@ static bool flushInput(rfsimulator_state_t *t, int timeout, int nsamps_for_initi
if ( b->headerMode)
blockSz=b->remainToTransfer;
else
blockSz= b->transferPtr+b->remainToTransfer < b->circularBufEnd ?
blockSz= b->transferPtr + b->remainToTransfer <= b->circularBufEnd ?
b->remainToTransfer :
b->circularBufEnd - 1 - b->transferPtr ;
b->circularBufEnd - b->transferPtr ;
ssize_t sz=recv(fd, b->transferPtr, blockSz, MSG_DONTWAIT);
......@@ -523,7 +529,7 @@ static bool flushInput(rfsimulator_state_t *t, int timeout, int nsamps_for_initi
AssertFatal((b->remainToTransfer-=sz) >= 0, "");
b->transferPtr+=sz;
if (b->transferPtr==b->circularBufEnd - 1)
if (b->transferPtr==b->circularBufEnd )
b->transferPtr=(char *)b->circularBuf;
// check the header and start block transfer
......@@ -552,14 +558,13 @@ static bool flushInput(rfsimulator_state_t *t, int timeout, int nsamps_for_initi
}
}
} else {
memset(b->circularBuf, 0, sampleToByte(CirSize,1));
}
memset(b->circularBuf, 0, sampleToByte(CirSize,1));
}
if (b->lastReceivedTS != 0 && b->th.timestamp-b->lastReceivedTS < 1000)
LOG_W(HW,"UEsock: %d gap of: %ld in reception\n", fd, b->th.timestamp-b->lastReceivedTS );
b->lastReceivedTS=b->th.timestamp;
} else if ( b->lastReceivedTS > b->th.timestamp && b->th.size == 1 ) {
LOG_W(HW,"Received Rx/Tx synchro out of order\n");
b->trashingPacket=true;
......@@ -650,15 +655,15 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
// assuming this should have been done earlier if a Tx would exist
pthread_mutex_unlock(&Sockmutex);
struct complex16 v= {0};
void *samplesVoid[t->tx_num_channels];
void *dummyS[t->tx_num_channels];
for ( int i=0; i < t->tx_num_channels; i++)
samplesVoid[i]=(void *)&v;
dummyS[i]=(void *)&v;
LOG_I(HW, "No samples Tx occured, so we send 1 sample to notify it: Tx:%lu, Rx:%lu\n",
t->lastWroteTS, t->nextTimestamp);
rfsimulator_write_internal(t, t->nextTimestamp,
samplesVoid, 1,
dummyS, 1,
t->tx_num_channels, 1, true);
} else {
pthread_mutex_unlock(&Sockmutex);
......@@ -706,8 +711,9 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
// it seems legacy behavior is: never in UL, each frame in DL
if (reGenerateChannel)
random_channel(ptr->channel_model,0);
if (t->poll_telnetcmdq)
t->poll_telnetcmdq(t->telnetcmd_qid,t);
t->poll_telnetcmdq(t->telnetcmd_qid,t);
for (int a=0; a<nbAnt; a++) {//loop over number of Rx antennas
if ( ptr->channel_model != NULL ) // apply a channel model
......@@ -721,12 +727,13 @@ int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimestamp, vo
else { // no channel modeling
sample_t *out=(sample_t *)samplesVoid[a];
int nbAnt_tx = ptr->th.nbAnt;//number of Tx antennas
//LOG_I(HW, "nbAnt_tx %d\n",nbAnt_tx);
for (int i=0; i < nsamps; i++) {//loop over nsamps
for (int a_tx=0; a_tx<nbAnt_tx; a_tx++){//sum up signals from nbAnt_tx antennas
out[i].r+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].r;
out[i].i+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].i;
} // end for a_tx
for (int a_tx=0; a_tx<nbAnt_tx; a_tx++) { //sum up signals from nbAnt_tx antennas
out[i].r+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].r;
out[i].i+=ptr->circularBuf[((t->nextTimestamp+i)*nbAnt_tx+a_tx)%CirSize].i;
} // end for a_tx
} // end for i (number of samps)
} // end of no channel modeling
} // end for a (number of rx antennas)
......@@ -804,18 +811,20 @@ int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
rfsimulator->tx_bw=openair0_cfg->tx_bw;
//randominit(0);
set_taus_seed(0);
/* look for telnet server, if it is loaded, add the channel modeling commands to it */
/* look for telnet server, if it is loaded, add the channel modeling commands to it */
add_telnetcmd_func_t addcmd = (add_telnetcmd_func_t)get_shlibmodule_fptr("telnetsrv", TELNET_ADDCMD_FNAME);
if (addcmd != NULL) {
rfsimulator->poll_telnetcmdq = (poll_telnetcmdq_func_t)get_shlibmodule_fptr("telnetsrv", TELNET_POLLCMDQ_FNAME);
rfsimulator->poll_telnetcmdq = (poll_telnetcmdq_func_t)get_shlibmodule_fptr("telnetsrv", TELNET_POLLCMDQ_FNAME);
addcmd("rfsimu",rfsimu_vardef,rfsimu_cmdarray);
for(int i=0; rfsimu_cmdarray[i].cmdfunc != NULL; i++) {
if ( rfsimu_cmdarray[i].qptr != NULL) {
if ( rfsimu_cmdarray[i].qptr != NULL) {
rfsimulator->telnetcmd_qid = rfsimu_cmdarray[i].qptr;
break;
}
}
}
}
}
return 0;
}
......@@ -34,7 +34,8 @@ int fullread(int fd, void *_buf, int count) {
while (count) {
l = read(fd, buf, count);
if (l <= 0) return -1;
if (l <= 0)
return -1;
count -= l;
buf += l;
......@@ -43,6 +44,44 @@ int fullread(int fd, void *_buf, int count) {
return ret;
}
#define shift 4
int32_t signal_energy(int32_t *input,uint32_t length) {
int32_t i;
int32_t temp,temp2;
register __m64 mm0,mm1,mm2,mm3;
__m64 *in = (__m64 *)input;
mm0 = _mm_setzero_si64();//pxor(mm0,mm0);
mm3 = _mm_setzero_si64();//pxor(mm3,mm3);
for (i=0; i<length>>1; i++) {
mm1 = in[i];
mm2 = mm1;
mm1 = _m_pmaddwd(mm1,mm1);
mm1 = _m_psradi(mm1,shift);// shift any 32 bits blocs of the word by the value shift
mm0 = _m_paddd(mm0,mm1);// add the two 64 bits words 4 bytes by 4 bytes
// mm2 = _m_psrawi(mm2,shift_DC);
mm3 = _m_paddw(mm3,mm2);// add the two 64 bits words 2 bytes by 2 bytes
}
mm1 = mm0;
mm0 = _m_psrlqi(mm0,32);
mm0 = _m_paddd(mm0,mm1);
temp = _m_to_int(mm0);
temp/=length;
temp<<=shift; // this is the average of x^2
// now remove the DC component
mm2 = _m_psrlqi(mm3,32);
mm2 = _m_paddw(mm2,mm3);
mm2 = _m_pmaddwd(mm2,mm2);
temp2 = _m_to_int(mm2);
temp2/=(length*length);
// temp2<<=(2*shift_DC);
temp -= temp2;
_mm_empty();
_m_empty();
return((temp>0)?temp:1);
}
void fullwrite(int fd, void *_buf, int count) {
char *buf = _buf;
......@@ -131,8 +170,8 @@ void setblocking(int sock, enum blocking_t active) {
}
int main(int argc, char *argv[]) {
if(argc != 4) {
printf("Need parameters: source file, server or destination IP, TCP port\n");
if(argc < 4) {
printf("Need parameters: source file, server or destination IP, TCP port (4043), 'UL|DL' if raw 2*16bits format: UL for UL IQ, DL for DL IQs \n");
exit(1);
}
......@@ -147,10 +186,21 @@ int main(int argc, char *argv[]) {
serviceSock=client_start(argv[2],atoi(argv[3]));
}
uint64_t typeStamp=ENB_MAGICDL_FDD;
boolean_t raw=false;
if ( argc == 5 ) {
raw=true;
if (strcmp(argv[4],"UL") == 0 )
typeStamp=UE_MAGICDL_FDD;
}
samplesBlockHeader_t header;
int bufSize=100000;
void *buff=malloc(bufSize);
uint64_t readTS=0;
uint64_t timestamp=0;
const int blockSize=1000;
while (1) {
//Rewind the file to loop on the samples
......@@ -159,10 +209,21 @@ int main(int argc, char *argv[]) {
// Read one block and send it
setblocking(serviceSock, blocking);
AssertFatal(read(fd,&header,sizeof(header)), "");
if ( raw ) {
header.magic=typeStamp;
header.size=blockSize;
header.nbAnt=1;
header.timestamp=timestamp;
timestamp+=blockSize;
header.option_value=0;
header.option_flag=0;
} else {
AssertFatal(read(fd,&header,sizeof(header)), "");
}
fullwrite(serviceSock, &header, sizeof(header));
int dataSize=sizeof(int32_t)*header.size*header.nbAnt;
uint64_t wroteTS=header.timestamp;
if (dataSize>bufSize) {
void *new_buff = realloc(buff, dataSize);
......@@ -176,21 +237,28 @@ int main(int argc, char *argv[]) {
}
AssertFatal(read(fd,buff,dataSize) == dataSize, "");
if (raw) // UHD shifts the 12 ADC values in MSB
for (int i=0; i<header.size*header.nbAnt*2; i++)
((int16_t *)buff)[i]/=16;
usleep(1000);
printf("sending at ts: %lu, number of samples: %d, energy: %d\n",
header.timestamp, header.size, signal_energy(buff, header.size));
fullwrite(serviceSock, buff, dataSize);
// Purge incoming samples
setblocking(serviceSock, blocking);
setblocking(serviceSock, notBlocking);
int ret;
do {
char buff[64000];
ret=read(serviceSock, buff, 64000);
while(readTS < wroteTS) {
if ( fullread(serviceSock, &header,sizeof(header)) != sizeof(header) ||
fullread(serviceSock, buff, sizeof(int32_t)*header.size*header.nbAnt) !=
sizeof(int32_t)*header.size*header.nbAnt
) {
if ( ret<0 && !( errno == EAGAIN || errno == EWOULDBLOCK ) ) {
printf("error: %s\n", strerror(errno));
exit(1);
}
readTS=header.timestamp;
}
} while ( ret > 0 ) ;
}
return 0;
......
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