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lizhongxiao
OpenXG-RAN
Commits
409df4bb
Commit
409df4bb
authored
Jun 04, 2023
by
francescomani
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Plain Diff
remove unnecessary part of dci scehduler for RA
parent
72927faf
Changes
1
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1 changed file
with
5 additions
and
16 deletions
+5
-16
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+5
-16
No files found.
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
View file @
409df4bb
...
@@ -951,7 +951,7 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
...
@@ -951,7 +951,7 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
nr_scheduled_response_t
scheduled_response
;
nr_scheduled_response_t
scheduled_response
;
nr_dcireq_t
dcireq
;
nr_dcireq_t
dcireq
;
if
(
mac
->
state
==
UE_CONNECTED
)
{
if
(
mac
->
state
>
UE_NOT_SYNC
)
{
dcireq
.
module_id
=
mod_id
;
dcireq
.
module_id
=
mod_id
;
dcireq
.
gNB_index
=
gNB_index
;
dcireq
.
gNB_index
=
gNB_index
;
...
@@ -964,8 +964,10 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
...
@@ -964,8 +964,10 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
if
(
mac
->
ul_time_alignment
.
ta_apply
)
if
(
mac
->
ul_time_alignment
.
ta_apply
)
schedule_ta_command
(
dl_config
,
&
mac
->
ul_time_alignment
);
schedule_ta_command
(
dl_config
,
&
mac
->
ul_time_alignment
);
nr_schedule_csirs_reception
(
mac
,
rx_frame
,
rx_slot
);
if
(
mac
->
state
==
UE_CONNECTED
)
{
nr_schedule_csi_for_im
(
mac
,
rx_frame
,
rx_slot
);
nr_schedule_csirs_reception
(
mac
,
rx_frame
,
rx_slot
);
nr_schedule_csi_for_im
(
mac
,
rx_frame
,
rx_slot
);
}
dcireq
.
dl_config_req
=
*
dl_config
;
dcireq
.
dl_config_req
=
*
dl_config
;
fill_scheduled_response
(
&
scheduled_response
,
&
dcireq
.
dl_config_req
,
NULL
,
NULL
,
mod_id
,
cc_id
,
rx_frame
,
rx_slot
,
dl_info
->
phy_data
);
fill_scheduled_response
(
&
scheduled_response
,
&
dcireq
.
dl_config_req
,
NULL
,
NULL
,
mod_id
,
cc_id
,
rx_frame
,
rx_slot
,
dl_info
->
phy_data
);
...
@@ -974,19 +976,6 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
...
@@ -974,19 +976,6 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
mac
->
if_module
->
scheduled_response
(
&
scheduled_response
);
mac
->
if_module
->
scheduled_response
(
&
scheduled_response
);
}
}
}
}
else
if
(
mac
->
state
==
UE_PERFORMING_RA
)
{
// this is for Msg2/Msg4
if
(
mac
->
ra
.
ra_state
>=
WAIT_RAR
)
{
if
(
mac
->
ul_time_alignment
.
ta_apply
)
schedule_ta_command
(
dl_config
,
&
mac
->
ul_time_alignment
);
config_dci_pdu
(
mac
,
dl_config
,
mac
->
ra
.
ra_state
==
WAIT_RAR
?
NR_RNTI_RA
:
NR_RNTI_TC
,
rx_slot
,
mac
->
ra_SS
);
dl_config
->
number_pdus
=
1
;
LOG_D
(
MAC
,
"mac->cg %p: Calling fill_scheduled_response for type0_pdcch, num_pdus %d
\n
"
,
mac
->
cg
,
dl_config
->
number_pdus
);
fill_scheduled_response
(
&
scheduled_response
,
dl_config
,
NULL
,
NULL
,
mod_id
,
cc_id
,
rx_frame
,
rx_slot
,
dl_info
->
phy_data
);
if
(
mac
->
if_module
!=
NULL
&&
mac
->
if_module
->
scheduled_response
!=
NULL
)
mac
->
if_module
->
scheduled_response
(
&
scheduled_response
);
}
}
else
else
dl_config
->
number_pdus
=
0
;
dl_config
->
number_pdus
=
0
;
}
}
...
...
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