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lizhongxiao
OpenXG-RAN
Commits
6ca0b606
Commit
6ca0b606
authored
Oct 18, 2021
by
Thomas Schlichter
Committed by
Marwan Hammouda
Sep 07, 2023
Browse files
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Plain Diff
center target_ul_bw and target_dl_bw in phytest scheduler
parent
298892e2
Changes
1
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Showing
1 changed file
with
38 additions
and
40 deletions
+38
-40
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+38
-40
No files found.
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
View file @
6ca0b606
...
@@ -70,31 +70,24 @@ void nr_preprocessor_phytest(module_id_t module_id,
...
@@ -70,31 +70,24 @@ void nr_preprocessor_phytest(module_id_t module_id,
const
int
bwpSize
=
dl_bwp
->
BWPSize
;
const
int
bwpSize
=
dl_bwp
->
BWPSize
;
const
int
BWPStart
=
dl_bwp
->
BWPStart
;
const
int
BWPStart
=
dl_bwp
->
BWPStart
;
int
rbStart
=
0
;
int
rbSize
=
0
;
if
(
target_dl_bw
>
bwpSize
)
if
(
target_dl_bw
>
bwpSize
)
target_dl_bw
=
bwpSize
;
target_dl_bw
=
bwpSize
;
uint16_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
uint16_t
*
vrb_map
=
RC
.
nrmac
[
module_id
]
->
common_channels
[
CC_id
].
vrb_map
;
/* loop ensures that we allocate exactly target_dl_bw, or return */
while
(
true
)
{
/* allocate up to the target_dl_bw */
/* advance to first free RB */
/* advance to first free RB */
while
(
rbStart
<
bwpSize
&&
int
rbStart
=
(
bwpSize
-
target_dl_bw
)
/
2
;
(
vrb_map
[
rbStart
+
BWPStart
]
&
SL_to_bitmap
(
tda_info
.
startSymbolIndex
,
tda_info
.
nrOfSymbols
)))
while
(
rbStart
<
(
bwpSize
+
target_dl_bw
)
/
2
&&
vrb_map
[
rbStart
+
BWPStart
])
rbStart
++
;
rbStart
++
;
rbSize
=
1
;
/* iterate until we are at target_dl_bw or no available RBs */
/* iterate until we are at target_dl_bw or no available RBs */
while
(
rbStart
+
rbSize
<
bwpSize
&&
int
rbSize
=
0
;
!
(
vrb_map
[
rbStart
+
rbSize
+
BWPStart
]
&
SL_to_bitmap
(
tda_info
.
startSymbolIndex
,
tda_info
.
nrOfSymbols
))
&&
while
(
rbStart
+
rbSize
<
(
bwpSize
+
target_dl_bw
)
/
2
&&
!
vrb_map
[
rbStart
+
rbSize
+
BWPStart
])
rbSize
<
target_dl_bw
)
rbSize
++
;
rbSize
++
;
/* found target_dl_bw? */
/* found no free RBs? */
if
(
rbSize
==
target_dl_bw
)
if
(
rbSize
==
0
)
break
;
return
;
/* at end and below target_dl_bw? */
if
(
rbStart
+
rbSize
>=
bwpSize
)
return
;
rbStart
+=
rbSize
;
}
sched_ctrl
->
num_total_bytes
=
0
;
sched_ctrl
->
num_total_bytes
=
0
;
sched_ctrl
->
dl_lc_num
=
1
;
sched_ctrl
->
dl_lc_num
=
1
;
...
@@ -234,33 +227,38 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
...
@@ -234,33 +227,38 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
if
(
!
is_xlsch_in_slot
(
ulsch_slot_bitmap
,
sched_slot
))
if
(
!
is_xlsch_in_slot
(
ulsch_slot_bitmap
,
sched_slot
))
return
false
;
return
false
;
uint16_t
rbStart
=
0
;
uint16_t
rbSize
;
const
int
bw
=
ul_bwp
->
BWPSize
;
const
int
bw
=
ul_bwp
->
BWPSize
;
const
int
BWPStart
=
ul_bwp
->
BWPStart
;
const
int
BWPStart
=
ul_bwp
->
BWPStart
;
if
(
target_ul_bw
>
bw
)
if
(
target_ul_bw
>
bw
)
rbSize
=
bw
;
target_ul_bw
=
bw
;
else
rbSize
=
target_ul_bw
;
if
(
target_ul_bw
==
0
)
return
false
;
NR_tda_info_t
tda_info
=
get_ul_tda_info
(
ul_bwp
,
sched_ctrl
->
coreset
->
controlResourceSetId
,
sched_ctrl
->
search_space
->
searchSpaceType
->
present
,
NR_RNTI_C
,
tda
);
NR_tda_info_t
tda_info
=
get_ul_tda_info
(
ul_bwp
,
sched_ctrl
->
coreset
->
controlResourceSetId
,
sched_ctrl
->
search_space
->
searchSpaceType
->
present
,
NR_RNTI_C
,
tda
);
sched_ctrl
->
sched_pusch
.
tda_info
=
tda_info
;
sched_ctrl
->
sched_pusch
.
tda_info
=
tda_info
;
const
int
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
mu
,
nr_mac
->
vrb_map_UL_size
);
const
int
buffer_index
=
ul_buffer_index
(
sched_frame
,
sched_slot
,
mu
,
nr_mac
->
vrb_map_UL_size
);
uint16_t
*
vrb_map_UL
=
nr_mac
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_frame
%
MAX_NUM_UL_SCHED_FRAME
][
buffer_index
];
uint16_t
*
vrb_map_UL
=
nr_mac
->
common_channels
[
CC_id
].
vrb_map_UL
[
sched_frame
%
MAX_NUM_UL_SCHED_FRAME
][
buffer_index
];
//uint16_t *vrb_map_UL = &nr_mac->common_channels[CC_id].vrb_map_UL[buffer_index * MAX_BWP_SIZE];
//uint16_t *vrb_map_UL = RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_frame%MAX_NUM_UL_SCHED_FRAME][sched_slot];
for
(
int
i
=
rbStart
;
i
<
rbStart
+
rbSize
;
++
i
)
{
const
uint16_t
symb
=
SL_to_bitmap
(
tda_info
.
startSymbolIndex
,
tda_info
.
nrOfSymbols
);
if
((
vrb_map_UL
[
i
+
BWPStart
]
&
SL_to_bitmap
(
tda_info
.
startSymbolIndex
,
tda_info
.
nrOfSymbols
))
!=
0
)
{
LOG_E
(
MAC
,
uint16_t
rbStart
=
(
bw
-
target_ul_bw
)
/
2
;
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE
\n
"
,
uint16_t
rbSize
=
0
;
__func__
,
while
(
rbStart
+
rbSize
<
(
bw
+
target_ul_bw
)
/
2
)
{
frame
,
if
((
vrb_map_UL
[
rbStart
+
rbSize
+
BWPStart
]
&
symb
)
!=
0
)
slot
,
break
;
i
);
rbSize
++
;
return
false
;
}
}
if
(
rbSize
==
0
)
{
LOG_E
(
MAC
,
"%s(): %4d.%2d all RBs already reserved, cannot schedule UE
\n
"
,
__func__
,
frame
,
slot
);
return
false
;
}
}
sched_ctrl
->
sched_pusch
.
slot
=
sched_slot
;
sched_ctrl
->
sched_pusch
.
slot
=
sched_slot
;
...
@@ -323,6 +321,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
...
@@ -323,6 +321,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl
->
aggregation_level
);
sched_ctrl
->
aggregation_level
);
for
(
int
rb
=
rbStart
;
rb
<
rbStart
+
rbSize
;
rb
++
)
for
(
int
rb
=
rbStart
;
rb
<
rbStart
+
rbSize
;
rb
++
)
vrb_map_UL
[
rb
+
BWPStart
]
|=
SL_to_bitmap
(
tda_info
.
startSymbolIndex
,
tda_info
.
nrOfSymbols
)
;
vrb_map_UL
[
rb
+
BWPStart
]
|=
symb
;
return
true
;
return
true
;
}
}
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