Commit 80eac5ae authored by Imad Al Samman's avatar Imad Al Samman

For MWC2024 Demo

parent c599e172
...@@ -773,6 +773,7 @@ int get_ssb_subcarrier_offset(uint32_t absoluteFrequencySSB, uint32_t absoluteFr ...@@ -773,6 +773,7 @@ int get_ssb_subcarrier_offset(uint32_t absoluteFrequencySSB, uint32_t absoluteFr
// the assertion is to avoid having an offset of half a subcarrier // the assertion is to avoid having an offset of half a subcarrier
if (scs == 1) if (scs == 1)
AssertFatal(subcarrier_offset % 2 == 0, "ssb offset %d invalid for scs %d\n", subcarrier_offset, scs); AssertFatal(subcarrier_offset % 2 == 0, "ssb offset %d invalid for scs %d\n", subcarrier_offset, scs);
//subcarrier_offset = 4;
return subcarrier_offset; return subcarrier_offset;
} }
...@@ -791,6 +792,8 @@ uint32_t get_ssb_offset_to_pointA(uint32_t absoluteFrequencySSB, ...@@ -791,6 +792,8 @@ uint32_t get_ssb_offset_to_pointA(uint32_t absoluteFrequencySSB,
const int ssb_offset_point_a = ((scaled_abs_diff / 12) - 10) * scaling; const int ssb_offset_point_a = ((scaled_abs_diff / 12) - 10) * scaling;
// Offset to point A needs to be divisible by scaling // Offset to point A needs to be divisible by scaling
AssertFatal(ssb_offset_point_a % scaling == 0, "PRB offset %d not valid for scs %d\n", ssb_offset_point_a, ssbSubcarrierSpacing); AssertFatal(ssb_offset_point_a % scaling == 0, "PRB offset %d not valid for scs %d\n", ssb_offset_point_a, ssbSubcarrierSpacing);
//const int ssb_offset_point_a = 25;
//return 25;
return ssb_offset_point_a; return ssb_offset_point_a;
} }
......
...@@ -771,7 +771,7 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot) ...@@ -771,7 +771,7 @@ static radio_tx_gpio_flag_t get_gpio_flags(RU_t *ru, int slot)
} }
flags_gpio = beam | TX_GPIO_CHANGE; flags_gpio = beam | TX_GPIO_CHANGE;
// flags_gpio |= beam << 8; // MSB 8 bits are used for beam // flags_gpio |= beam << 8; // MSB 8 bits are used for beam
LOG_I(HW, "slot %d, beam %d, flags_gpio %d\n", slot, beam, flags_gpio); LOG_D(HW, "slot %d, beam %d, flags_gpio %d\n", slot, beam, flags_gpio);
break; break;
} }
default: default:
......
...@@ -72,11 +72,29 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_ ...@@ -72,11 +72,29 @@ void nr_common_signal_procedures (PHY_VARS_gNB *gNB,int frame,int slot,nfapi_nr_
// setting the first subcarrier // setting the first subcarrier
const int scs = cfg->ssb_config.scs_common.value; const int scs = cfg->ssb_config.scs_common.value;
const int prb_offset = (fp->freq_range == nr_FR1) ? ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA>>scs : ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA>>(scs-2); // const int prb_offset = (fp->freq_range == nr_FR1) ? ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA>>scs : ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA>>(scs-2);
const int sc_offset = (fp->freq_range == nr_FR1) ? ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset >> scs //const int sc_offset = (fp->freq_range == nr_FR1) ? ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset >> scs
: ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset >> (scs - 2); // : ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset >> (scs - 2);
const int prb_offset = (fp->freq_range == nr_FR1) ? ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA >> scs
: ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA >> (scs - 2);
const int sc_offset =
(fp->freq_range == nr_FR1) ? ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset >> scs : ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset;
fp->ssb_start_subcarrier = (12 * prb_offset + sc_offset); fp->ssb_start_subcarrier = (12 * prb_offset + sc_offset);
LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier, prb_offset, sc_offset); // LOG_D(PHY, "SSB first subcarrier %d (%d,%d)\n", fp->ssb_start_subcarrier, prb_offset, sc_offset);
LOG_D(PHY,
"ssbOffsetPointA %d SSB SsbSubcarrierOffset %d prb_offset %d sc_offset %d scs %d ssb_start_subcarrier %d\n",
ssb_pdu.ssb_pdu_rel15.ssbOffsetPointA,
ssb_pdu.ssb_pdu_rel15.SsbSubcarrierOffset,
prb_offset,
sc_offset,
scs,
fp->ssb_start_subcarrier);
LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol); LOG_D(PHY,"SS TX: frame %d, slot %d, start_symbol %d\n",frame,slot, ssb_start_symbol);
nr_generate_pss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp); nr_generate_pss(&txdataF[0][txdataF_offset], gNB->TX_AMP, ssb_start_symbol, cfg, fp);
......
...@@ -545,6 +545,7 @@ void nr_initiate_ra_proc(module_id_t module_idP, ...@@ -545,6 +545,7 @@ void nr_initiate_ra_proc(module_id_t module_idP,
uint8_t symbol, uint8_t symbol,
int16_t timing_offset) int16_t timing_offset)
{ {
timing_offset = 4;
gNB_MAC_INST *nr_mac = RC.nrmac[module_idP]; gNB_MAC_INST *nr_mac = RC.nrmac[module_idP];
NR_SCHED_LOCK(&nr_mac->sched_lock); NR_SCHED_LOCK(&nr_mac->sched_lock);
...@@ -1670,10 +1671,25 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1670,10 +1671,25 @@ static void nr_generate_Msg4(module_id_t module_idP,
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id]; NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_UE_DL_BWP_t *dl_bwp = &ra->DL_BWP; NR_UE_DL_BWP_t *dl_bwp = &ra->DL_BWP;
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
const NR_TDD_UL_DL_Pattern_t *tdd = scc->tdd_UL_DL_ConfigurationCommon ? &scc->tdd_UL_DL_ConfigurationCommon->pattern1 : NULL;
// lenght of tdd period in slots
const int n_slots_frame = nr_slots_per_frame[dl_bwp->scs];
int tdd_period_slot =n_slots_frame;
if (tdd) {
tdd_period_slot = n_slots_frame/get_nb_periods_per_frame(tdd->dl_UL_TransmissionPeriodicity);
}
else{
if(cc->frame_type == TDD)
AssertFatal(cc->frame_type == FDD, "Dynamic TDD not handled yet\n");
}
// FR2 schedule Msg4 in slot 2 of TDD period
if (dl_bwp->scs >= 3 &&(!(slotP%tdd_period_slot == 4 || slotP%tdd_period_slot == 4 || slotP%tdd_period_slot == 2))) return;
LOG_I(NR_MAC, "frame %d and slot %d\n", frameP, slotP );
// if it is a DL slot, if the RA is in MSG4 state // if it is a DL slot, if the RA is in MSG4 state
if (is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[slotP / 64], slotP)) { if (is_xlsch_in_slot(nr_mac->dlsch_slot_bitmap[slotP / 64], slotP)) {
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
NR_SearchSpace_t *ss = ra->ra_ss; NR_SearchSpace_t *ss = ra->ra_ss;
NR_ControlResourceSet_t *coreset = ra->coreset; NR_ControlResourceSet_t *coreset = ra->coreset;
...@@ -1912,7 +1928,7 @@ static void nr_generate_Msg4(module_id_t module_idP, ...@@ -1912,7 +1928,7 @@ static void nr_generate_Msg4(module_id_t module_idP,
} }
ra->state = WAIT_Msg4_ACK; ra->state = WAIT_Msg4_ACK;
LOG_I(NR_MAC,"UE %04x Generate msg4: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK\n", ra->rnti, pucch->frame, pucch->ul_slot, harq->tb_size); LOG_I(NR_MAC,"UE %04x Generate msg4 in %d.%d: feedback at %4d.%2d, payload %d bytes, next state WAIT_Msg4_ACK\n", ra->rnti, frameP, slotP, pucch->frame, pucch->ul_slot, harq->tb_size);
} }
} }
......
...@@ -88,6 +88,7 @@ static void schedule_ssb(frame_t frame, ...@@ -88,6 +88,7 @@ static void schedule_ssb(frame_t frame,
dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index; dl_config_pdu->ssb_pdu.ssb_pdu_rel15.precoding_and_beamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = beam_index;
dl_req->nPDUs++; dl_req->nPDUs++;
LOG_D(MAC," Scheduling SSB %d with offsetPointA %d and Kssb %d\n", i_ssb, offset_pointa, scoffset);
LOG_D(MAC,"Scheduling ssb %d at frame %d and slot %d\n",i_ssb,frame,slot); LOG_D(MAC,"Scheduling ssb %d at frame %d and slot %d\n",i_ssb,frame,slot);
} }
......
...@@ -926,6 +926,11 @@ void nr_schedule_ue_spec(module_id_t module_id, ...@@ -926,6 +926,11 @@ void nr_schedule_ue_spec(module_id_t module_id,
AssertFatal(pthread_mutex_trylock(&gNB_mac->sched_lock) == EBUSY, AssertFatal(pthread_mutex_trylock(&gNB_mac->sched_lock) == EBUSY,
"this function should be called with the scheduler mutex locked\n"); "this function should be called with the scheduler mutex locked\n");
// if (!((slot > 0 && slot <= 10)||(slot >= 20 && slot <= 30)||(slot >= 40 && slot <= 50)))
// return;
if (!is_xlsch_in_slot(gNB_mac->dlsch_slot_bitmap[slot / 64], slot)) if (!is_xlsch_in_slot(gNB_mac->dlsch_slot_bitmap[slot / 64], slot))
return; return;
......
...@@ -2069,6 +2069,10 @@ nr_pp_impl_ul nr_init_fr1_ulsch_preprocessor(int CC_id) ...@@ -2069,6 +2069,10 @@ nr_pp_impl_ul nr_init_fr1_ulsch_preprocessor(int CC_id)
void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, nfapi_nr_ul_dci_request_t *ul_dci_req) void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, nfapi_nr_ul_dci_request_t *ul_dci_req)
{ {
gNB_MAC_INST *nr_mac = RC.nrmac[module_id]; gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
// if (!(((slot/10)%2==0 && slot%10==3)||((slot/10)%2==0 && slot%10==4)||((slot/10)%2==0 && slot%10==5)))
// return;
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */ /* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
NR_SCHED_ENSURE_LOCKED(&nr_mac->sched_lock); NR_SCHED_ENSURE_LOCKED(&nr_mac->sched_lock);
......
...@@ -199,19 +199,36 @@ static int get_ssb_arfcn(const f1ap_served_cell_info_t *cell_info, const NR_MIB_ ...@@ -199,19 +199,36 @@ static int get_ssb_arfcn(const f1ap_served_cell_info_t *cell_info, const NR_MIB_
int band = get_dl_band(cell_info); int band = get_dl_band(cell_info);
// FR1 includes frequency bands from 410 MHz (ARFCN 82000) to 7125 MHz (ARFCN 875000) // FR1 includes frequency bands from 410 MHz (ARFCN 82000) to 7125 MHz (ARFCN 875000)
// FR2 includes frequency bands from 24.25 GHz (ARFCN 2016667) to 71.0 GHz (ARFCN 2795832) // FR2 includes frequency bands from 24.25 GHz (ARFCN 2016667) to 71.0 GHz (ARFCN 2795832)
uint64_t scaling = 0;
uint64_t freqpointa = from_nrarfcn(band, scs, dl_arfcn);
uint64_t freqssb = 0;
// 3GPP TS 38.211 sections 7.4.3.1 and 4.4.4.2
// for FR1 offsetToPointA and k_SSB are expressed in terms of 15 kHz SCS
// for FR2 offsetToPointA is expressed in terms of 60 kHz SCS and k_SSB expressed in terms of the subcarrier spacing provided
// by the higher-layer parameter subCarrierSpacingCommon
// FR1 includes frequency bands from 410 MHz (ARFCN 82000) to 7125 MHz (ARFCN 875000)
// FR2 includes frequency bands from 24.25 GHz (ARFCN 2016667) to 71.0 GHz (ARFCN 2795832)
// uint64_t scaling = 0;
if (dl_arfcn >= 82000 && dl_arfcn < 875000) if (dl_arfcn >= 82000 && dl_arfcn < 875000)
scaling = 1; // scaling = 1;
freqssb = freqpointa + 15000 * (offsetToPointA * 12 + kssb + 1) + 10ll * 12 * (1 << scs) * 15000;
else if (dl_arfcn >= 2016667 && dl_arfcn < 2795832) else if (dl_arfcn >= 2016667 && dl_arfcn < 2795832)
scaling = 4; // scaling = 4;
freqssb = freqpointa + 60000 * offsetToPointA * 12 + (1 << scs) * 15000 * (kssb + 10ll * 12);
else else
AssertFatal(false, "Invalid absoluteFrequencyPointA: %d\n", dl_arfcn); AssertFatal(false, "Invalid absoluteFrequencyPointA: %d\n", dl_arfcn);
uint64_t freqpointa = from_nrarfcn(band, scs, dl_arfcn); // uint64_t freqpointa = from_nrarfcn(band, scs, dl_arfcn);
// offsetToPointA and kSSB are both on 15kHz SCS for FR1 and 60kHz SCS for FR2 (see 38.211 sections 7.4.3.1 and 4.4.4.2) // offsetToPointA and kSSB are both on 15kHz SCS for FR1 and 60kHz SCS for FR2 (see 38.211 sections 7.4.3.1 and 4.4.4.2)
// SSB uses the SCS of the cell and is 20 RBs wide, so use 10 // SSB uses the SCS of the cell and is 20 RBs wide, so use 10
uint64_t freqssb = freqpointa + scaling * 15000 * (offsetToPointA * 12 + kssb) + 10ll * 12 * (1 << scs) * 15000; //uint64_t freqssb = freqpointa + scaling * 15000 * (offsetToPointA * 12 + kssb) + 10ll * 12 * (1 << scs) * 15000;
int bw_index = get_supported_band_index(scs, band, get_dl_bw(cell_info)); int bw_index = get_supported_band_index(scs, band, get_dl_bw(cell_info));
int band_size_hz = get_supported_bw_mhz(band > 256 ? FR2 : FR1, bw_index) * 1000 * 1000; int band_size_hz = get_supported_bw_mhz(band > 256 ? FR2 : FR1, bw_index) * 1000 * 1000;
uint32_t ssb_arfcn = to_nrarfcn(band, freqssb, scs, band_size_hz); uint32_t ssb_arfcn = to_nrarfcn(band, freqssb, scs, band_size_hz);
...@@ -1065,7 +1082,8 @@ static void rrc_handle_RRCSetupRequest(gNB_RRC_INST *rrc, sctp_assoc_t assoc_id, ...@@ -1065,7 +1082,8 @@ static void rrc_handle_RRCSetupRequest(gNB_RRC_INST *rrc, sctp_assoc_t assoc_id,
*/ */
if ((ue_context_p = rrc_gNB_ue_context_random_exist(rrc, random_value))) { if ((ue_context_p = rrc_gNB_ue_context_random_exist(rrc, random_value))) {
LOG_W(NR_RRC, "new UE rnti (coming with random value) is already there, removing UE %x from MAC/PHY\n", msg->crnti); LOG_W(NR_RRC, "new UE rnti (coming with random value) is already there, removing UE %x from MAC/PHY\n", msg->crnti);
AssertFatal(false, "not implemented\n"); //AssertFatal(false, "not implemented\n");
return;
} }
ue_context_p = rrc_gNB_create_ue_context(assoc_id, msg->crnti, rrc, random_value, msg->gNB_DU_ue_id); ue_context_p = rrc_gNB_create_ue_context(assoc_id, msg->crnti, rrc, random_value, msg->gNB_DU_ue_id);
......
...@@ -1230,7 +1230,7 @@ extern "C" { ...@@ -1230,7 +1230,7 @@ extern "C" {
case 122880000: case 122880000:
// from usrp_time_offset // from usrp_time_offset
//openair0_cfg[0].samples_per_packet = 2048; //openair0_cfg[0].samples_per_packet = 2048;
openair0_cfg[0].tx_sample_advance = 15; //to be checked openair0_cfg[0].tx_sample_advance = 164; //t15; //to be checked
openair0_cfg[0].tx_bw = 80e6; openair0_cfg[0].tx_bw = 80e6;
openair0_cfg[0].rx_bw = 80e6; openair0_cfg[0].rx_bw = 80e6;
break; break;
......
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